diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md
index 8ed7c1a9ea1..2cca88c08b4 100644
--- a/gcc/config/i960/i960.md
+++ b/gcc/config/i960/i960.md
@@ -22,6 +22,13 @@
 
 ;;- See file "rtl.def" for documentation on define_insn, match_*, et. al.
 
+;; There are very few (4) 'f' registers, they can't be loaded/stored from/to
+;; memory, and some instructions explicitly require them, so we get better
+;; code by discouraging psuedo-registers from being allocated to them.
+;; However, we do want to allow all patterns which can store to them to
+;; include them in their constraints, so we always use '*f' in a destination
+;; constraint except when 'f' is the only alternative.
+
 ;; Insn attributes which describe the i960.
 
 ;; Modscan is not used, since the compiler never emits any of these insns.
@@ -949,7 +956,7 @@
 }")
 
 (define_insn ""
-  [(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m,o")
+  [(set (match_operand:DF 0 "general_operand" "=r,*f,d,d,m,o")
 	(match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d,G"))]
   "current_function_args_size == 0
    && (register_operand (operands[0], DFmode)
@@ -980,7 +987,7 @@
   [(set_attr "type" "move,move,load,fpload,fpstore,fpstore")])
 
 (define_insn ""
-  [(set (match_operand:DF 0 "general_operand" "=r,f,d,d,m")
+  [(set (match_operand:DF 0 "general_operand" "=r,*f,d,d,m")
 	(match_operand:DF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
   "current_function_args_size != 0
    && (register_operand (operands[0], DFmode)
@@ -1017,7 +1024,7 @@
 }")
 
 (define_insn ""
-  [(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m")
+  [(set (match_operand:SF 0 "general_operand" "=r,*f,d,d,m")
 	(match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,dG"))]
   "current_function_args_size == 0
    && (register_operand (operands[0], SFmode)
@@ -1047,7 +1054,7 @@
   [(set_attr "type" "move,move,load,fpload,fpstore")])
 
 (define_insn ""
-  [(set (match_operand:SF 0 "general_operand" "=r,f,d,d,m")
+  [(set (match_operand:SF 0 "general_operand" "=r,*f,d,d,m")
 	(match_operand:SF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
   "current_function_args_size != 0
    && (register_operand (operands[0], SFmode)
@@ -1312,7 +1319,7 @@
 ;; Conversions between float and double.
 
 (define_insn "extendsfdf2"
-  [(set (match_operand:DF 0 "register_operand" "=f,d")
+  [(set (match_operand:DF 0 "register_operand" "=*f,d")
 	(float_extend:DF (match_operand:SF 1 "fp_arith_operand" "dGH,fGH")))]
   "TARGET_NUMERICS"
   "@
@@ -1338,7 +1345,7 @@
   [(set_attr "type" "fpcvt")])
 
 (define_insn "floatsisf2"
-  [(set (match_operand:SF 0 "register_operand" "=df")
+  [(set (match_operand:SF 0 "register_operand" "=d*f")
 	(float:SF (match_operand:SI 1 "register_operand" "d")))]
   "TARGET_NUMERICS"
   "cvtir	%1,%0"
@@ -1697,7 +1704,7 @@
 ;; Floating point arithmetic instructions.
 
 (define_insn "adddf3"
-  [(set (match_operand:DF 0 "register_operand" "=d")
+  [(set (match_operand:DF 0 "register_operand" "=d*f")
 	(plus:DF (match_operand:DF 1 "fp_arith_operand" "%rGH")
 		 (match_operand:DF 2 "fp_arith_operand" "rGH")))]
   "TARGET_NUMERICS"
@@ -1705,7 +1712,7 @@
   [(set_attr "type" "fpadd")])
 
 (define_insn "addsf3"
-  [(set (match_operand:SF 0 "register_operand" "=d")
+  [(set (match_operand:SF 0 "register_operand" "=d*f")
 	(plus:SF (match_operand:SF 1 "fp_arith_operand" "%rGH")
 		 (match_operand:SF 2 "fp_arith_operand" "rGH")))]
   "TARGET_NUMERICS"
@@ -1714,7 +1721,7 @@
 
 
 (define_insn "subdf3"
-  [(set (match_operand:DF 0 "register_operand" "=d")
+  [(set (match_operand:DF 0 "register_operand" "=d*f")
 	(minus:DF (match_operand:DF 1 "fp_arith_operand" "rGH")
 		  (match_operand:DF 2 "fp_arith_operand" "rGH")))]
   "TARGET_NUMERICS"
@@ -1722,7 +1729,7 @@
   [(set_attr "type" "fpadd")])
 
 (define_insn "subsf3"
-  [(set (match_operand:SF 0 "register_operand" "=d")
+  [(set (match_operand:SF 0 "register_operand" "=d*f")
 	(minus:SF (match_operand:SF 1 "fp_arith_operand" "rGH")
 		  (match_operand:SF 2 "fp_arith_operand" "rGH")))]
   "TARGET_NUMERICS"
@@ -1731,7 +1738,7 @@
 
 
 (define_insn "muldf3"
-  [(set (match_operand:DF 0 "register_operand" "=d")
+  [(set (match_operand:DF 0 "register_operand" "=d*f")
 	(mult:DF (match_operand:DF 1 "fp_arith_operand" "rGH")
 		 (match_operand:DF 2 "fp_arith_operand" "rGH")))]
   "TARGET_NUMERICS"
@@ -1739,7 +1746,7 @@
   [(set_attr "type" "fpmul")])
 
 (define_insn "mulsf3"
-  [(set (match_operand:SF 0 "register_operand" "=d")
+  [(set (match_operand:SF 0 "register_operand" "=d*f")
 	(mult:SF (match_operand:SF 1 "fp_arith_operand" "rGH")
 		 (match_operand:SF 2 "fp_arith_operand" "rGH")))]
   "TARGET_NUMERICS"
@@ -1748,7 +1755,7 @@
 
 
 (define_insn "divdf3"
-  [(set (match_operand:DF 0 "register_operand" "=d")
+  [(set (match_operand:DF 0 "register_operand" "=d*f")
 	(div:DF (match_operand:DF 1 "fp_arith_operand" "rGH")
 		(match_operand:DF 2 "fp_arith_operand" "rGH")))]
   "TARGET_NUMERICS"
@@ -1756,7 +1763,7 @@
   [(set_attr "type" "fpdiv")])
 
 (define_insn "divsf3"
-  [(set (match_operand:SF 0 "register_operand" "=d")
+  [(set (match_operand:SF 0 "register_operand" "=d*f")
 	(div:SF (match_operand:SF 1 "fp_arith_operand" "rGH")
 		(match_operand:SF 2 "fp_arith_operand" "rGH")))]
   "TARGET_NUMERICS"
@@ -1764,7 +1771,7 @@
   [(set_attr "type" "fpdiv")])
 
 (define_insn "negdf2"
-  [(set (match_operand:DF 0 "register_operand" "=d,f")
+  [(set (match_operand:DF 0 "register_operand" "=d,d*f")
 	(neg:DF (match_operand:DF 1 "register_operand" "d,r")))]
   ""
   "*
@@ -1780,7 +1787,7 @@
   [(set_attr "type" "fpadd")])
 
 (define_insn "negsf2"
-  [(set (match_operand:SF 0 "register_operand" "=d,f")
+  [(set (match_operand:SF 0 "register_operand" "=d,d*f")
 	(neg:SF (match_operand:SF 1 "register_operand" "d,r")))]
   ""
   "@
@@ -1793,7 +1800,7 @@
 ;;; less than 32.
 
 (define_insn "absdf2"
-  [(set (match_operand:DF 0 "register_operand" "=df")
+  [(set (match_operand:DF 0 "register_operand" "=d*f")
 	(abs:DF (match_operand:DF 1 "register_operand" "df")))]
   ""
   "*
@@ -1819,7 +1826,7 @@
   [(set_attr "type" "multi")])
 
 (define_insn "abssf2"
-  [(set (match_operand:SF 0 "register_operand" "=df")
+  [(set (match_operand:SF 0 "register_operand" "=d*f")
 	(abs:SF (match_operand:SF 1 "register_operand" "df")))]
   ""
   "*
@@ -1861,7 +1868,7 @@
 }")
 
 (define_insn ""
-  [(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m,o")
+  [(set (match_operand:TF 0 "general_operand" "=r,*f,d,d,m,o")
 	(match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d,G"))]
   "current_function_args_size == 0
    && (register_operand (operands[0], TFmode)
@@ -1894,7 +1901,7 @@
   [(set_attr "type" "move,move,load,fpload,fpstore,fpstore")])
 
 (define_insn ""
-  [(set (match_operand:TF 0 "general_operand" "=r,f,d,d,m")
+  [(set (match_operand:TF 0 "general_operand" "=r,*f,d,d,m")
 	(match_operand:TF 1 "fpmove_src_operand" "r,GH,F,m,d"))]
   "current_function_args_size != 0
    && (register_operand (operands[0], TFmode)
@@ -1921,7 +1928,7 @@
   [(set_attr "type" "move,move,load,fpload,fpstore")])
 
 (define_insn "extendsftf2"
-  [(set (match_operand:TF 0 "register_operand" "=f,d")
+  [(set (match_operand:TF 0 "register_operand" "=*f,d")
 	(float_extend:TF
 	 (match_operand:SF 1 "register_operand" "d,f")))]
   "TARGET_NUMERICS"
@@ -1931,7 +1938,7 @@
   [(set_attr "type" "fpmove")])
 
 (define_insn "extenddftf2"
-  [(set (match_operand:TF 0 "register_operand" "=f,d")
+  [(set (match_operand:TF 0 "register_operand" "=*f,d")
 	(float_extend:TF
 	 (match_operand:DF 1 "register_operand" "d,f")))]
   "TARGET_NUMERICS"