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Fix sh problems at -O0 

From-SVN: r37582
This commit is contained in:
Bernd Schmidt 2000-11-20 14:17:59 +00:00 committed by Bernd Schmidt
parent badc2279d9
commit bd6758592b
3 changed files with 15 additions and 36 deletions
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6
gcc/ChangeLog
View File

@ -1,3 +1,9 @@
2000-11-20 Bernd Schmidt <bernds@redhat.co.uk>
* toplev.c (rest_of_compilation): Run optimize_mode_switching even
if not optimizing.
* sh.c (emit_sf_insn, emit_df_insn): Just call emit_insn.
2000-11-19 Richard Henderson <rth@redhat.com>
* crtstuff.c (force_to_data): Use array size 1 not 0.

24
gcc/config/sh/sh.c
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@ -5014,38 +5014,14 @@ void
emit_sf_insn (pat)
rtx pat;
{
rtx addr;
/* When generating reload insns, we must not create new registers. FPSCR
should already have the correct value, so do nothing to change it. */
if (! TARGET_FPU_SINGLE && ! reload_in_progress && optimize < 1)
{
addr = gen_reg_rtx (SImode);
emit_insn (gen_fpu_switch0 (addr));
}
emit_insn (pat);
if (! TARGET_FPU_SINGLE && ! reload_in_progress && optimize < 1)
{
addr = gen_reg_rtx (SImode);
emit_insn (gen_fpu_switch1 (addr));
}
}
void
emit_df_insn (pat)
rtx pat;
{
rtx addr;
if (TARGET_FPU_SINGLE && ! reload_in_progress && optimize < 1)
{
addr = gen_reg_rtx (SImode);
emit_insn (gen_fpu_switch0 (addr));
}
emit_insn (pat);
if (TARGET_FPU_SINGLE && ! reload_in_progress && optimize < 1)
{
addr = gen_reg_rtx (SImode);
emit_insn (gen_fpu_switch1 (addr));
}
}
void

21
gcc/toplev.c
View File

@ -3345,20 +3345,17 @@ rest_of_compilation (decl)
register_life_up_to_date = 0;
#ifdef OPTIMIZE_MODE_SWITCHING
if (optimize)
timevar_push (TV_GCSE);
if (optimize_mode_switching (NULL_PTR))
{
timevar_push (TV_GCSE);
if (optimize_mode_switching (NULL_PTR))
{
/* We did work, and so had to regenerate global life information.
Take advantage of this and don't re-recompute register life
information below. */
register_life_up_to_date = 1;
}
timevar_pop (TV_GCSE);
/* We did work, and so had to regenerate global life information.
Take advantage of this and don't re-recompute register life
information below. */
register_life_up_to_date = 1;
}
timevar_pop (TV_GCSE);
#endif
#ifdef INSN_SCHEDULING