[AArch64] Rid the world of NAMED_PARAM
gcc/ * config/aarch64/aarch64.c (NAMED_PARAM): Delete it. (generic_addrcost_table): Remove NAMED_PARAM. (cortexa57_addrcost_table): Likewise. (xgene1_addrcost_table): Likewise. (generic_regmove_table): Likewise. (cortexa53_regmove_table): Likewise. (xgene1_regmove_table): Likewise. (generic_vector_table): Likewise. (cortexa57_vector_table): Likewise. (xgene1_vector_table): Likewise. (generic_tunings): Likewise. (cortexa53_tunings): Likewise. (cortexa57_tunings): Likewise. (xgene1_tunings): Likewise. From-SVN: r220401
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@ -1,3 +1,20 @@
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2015-02-04 James Greenhalgh <james.greenhalgh@arm.com>
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* config/aarch64/aarch64.c (NAMED_PARAM): Delete it.
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(generic_addrcost_table): Remove NAMED_PARAM.
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(cortexa57_addrcost_table): Likewise.
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(xgene1_addrcost_table): Likewise.
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(generic_regmove_table): Likewise.
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(cortexa53_regmove_table): Likewise.
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(xgene1_regmove_table): Likewise.
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(generic_vector_table): Likewise.
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(cortexa57_vector_table): Likewise.
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(xgene1_vector_table): Likewise.
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(generic_tunings): Likewise.
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(cortexa53_tunings): Likewise.
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(cortexa57_tunings): Likewise.
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(xgene1_tunings): Likewise.
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2015-02-04 Matthew Wahab <matthew.wahab@arm.com>
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* config/arm/arm-cores.def: Add cortex-a72 and
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@ -188,188 +188,148 @@ unsigned long aarch64_tune_flags = 0;
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/* Tuning parameters. */
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#if HAVE_DESIGNATED_INITIALIZERS
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#define NAMED_PARAM(NAME, VAL) .NAME = (VAL)
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#else
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#define NAMED_PARAM(NAME, VAL) (VAL)
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#endif
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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static const struct cpu_addrcost_table generic_addrcost_table =
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{
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#if HAVE_DESIGNATED_INITIALIZERS
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.addr_scale_costs =
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#endif
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{
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NAMED_PARAM (hi, 0),
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NAMED_PARAM (si, 0),
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NAMED_PARAM (di, 0),
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NAMED_PARAM (ti, 0),
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0, /* hi */
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0, /* si */
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0, /* di */
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0, /* ti */
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},
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NAMED_PARAM (pre_modify, 0),
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NAMED_PARAM (post_modify, 0),
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NAMED_PARAM (register_offset, 0),
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NAMED_PARAM (register_extend, 0),
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NAMED_PARAM (imm_offset, 0)
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0, /* pre_modify */
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0, /* post_modify */
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0, /* register_offset */
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0, /* register_extend */
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0 /* imm_offset */
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};
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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static const struct cpu_addrcost_table cortexa57_addrcost_table =
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{
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#if HAVE_DESIGNATED_INITIALIZERS
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.addr_scale_costs =
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#endif
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{
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NAMED_PARAM (hi, 1),
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NAMED_PARAM (si, 0),
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NAMED_PARAM (di, 0),
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NAMED_PARAM (ti, 1),
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1, /* hi */
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0, /* si */
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0, /* di */
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1, /* ti */
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},
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NAMED_PARAM (pre_modify, 0),
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NAMED_PARAM (post_modify, 0),
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NAMED_PARAM (register_offset, 0),
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NAMED_PARAM (register_extend, 0),
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NAMED_PARAM (imm_offset, 0),
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0, /* pre_modify */
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0, /* post_modify */
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0, /* register_offset */
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0, /* register_extend */
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0, /* imm_offset */
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};
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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static const struct cpu_addrcost_table xgene1_addrcost_table =
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{
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#if HAVE_DESIGNATED_INITIALIZERS
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.addr_scale_costs =
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#endif
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{
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NAMED_PARAM (hi, 1),
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NAMED_PARAM (si, 0),
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NAMED_PARAM (di, 0),
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NAMED_PARAM (ti, 1),
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1, /* hi */
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0, /* si */
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0, /* di */
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1, /* ti */
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},
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NAMED_PARAM (pre_modify, 1),
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NAMED_PARAM (post_modify, 0),
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NAMED_PARAM (register_offset, 0),
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NAMED_PARAM (register_extend, 1),
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NAMED_PARAM (imm_offset, 0),
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1, /* pre_modify */
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0, /* post_modify */
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0, /* register_offset */
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1, /* register_extend */
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0, /* imm_offset */
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};
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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static const struct cpu_regmove_cost generic_regmove_cost =
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{
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NAMED_PARAM (GP2GP, 1),
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1, /* GP2GP */
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/* Avoid the use of slow int<->fp moves for spilling by setting
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their cost higher than memmov_cost. */
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NAMED_PARAM (GP2FP, 5),
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NAMED_PARAM (FP2GP, 5),
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NAMED_PARAM (FP2FP, 2)
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5, /* GP2FP */
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5, /* FP2GP */
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2 /* FP2FP */
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};
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static const struct cpu_regmove_cost cortexa57_regmove_cost =
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{
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NAMED_PARAM (GP2GP, 1),
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1, /* GP2GP */
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/* Avoid the use of slow int<->fp moves for spilling by setting
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their cost higher than memmov_cost. */
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NAMED_PARAM (GP2FP, 5),
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NAMED_PARAM (FP2GP, 5),
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NAMED_PARAM (FP2FP, 2)
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5, /* GP2FP */
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5, /* FP2GP */
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2 /* FP2FP */
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};
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static const struct cpu_regmove_cost cortexa53_regmove_cost =
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{
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NAMED_PARAM (GP2GP, 1),
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1, /* GP2GP */
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/* Avoid the use of slow int<->fp moves for spilling by setting
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their cost higher than memmov_cost. */
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NAMED_PARAM (GP2FP, 5),
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NAMED_PARAM (FP2GP, 5),
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NAMED_PARAM (FP2FP, 2)
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5, /* GP2FP */
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5, /* FP2GP */
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2 /* FP2FP */
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};
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static const struct cpu_regmove_cost thunderx_regmove_cost =
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{
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NAMED_PARAM (GP2GP, 2),
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NAMED_PARAM (GP2FP, 2),
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NAMED_PARAM (FP2GP, 6),
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NAMED_PARAM (FP2FP, 4)
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2, /* GP2GP */
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2, /* GP2FP */
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6, /* FP2GP */
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4 /* FP2FP */
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};
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static const struct cpu_regmove_cost xgene1_regmove_cost =
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{
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NAMED_PARAM (GP2GP, 1),
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1, /* GP2GP */
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/* Avoid the use of slow int<->fp moves for spilling by setting
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their cost higher than memmov_cost. */
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NAMED_PARAM (GP2FP, 8),
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NAMED_PARAM (FP2GP, 8),
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NAMED_PARAM (FP2FP, 2)
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8, /* GP2FP */
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8, /* FP2GP */
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2 /* FP2FP */
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};
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/* Generic costs for vector insn classes. */
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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static const struct cpu_vector_cost generic_vector_cost =
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{
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NAMED_PARAM (scalar_stmt_cost, 1),
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NAMED_PARAM (scalar_load_cost, 1),
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NAMED_PARAM (scalar_store_cost, 1),
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NAMED_PARAM (vec_stmt_cost, 1),
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NAMED_PARAM (vec_to_scalar_cost, 1),
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NAMED_PARAM (scalar_to_vec_cost, 1),
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NAMED_PARAM (vec_align_load_cost, 1),
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NAMED_PARAM (vec_unalign_load_cost, 1),
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NAMED_PARAM (vec_unalign_store_cost, 1),
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NAMED_PARAM (vec_store_cost, 1),
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NAMED_PARAM (cond_taken_branch_cost, 3),
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NAMED_PARAM (cond_not_taken_branch_cost, 1)
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1, /* scalar_stmt_cost */
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1, /* scalar_load_cost */
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1, /* scalar_store_cost */
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1, /* vec_stmt_cost */
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1, /* vec_to_scalar_cost */
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1, /* scalar_to_vec_cost */
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1, /* vec_align_load_cost */
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1, /* vec_unalign_load_cost */
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1, /* vec_unalign_store_cost */
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1, /* vec_store_cost */
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3, /* cond_taken_branch_cost */
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1 /* cond_not_taken_branch_cost */
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};
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/* Generic costs for vector insn classes. */
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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static const struct cpu_vector_cost cortexa57_vector_cost =
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{
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NAMED_PARAM (scalar_stmt_cost, 1),
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NAMED_PARAM (scalar_load_cost, 4),
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NAMED_PARAM (scalar_store_cost, 1),
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NAMED_PARAM (vec_stmt_cost, 3),
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NAMED_PARAM (vec_to_scalar_cost, 8),
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NAMED_PARAM (scalar_to_vec_cost, 8),
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NAMED_PARAM (vec_align_load_cost, 5),
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NAMED_PARAM (vec_unalign_load_cost, 5),
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NAMED_PARAM (vec_unalign_store_cost, 1),
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NAMED_PARAM (vec_store_cost, 1),
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NAMED_PARAM (cond_taken_branch_cost, 1),
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NAMED_PARAM (cond_not_taken_branch_cost, 1)
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1, /* scalar_stmt_cost */
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4, /* scalar_load_cost */
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1, /* scalar_store_cost */
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3, /* vec_stmt_cost */
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8, /* vec_to_scalar_cost */
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8, /* scalar_to_vec_cost */
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5, /* vec_align_load_cost */
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5, /* vec_unalign_load_cost */
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1, /* vec_unalign_store_cost */
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1, /* vec_store_cost */
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1, /* cond_taken_branch_cost */
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1 /* cond_not_taken_branch_cost */
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};
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/* Generic costs for vector insn classes. */
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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static const struct cpu_vector_cost xgene1_vector_cost =
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{
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NAMED_PARAM (scalar_stmt_cost, 1),
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NAMED_PARAM (scalar_load_cost, 5),
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NAMED_PARAM (scalar_store_cost, 1),
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NAMED_PARAM (vec_stmt_cost, 2),
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NAMED_PARAM (vec_to_scalar_cost, 4),
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NAMED_PARAM (scalar_to_vec_cost, 4),
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NAMED_PARAM (vec_align_load_cost, 10),
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NAMED_PARAM (vec_unalign_load_cost, 10),
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NAMED_PARAM (vec_unalign_store_cost, 2),
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NAMED_PARAM (vec_store_cost, 2),
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NAMED_PARAM (cond_taken_branch_cost, 2),
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NAMED_PARAM (cond_not_taken_branch_cost, 1)
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1, /* scalar_stmt_cost */
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5, /* scalar_load_cost */
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1, /* scalar_store_cost */
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2, /* vec_stmt_cost */
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4, /* vec_to_scalar_cost */
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4, /* scalar_to_vec_cost */
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10, /* vec_align_load_cost */
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10, /* vec_unalign_load_cost */
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2, /* vec_unalign_store_cost */
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2, /* vec_store_cost */
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2, /* cond_taken_branch_cost */
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1 /* cond_not_taken_branch_cost */
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};
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#define AARCH64_FUSE_NOTHING (0)
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@ -379,18 +339,15 @@ static const struct cpu_vector_cost xgene1_vector_cost =
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#define AARCH64_FUSE_ADRP_LDR (1 << 3)
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#define AARCH64_FUSE_CMP_BRANCH (1 << 4)
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#if HAVE_DESIGNATED_INITIALIZERS && GCC_VERSION >= 2007
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__extension__
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#endif
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static const struct tune_params generic_tunings =
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{
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&cortexa57_extra_costs,
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&generic_addrcost_table,
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&generic_regmove_cost,
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&generic_vector_cost,
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NAMED_PARAM (memmov_cost, 4),
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NAMED_PARAM (issue_rate, 2),
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NAMED_PARAM (fuseable_ops, AARCH64_FUSE_NOTHING),
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4, /* memmov_cost */
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2, /* issue_rate */
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AARCH64_FUSE_NOTHING, /* fuseable_ops */
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8, /* function_align. */
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8, /* jump_align. */
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4, /* loop_align. */
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@ -405,10 +362,10 @@ static const struct tune_params cortexa53_tunings =
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&generic_addrcost_table,
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&cortexa53_regmove_cost,
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&generic_vector_cost,
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NAMED_PARAM (memmov_cost, 4),
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NAMED_PARAM (issue_rate, 2),
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NAMED_PARAM (fuseable_ops, (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
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| AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR)),
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4, /* memmov_cost */
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2, /* issue_rate */
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(AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
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| AARCH64_FUSE_MOVK_MOVK | AARCH64_FUSE_ADRP_LDR), /* fuseable_ops */
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8, /* function_align. */
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8, /* jump_align. */
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4, /* loop_align. */
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@ -423,9 +380,10 @@ static const struct tune_params cortexa57_tunings =
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&cortexa57_addrcost_table,
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&cortexa57_regmove_cost,
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&cortexa57_vector_cost,
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NAMED_PARAM (memmov_cost, 4),
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NAMED_PARAM (issue_rate, 3),
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NAMED_PARAM (fuseable_ops, (AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD | AARCH64_FUSE_MOVK_MOVK)),
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4, /* memmov_cost */
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3, /* issue_rate */
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(AARCH64_FUSE_MOV_MOVK | AARCH64_FUSE_ADRP_ADD
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| AARCH64_FUSE_MOVK_MOVK), /* fuseable_ops */
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16, /* function_align. */
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8, /* jump_align. */
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4, /* loop_align. */
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@ -440,9 +398,9 @@ static const struct tune_params thunderx_tunings =
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&generic_addrcost_table,
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&thunderx_regmove_cost,
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&generic_vector_cost,
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NAMED_PARAM (memmov_cost, 6),
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NAMED_PARAM (issue_rate, 2),
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NAMED_PARAM (fuseable_ops, AARCH64_FUSE_CMP_BRANCH),
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6, /* memmov_cost */
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2, /* issue_rate */
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AARCH64_FUSE_CMP_BRANCH, /* fuseable_ops */
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8, /* function_align. */
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8, /* jump_align. */
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8, /* loop_align. */
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@ -457,9 +415,9 @@ static const struct tune_params xgene1_tunings =
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&xgene1_addrcost_table,
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&xgene1_regmove_cost,
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&xgene1_vector_cost,
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NAMED_PARAM (memmov_cost, 6),
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NAMED_PARAM (issue_rate, 4),
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NAMED_PARAM (fuseable_ops, AARCH64_FUSE_NOTHING),
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6, /* memmov_cost */
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4, /* issue_rate */
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AARCH64_FUSE_NOTHING, /* fuseable_ops */
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16, /* function_align. */
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8, /* jump_align. */
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16, /* loop_align. */
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