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re PR rtl-optimization/66156 ([msp430] wrong code generated with -O2 -mlarge (zero extension HI -> SI))

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PR target/66156
	* config/msp430/msp430.md (zero_extendhisi2): Add support for
	separate source and destination registers.

From-SVN: r223354
This commit is contained in:
Nick Clifton 2015-05-19 11:42:44 +00:00
parent 057c74c7c5
commit bdafd67926
2 changed files with 12 additions and 4 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,9 @@
2015-05-19 Nick Clifton <nickc@redhat.com>
PR target/66156
* config/msp430/msp430.md (zero_extendhisi2): Add support for
separate source and destination registers.
2015-05-19 Richard Biener <rguenther@suse.de>
PR tree-optimization/66165
@ -32,7 +38,7 @@
* calls.c: Always define STACK_GROWS_DOWNWARD as 0 or 1.
(mem_overlaps_already_clobbered_arg_p): Rewrite ifdef
STACK_GROWS_DOWNWARD as normal if.
(expand_call): Likewise.
(expand_call): Likewise.
2015-05-19 Oleg Endo <olegendo@gcc.gnu.org>

8
gcc/config/msp430/msp430.md
View File

@ -588,10 +588,12 @@
;; patterns. Doing these manually allows for alternate optimization
;; paths.
(define_insn "zero_extendhisi2"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm")
(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0")))]
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r")
(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "0,r")))]
"msp430x"
"MOV.W\t#0,%H0"
"@
MOV.W\t#0,%H0
MOV.W\t%1,%L0 { MOV.W\t#0,%H0"
)
(define_insn "zero_extendhisipsi2"