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sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use nonimmediate_operand instead of register_operand predicate for operands 1... 

* config/i386/sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use
	nonimmediate_operand instead of register_operand predicate for operands
	1 and 2, force them into registers if expanding them as comparison.
	(<code><mode>3 umaxmin:VI124_128 expander): Similarly.  For UMAX
	V8HImode force into register just operand 1.

From-SVN: r179045
This commit is contained in:
Jakub Jelinek 2011-09-21 13:39:23 +02:00 committed by Jakub Jelinek
parent fd1e62c239
commit bdbebb7dc6
2 changed files with 18 additions and 4 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2011-09-21 Jakub Jelinek <jakub@redhat.com>
* config/i386/sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use
nonimmediate_operand instead of register_operand predicate for operands
1 and 2, force them into registers if expanding them as comparison.
(<code><mode>3 umaxmin:VI124_128 expander): Similarly. For UMAX
V8HImode force into register just operand 1.
2011-09-21 Georg-Johann Lay <avr@gjlay.de> 2011-09-21 Georg-Johann Lay <avr@gjlay.de>
PR target/45099 PR target/45099

14
gcc/config/i386/sse.md
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@ -5887,8 +5887,8 @@
(define_expand "<code><mode>3" (define_expand "<code><mode>3"
[(set (match_operand:VI124_128 0 "register_operand" "") [(set (match_operand:VI124_128 0 "register_operand" "")
(smaxmin:VI124_128 (match_operand:VI124_128 1 "register_operand" "") (smaxmin:VI124_128 (match_operand:VI124_128 1 "nonimmediate_operand" "")
(match_operand:VI124_128 2 "register_operand" "")))] (match_operand:VI124_128 2 "nonimmediate_operand" "")))]
"TARGET_SSE2" "TARGET_SSE2"
{ {
if (TARGET_SSE4_1 || <MODE>mode == V8HImode) if (TARGET_SSE4_1 || <MODE>mode == V8HImode)
@ -5899,6 +5899,8 @@
bool ok; bool ok;
xops[0] = operands[0]; xops[0] = operands[0];
operands[1] = force_reg (<MODE>mode, operands[1]);
operands[2] = force_reg (<MODE>mode, operands[2]);
if (<CODE> == SMAX) if (<CODE> == SMAX)
{ {
@ -5954,8 +5956,8 @@
(define_expand "<code><mode>3" (define_expand "<code><mode>3"
[(set (match_operand:VI124_128 0 "register_operand" "") [(set (match_operand:VI124_128 0 "register_operand" "")
(umaxmin:VI124_128 (match_operand:VI124_128 1 "register_operand" "") (umaxmin:VI124_128 (match_operand:VI124_128 1 "nonimmediate_operand" "")
(match_operand:VI124_128 2 "register_operand" "")))] (match_operand:VI124_128 2 "nonimmediate_operand" "")))]
"TARGET_SSE2" "TARGET_SSE2"
{ {
if (TARGET_SSE4_1 || <MODE>mode == V16QImode) if (TARGET_SSE4_1 || <MODE>mode == V16QImode)
@ -5963,6 +5965,7 @@
else if (<CODE> == UMAX && <MODE>mode == V8HImode) else if (<CODE> == UMAX && <MODE>mode == V8HImode)
{ {
rtx op0 = operands[0], op2 = operands[2], op3 = op0; rtx op0 = operands[0], op2 = operands[2], op3 = op0;
operands[1] = force_reg (<MODE>mode, operands[1]);
if (rtx_equal_p (op3, op2)) if (rtx_equal_p (op3, op2))
op3 = gen_reg_rtx (V8HImode); op3 = gen_reg_rtx (V8HImode);
emit_insn (gen_sse2_ussubv8hi3 (op3, operands[1], op2)); emit_insn (gen_sse2_ussubv8hi3 (op3, operands[1], op2));
@ -5974,6 +5977,9 @@
rtx xops[6]; rtx xops[6];
bool ok; bool ok;
operands[1] = force_reg (<MODE>mode, operands[1]);
operands[2] = force_reg (<MODE>mode, operands[2]);
xops[0] = operands[0]; xops[0] = operands[0];
if (<CODE> == UMAX) if (<CODE> == UMAX)