(HARD_REGNO_MODE_OK): Allow DImode in FP registers.

(CONDITIONAL_REGISTER_USAGE): Delete ppcas mention from comment.
(RTX_COSTS): Costs based upon processor_type enum.

From-SVN: r6818
This commit is contained in:
Richard Kenner 1994-03-18 17:53:28 -05:00
parent c764f757d5
commit bdfd4e3106
1 changed files with 38 additions and 14 deletions

View File

@ -399,16 +399,19 @@ extern char *rs6000_cpu_string;
: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
On RS/6000, the cpu registers can hold any mode but the float registers For POWER and PowerPC, the GPRs can hold any mode, but the float
can hold only floating modes and CR register can only hold CC modes. We registers only can hold floating modes and DImode, and CR register only
cannot put DImode or TImode anywhere except general register and they can hold CC modes. We cannot put TImode anywhere except general
must be able to fit within the register set. */ register and it must be able to fit within the register set. */
#define HARD_REGNO_MODE_OK(REGNO, MODE) \ #define HARD_REGNO_MODE_OK(REGNO, MODE) \
(FP_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_FLOAT \ (FP_REGNO_P (REGNO) ? \
(GET_MODE_CLASS (MODE) == MODE_FLOAT \
|| (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) == 2 * UNITS_PER_WORD)) \
: CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
: ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
: 1) : 1)
/* Value is 1 if it is a good idea to tie two pseudo registers /* Value is 1 if it is a good idea to tie two pseudo registers
@ -465,8 +468,7 @@ extern char *rs6000_cpu_string;
/* Define this macro to change register usage conditional on target flags. /* Define this macro to change register usage conditional on target flags.
Set MQ register fixed (already call_used) if not POWER architecture Set MQ register fixed (already call_used) if not POWER architecture
(RIOS1, RIOS2, and PPC601) so that it will not be allocated. (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated. */
Provide alternate register names for ppcas assembler */
#define CONDITIONAL_REGISTER_USAGE \ #define CONDITIONAL_REGISTER_USAGE \
if (!TARGET_POWER) \ if (!TARGET_POWER) \
@ -1402,10 +1404,21 @@ struct rs6000_args {int words, fregno, nargs_prototype; };
#define RTX_COSTS(X,CODE,OUTER_CODE) \ #define RTX_COSTS(X,CODE,OUTER_CODE) \
case MULT: \ case MULT: \
return (GET_CODE (XEXP (X, 1)) != CONST_INT \ switch (rs6000_cpu) \
? COSTS_N_INSNS (5) \ { \
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \ case PROCESSOR_RIOS1: \
? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \ return (GET_CODE (XEXP (X, 1)) != CONST_INT \
? COSTS_N_INSNS (5) \
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
case PROCESSOR_RIOS2: \
return COSTS_N_INSNS (2); \
case PROCESSOR_PPC601: \
case PROCESSOR_PPC603: \
case PROCESSOR_PPC604: \
case PROCESSOR_PPC620: \
return COSTS_N_INSNS (5); \
} \
case DIV: \ case DIV: \
case MOD: \ case MOD: \
if (GET_CODE (XEXP (X, 1)) == CONST_INT \ if (GET_CODE (XEXP (X, 1)) == CONST_INT \
@ -1414,7 +1427,18 @@ struct rs6000_args {int words, fregno, nargs_prototype; };
/* otherwise fall through to normal divide. */ \ /* otherwise fall through to normal divide. */ \
case UDIV: \ case UDIV: \
case UMOD: \ case UMOD: \
return COSTS_N_INSNS (19); \ switch (rs6000_cpu) \
{ \
case PROCESSOR_RIOS1: \
return COSTS_N_INSNS (19); \
case PROCESSOR_RIOS2: \
return COSTS_N_INSNS (13); \
case PROCESSOR_PPC601: \
case PROCESSOR_PPC603: \
case PROCESSOR_PPC604: \
case PROCESSOR_PPC620: \
return COSTS_N_INSNS (36); \
} \
case MEM: \ case MEM: \
/* MEM should be slightly more expensive than (plus (reg) (const)) */ \ /* MEM should be slightly more expensive than (plus (reg) (const)) */ \
return 5; return 5;