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rs6000-builtin.def: (LVSL... 

[gcc]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
	* config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX,
	LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI,
	LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI,
	LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI,
	LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI,
	LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF,
	LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI,
	LD_ELEMREV_V16QI): Use the PURE attribute.

[testsuite]

2019-09-26  Will Schmidt <will_schmidt@vnet.ibm.com>
	* gcc.target/powerpc/pure-builtin-redundant-load.c:  New.

From-SVN: r276162
This commit is contained in:
Will Schmidt 2019-09-26 19:19:10 +00:00 committed by Will Schmidt
parent 4fc1d2629a
commit be193fa7c9
3 changed files with 55 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
gcc/ChangeLog
View File

@ -1,3 +1,14 @@
2019-09-26 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000-builtin.def: (LVSL, LVSR, LVEBX, LVEHX,
LVEWX, LVXL, LVXL_V2DF, LVXL_V2DI, LVXL_V4SF, LVXL_V4SI, LVXL_V8HI,
LVXL_V16QI, LVX, LVX_V1TI, LVX_V2DF, LVX_V2DI, LVX_V4SF, LVX_V4SI,
LVX_V8HI, LVX_V16QI, LVLX, LVLXL, LVRX, LVRXL, LXSDX, LXVD2X_V1TI,
LXVD2X_V2DF, LXVD2X_V2DI, LXVDSX, LXVW4X_V4SF, LXVW4X_V4SI,
LXVW4X_V8HI, LXVW4X_V16QI, LD_ELEMREV_V1TI, LD_ELEMREV_V2DF,
LD_ELEMREV_V2DI, LD_ELEMREV_V4SF, LD_ELEMREV_V4SI, LD_ELEMREV_V8HI,
LD_ELEMREV_V16QI): Use the PURE attribute.
2019-09-26 Iain Sandoe <iain@sandoe.co.uk>
* config/rs6000/darwin.md: Replace the expanders for

80
gcc/config/rs6000/rs6000-builtin.def
View File

@ -1177,26 +1177,26 @@ BU_ALTIVEC_X (MTVSCR, "mtvscr", MISC)
BU_ALTIVEC_X (MFVSCR, "mfvscr", MISC)
BU_ALTIVEC_X (DSSALL, "dssall", MISC)
BU_ALTIVEC_X (DSS, "dss", MISC)
BU_ALTIVEC_X (LVSL, "lvsl", MEM)
BU_ALTIVEC_X (LVSR, "lvsr", MEM)
BU_ALTIVEC_X (LVEBX, "lvebx", MEM)
BU_ALTIVEC_X (LVEHX, "lvehx", MEM)
BU_ALTIVEC_X (LVEWX, "lvewx", MEM)
BU_ALTIVEC_X (LVXL, "lvxl", MEM)
BU_ALTIVEC_X (LVXL_V2DF, "lvxl_v2df", MEM)
BU_ALTIVEC_X (LVXL_V2DI, "lvxl_v2di", MEM)
BU_ALTIVEC_X (LVXL_V4SF, "lvxl_v4sf", MEM)
BU_ALTIVEC_X (LVXL_V4SI, "lvxl_v4si", MEM)
BU_ALTIVEC_X (LVXL_V8HI, "lvxl_v8hi", MEM)
BU_ALTIVEC_X (LVXL_V16QI, "lvxl_v16qi", MEM)
BU_ALTIVEC_X (LVX, "lvx", MEM)
BU_ALTIVEC_X (LVX_V1TI, "lvx_v1ti", MEM)
BU_ALTIVEC_X (LVX_V2DF, "lvx_v2df", MEM)
BU_ALTIVEC_X (LVX_V2DI, "lvx_v2di", MEM)
BU_ALTIVEC_X (LVX_V4SF, "lvx_v4sf", MEM)
BU_ALTIVEC_X (LVX_V4SI, "lvx_v4si", MEM)
BU_ALTIVEC_X (LVX_V8HI, "lvx_v8hi", MEM)
BU_ALTIVEC_X (LVX_V16QI, "lvx_v16qi", MEM)
BU_ALTIVEC_X (LVSL, "lvsl", PURE)
BU_ALTIVEC_X (LVSR, "lvsr", PURE)
BU_ALTIVEC_X (LVEBX, "lvebx", PURE)
BU_ALTIVEC_X (LVEHX, "lvehx", PURE)
BU_ALTIVEC_X (LVEWX, "lvewx", PURE)
BU_ALTIVEC_X (LVXL, "lvxl", PURE)
BU_ALTIVEC_X (LVXL_V2DF, "lvxl_v2df", PURE)
BU_ALTIVEC_X (LVXL_V2DI, "lvxl_v2di", PURE)
BU_ALTIVEC_X (LVXL_V4SF, "lvxl_v4sf", PURE)
BU_ALTIVEC_X (LVXL_V4SI, "lvxl_v4si", PURE)
BU_ALTIVEC_X (LVXL_V8HI, "lvxl_v8hi", PURE)
BU_ALTIVEC_X (LVXL_V16QI, "lvxl_v16qi", PURE)
BU_ALTIVEC_X (LVX, "lvx", PURE)
BU_ALTIVEC_X (LVX_V1TI, "lvx_v1ti", PURE)
BU_ALTIVEC_X (LVX_V2DF, "lvx_v2df", PURE)
BU_ALTIVEC_X (LVX_V2DI, "lvx_v2di", PURE)
BU_ALTIVEC_X (LVX_V4SF, "lvx_v4sf", PURE)
BU_ALTIVEC_X (LVX_V4SI, "lvx_v4si", PURE)
BU_ALTIVEC_X (LVX_V8HI, "lvx_v8hi", PURE)
BU_ALTIVEC_X (LVX_V16QI, "lvx_v16qi", PURE)
BU_ALTIVEC_X (STVX, "stvx", MEM)
BU_ALTIVEC_X (STVX_V2DF, "stvx_v2df", MEM)
BU_ALTIVEC_X (STVX_V2DI, "stvx_v2di", MEM)
@ -1204,10 +1204,10 @@ BU_ALTIVEC_X (STVX_V4SF, "stvx_v4sf", MEM)
BU_ALTIVEC_X (STVX_V4SI, "stvx_v4si", MEM)
BU_ALTIVEC_X (STVX_V8HI, "stvx_v8hi", MEM)
BU_ALTIVEC_X (STVX_V16QI, "stvx_v16qi", MEM)
BU_ALTIVEC_C (LVLX, "lvlx", MEM)
BU_ALTIVEC_C (LVLXL, "lvlxl", MEM)
BU_ALTIVEC_C (LVRX, "lvrx", MEM)
BU_ALTIVEC_C (LVRXL, "lvrxl", MEM)
BU_ALTIVEC_C (LVLX, "lvlx", PURE)
BU_ALTIVEC_C (LVLXL, "lvlxl", PURE)
BU_ALTIVEC_C (LVRX, "lvrx", PURE)
BU_ALTIVEC_C (LVRXL, "lvrxl", PURE)
BU_ALTIVEC_X (STVEBX, "stvebx", MEM)
BU_ALTIVEC_X (STVEHX, "stvehx", MEM)
BU_ALTIVEC_X (STVEWX, "stvewx", MEM)
@ -1718,15 +1718,15 @@ BU_VSX_P (XVCMPGEDP_P, "xvcmpgedp_p", CONST, vector_ge_v2df_p)
BU_VSX_P (XVCMPGTDP_P, "xvcmpgtdp_p", CONST, vector_gt_v2df_p)
/* VSX builtins that are handled as special cases. */
BU_VSX_X (LXSDX, "lxsdx", MEM)
BU_VSX_X (LXVD2X_V1TI, "lxvd2x_v1ti", MEM)
BU_VSX_X (LXVD2X_V2DF, "lxvd2x_v2df", MEM)
BU_VSX_X (LXVD2X_V2DI, "lxvd2x_v2di", MEM)
BU_VSX_X (LXVDSX, "lxvdsx", MEM)
BU_VSX_X (LXVW4X_V4SF, "lxvw4x_v4sf", MEM)
BU_VSX_X (LXVW4X_V4SI, "lxvw4x_v4si", MEM)
BU_VSX_X (LXVW4X_V8HI, "lxvw4x_v8hi", MEM)
BU_VSX_X (LXVW4X_V16QI, "lxvw4x_v16qi", MEM)
BU_VSX_X (LXSDX, "lxsdx", PURE)
BU_VSX_X (LXVD2X_V1TI, "lxvd2x_v1ti", PURE)
BU_VSX_X (LXVD2X_V2DF, "lxvd2x_v2df", PURE)
BU_VSX_X (LXVD2X_V2DI, "lxvd2x_v2di", PURE)
BU_VSX_X (LXVDSX, "lxvdsx", PURE)
BU_VSX_X (LXVW4X_V4SF, "lxvw4x_v4sf", PURE)
BU_VSX_X (LXVW4X_V4SI, "lxvw4x_v4si", PURE)
BU_VSX_X (LXVW4X_V8HI, "lxvw4x_v8hi", PURE)
BU_VSX_X (LXVW4X_V16QI, "lxvw4x_v16qi", PURE)
BU_VSX_X (STXSDX, "stxsdx", MEM)
BU_VSX_X (STXVD2X_V1TI, "stxvd2x_v1ti", MEM)
BU_VSX_X (STXVD2X_V2DF, "stxvd2x_v2df", MEM)
@ -1735,13 +1735,13 @@ BU_VSX_X (STXVW4X_V4SF, "stxvw4x_v4sf", MEM)
BU_VSX_X (STXVW4X_V4SI, "stxvw4x_v4si", MEM)
BU_VSX_X (STXVW4X_V8HI, "stxvw4x_v8hi", MEM)
BU_VSX_X (STXVW4X_V16QI, "stxvw4x_v16qi", MEM)
BU_VSX_X (LD_ELEMREV_V1TI, "ld_elemrev_v1ti", MEM)
BU_VSX_X (LD_ELEMREV_V2DF, "ld_elemrev_v2df", MEM)
BU_VSX_X (LD_ELEMREV_V2DI, "ld_elemrev_v2di", MEM)
BU_VSX_X (LD_ELEMREV_V4SF, "ld_elemrev_v4sf", MEM)
BU_VSX_X (LD_ELEMREV_V4SI, "ld_elemrev_v4si", MEM)
BU_VSX_X (LD_ELEMREV_V8HI, "ld_elemrev_v8hi", MEM)
BU_VSX_X (LD_ELEMREV_V16QI, "ld_elemrev_v16qi", MEM)
BU_VSX_X (LD_ELEMREV_V1TI, "ld_elemrev_v1ti", PURE)
BU_VSX_X (LD_ELEMREV_V2DF, "ld_elemrev_v2df", PURE)
BU_VSX_X (LD_ELEMREV_V2DI, "ld_elemrev_v2di", PURE)
BU_VSX_X (LD_ELEMREV_V4SF, "ld_elemrev_v4sf", PURE)
BU_VSX_X (LD_ELEMREV_V4SI, "ld_elemrev_v4si", PURE)
BU_VSX_X (LD_ELEMREV_V8HI, "ld_elemrev_v8hi", PURE)
BU_VSX_X (LD_ELEMREV_V16QI, "ld_elemrev_v16qi", PURE)
BU_VSX_X (ST_ELEMREV_V1TI, "st_elemrev_v1ti", MEM)
BU_VSX_X (ST_ELEMREV_V2DF, "st_elemrev_v2df", MEM)
BU_VSX_X (ST_ELEMREV_V2DI, "st_elemrev_v2di", MEM)

4
gcc/testsuite/ChangeLog
View File

@ -1,3 +1,7 @@
2019-09-26 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/pure-builtin-redundant-load.c: New.
2019-09-26 Richard Biener <rguenther@suse.de>
PR middle-end/91897