diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 60d2990a6a6..58a742c0c28 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2004-01-27  Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+	* config/sparc/sparc.c (function_arg_pass_by_reference): Return 1
+	for SCmode and DCmode if ARCH32.
+	(sparc_va_arg): Handle SCmode and DCmode by reference if ARCH32.
+	* config/sparc/sparc.h (RETURN_IN_MEMORY): Return 0 for TCmode
+	if ARCH32.
+	(BASE_RETURN_VALUE_REG): Return 32 for all FP modes except TFmode
+	if ARCH32.
+	(BASE_OUTGOING_VALUE_REG): Likewise.
+
 2004-01-27  Eric Botcazou  <ebotcazou@libertysurf.fr>
 
 	PR target/10904
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index b732e7ae706..e1e37eec0b9 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -5591,7 +5591,10 @@ function_arg_pass_by_reference (const struct sparc_args *cum ATTRIBUTE_UNUSED,
   if (TARGET_ARCH32)
     {
       return ((type && AGGREGATE_TYPE_P (type))
-	      || mode == TFmode || mode == TCmode);
+	      || mode == TFmode
+	      || mode == SCmode
+	      || mode == DCmode
+	      || mode == TCmode);
     }
   else
     {
@@ -5803,6 +5806,8 @@ sparc_va_arg (tree valist, tree type)
     {
       if (AGGREGATE_TYPE_P (type)
 	  || TYPE_MODE (type) == TFmode
+	  || TYPE_MODE (type) == SCmode
+	  || TYPE_MODE (type) == DCmode
 	  || TYPE_MODE (type) == TCmode)
 	{
 	  indirect = 1;
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index eeab3c6a7fd..364bea099e3 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1157,8 +1157,7 @@ extern int sparc_mode_class[];
 #define RETURN_IN_MEMORY(TYPE)				\
 (TARGET_ARCH32						\
  ? (TYPE_MODE (TYPE) == BLKmode				\
-    || TYPE_MODE (TYPE) == TFmode			\
-    || TYPE_MODE (TYPE) == TCmode)			\
+    || TYPE_MODE (TYPE) == TFmode)			\
  : (TYPE_MODE (TYPE) == BLKmode				\
     && (unsigned HOST_WIDE_INT) int_size_in_bytes (TYPE) > 32))
 
@@ -1671,13 +1670,13 @@ extern char leaf_reg_remap[];
 #define BASE_RETURN_VALUE_REG(MODE)					\
   (TARGET_ARCH64							\
    ? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32 : 8)			\
-   : (((MODE) == SFmode || (MODE) == DFmode) && TARGET_FPU ? 32 : 8))
+   : (TARGET_FPU && FLOAT_MODE_P (MODE) && (MODE) != TFmode ? 32 : 8))
 
 #define BASE_OUTGOING_VALUE_REG(MODE)				\
   (TARGET_ARCH64						\
    ? (TARGET_FPU && FLOAT_MODE_P (MODE) ? 32			\
       : TARGET_FLAT ? 8 : 24)					\
-   : (((MODE) == SFmode || (MODE) == DFmode) && TARGET_FPU ? 32	\
+   : (TARGET_FPU && FLOAT_MODE_P (MODE) && (MODE) != TFmode ? 32\
       : (TARGET_FLAT ? 8 : 24)))
 
 #define BASE_PASSING_ARG_REG(MODE)				\