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[PR99581] Use relaxed memory for more aarch64 memory constraints 

The original patch for PR99581 resulted in GCC testsuite regression as
some constraints were not declared as relaxed memory ones.  This patch
fixes this.

gcc/ChangeLog:

	PR target/99581
	* config/aarch64/constraints.md (Utq, UOb, UOh, UOw, UOd, UOty):
	Use define_relaxed_memory_constraint for them.
This commit is contained in:
Vladimir N. Makarov 2021-03-23 17:51:21 -04:00
parent e5c2ac584a
commit be70bb5e4b
1 changed files with 6 additions and 6 deletions
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12
gcc/config/aarch64/constraints.md
View File

@ -323,7 +323,7 @@
(and (match_code "mem")
(match_test "aarch64_simd_mem_operand_p (op)")))
(define_memory_constraint "Utq"
(define_relaxed_memory_constraint "Utq"
"@internal
An address valid for loading or storing a 128-bit AdvSIMD register"
(and (match_code "mem")
@ -336,32 +336,32 @@
(and (match_code "mem")
(match_test "aarch64_sve_ld1rq_operand_p (op)")))
(define_memory_constraint "UOb"
(define_relaxed_memory_constraint "UOb"
"@internal
An address valid for SVE LD1ROH."
(and (match_code "mem")
(match_test "aarch64_sve_ld1ro_operand_p (op, QImode)")))
(define_memory_constraint "UOh"
(define_relaxed_memory_constraint "UOh"
"@internal
An address valid for SVE LD1ROH."
(and (match_code "mem")
(match_test "aarch64_sve_ld1ro_operand_p (op, HImode)")))
(define_memory_constraint "UOw"
(define_relaxed_memory_constraint "UOw"
"@internal
An address valid for SVE LD1ROW."
(and (match_code "mem")
(match_test "aarch64_sve_ld1ro_operand_p (op, SImode)")))
(define_memory_constraint "UOd"
(define_relaxed_memory_constraint "UOd"
"@internal
An address valid for SVE LD1ROD."
(and (match_code "mem")
(match_test "aarch64_sve_ld1ro_operand_p (op, DImode)")))
(define_memory_constraint "Uty"
(define_relaxed_memory_constraint "Uty"
"@internal
An address valid for SVE LD1Rs."
(and (match_code "mem")