re PR target/61098 (Poor code setting count register for large loops)
PR target/61098 * config/rs6000/rs6000.c (rs6000_emit_set_const): Remove unneeded params and return a bool. Remove dead code. Update comment. Assert we have a const_int source. Remove bogus code from 32-bit HWI days. Move !TARGET_POWERPC64 handling, and correct handling of constants > 2G and reg_equal note, from.. (rs6000_emit_set_long_const): ..here. Remove unneeded param and return value. Update comment. If we can, use a new pseudo for intermediate calculations. * config/rs6000/rs6000-protos.h (rs6000_emit_set_const): Update prototype. * config/rs6000/rs6000.md (movsi_internal1_single+1): Update call to rs6000_emit_set_const in splitter. (movdi_internal64+2, +3): Likewise. From-SVN: r210932
This commit is contained in:
parent
a9243bfced
commit
bfe51f424a
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@ -1,3 +1,20 @@
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2014-05-26 Alan Modra <amodra@gmail.com>
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PR target/61098
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* config/rs6000/rs6000.c (rs6000_emit_set_const): Remove unneeded
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params and return a bool. Remove dead code. Update comment.
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Assert we have a const_int source. Remove bogus code from
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32-bit HWI days. Move !TARGET_POWERPC64 handling, and correct
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handling of constants > 2G and reg_equal note, from..
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(rs6000_emit_set_long_const): ..here. Remove unneeded param and
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return value. Update comment. If we can, use a new pseudo
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for intermediate calculations.
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* config/rs6000/rs6000-protos.h (rs6000_emit_set_const): Update
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prototype.
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* config/rs6000/rs6000.md (movsi_internal1_single+1): Update
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call to rs6000_emit_set_const in splitter.
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(movdi_internal64+2, +3): Likewise.
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2014-05-26 Richard Biener <rguenther@suse.de>
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* system.h: Define __STDC_FORMAT_MACROS before
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@ -114,7 +114,7 @@ extern void rs6000_emit_cbranch (enum machine_mode, rtx[]);
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extern char * output_cbranch (rtx, const char *, int, rtx);
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extern char * output_e500_flip_gt_bit (rtx, rtx);
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extern const char * output_probe_stack_range (rtx, rtx);
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extern rtx rs6000_emit_set_const (rtx, enum machine_mode, rtx, int);
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extern bool rs6000_emit_set_const (rtx, rtx);
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extern int rs6000_emit_cmove (rtx, rtx, rtx, rtx);
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extern int rs6000_emit_vector_cond_expr (rtx, rtx, rtx, rtx, rtx, rtx);
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extern void rs6000_emit_minmax (rtx, enum rtx_code, rtx, rtx);
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@ -1068,7 +1068,7 @@ static tree rs6000_handle_longcall_attribute (tree *, tree, tree, int, bool *);
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static tree rs6000_handle_altivec_attribute (tree *, tree, tree, int, bool *);
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static tree rs6000_handle_struct_attribute (tree *, tree, tree, int, bool *);
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static tree rs6000_builtin_vectorized_libmass (tree, tree, tree);
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static rtx rs6000_emit_set_long_const (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
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static void rs6000_emit_set_long_const (rtx, HOST_WIDE_INT);
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static int rs6000_memory_move_cost (enum machine_mode, reg_class_t, bool);
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static bool rs6000_debug_rtx_costs (rtx, int, int, int, int *, bool);
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static int rs6000_debug_address_cost (rtx, enum machine_mode, addr_space_t,
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@ -7849,53 +7849,50 @@ rs6000_conditional_register_usage (void)
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}
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/* Try to output insns to set TARGET equal to the constant C if it can
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be done in less than N insns. Do all computations in MODE.
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Returns the place where the output has been placed if it can be
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done and the insns have been emitted. If it would take more than N
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insns, zero is returned and no insns and emitted. */
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/* Output insns to set DEST equal to the constant SOURCE as a series of
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lis, ori and shl instructions and return TRUE. */
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rtx
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rs6000_emit_set_const (rtx dest, enum machine_mode mode,
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rtx source, int n ATTRIBUTE_UNUSED)
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bool
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rs6000_emit_set_const (rtx dest, rtx source)
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{
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rtx result, insn, set;
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HOST_WIDE_INT c0, c1;
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enum machine_mode mode = GET_MODE (dest);
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rtx temp, insn, set;
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HOST_WIDE_INT c;
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gcc_checking_assert (CONST_INT_P (source));
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c = INTVAL (source);
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switch (mode)
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{
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case QImode:
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case QImode:
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case HImode:
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if (dest == NULL)
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dest = gen_reg_rtx (mode);
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emit_insn (gen_rtx_SET (VOIDmode, dest, source));
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return dest;
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return true;
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case SImode:
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result = !can_create_pseudo_p () ? dest : gen_reg_rtx (SImode);
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temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (SImode);
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emit_insn (gen_rtx_SET (VOIDmode, copy_rtx (result),
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GEN_INT (INTVAL (source)
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& (~ (HOST_WIDE_INT) 0xffff))));
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emit_insn (gen_rtx_SET (VOIDmode, copy_rtx (temp),
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GEN_INT (c & ~(HOST_WIDE_INT) 0xffff)));
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emit_insn (gen_rtx_SET (VOIDmode, dest,
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gen_rtx_IOR (SImode, copy_rtx (result),
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GEN_INT (INTVAL (source) & 0xffff))));
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result = dest;
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gen_rtx_IOR (SImode, copy_rtx (temp),
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GEN_INT (c & 0xffff))));
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break;
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case DImode:
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switch (GET_CODE (source))
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if (!TARGET_POWERPC64)
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{
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case CONST_INT:
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c0 = INTVAL (source);
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c1 = -(c0 < 0);
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break;
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rtx hi, lo;
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default:
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gcc_unreachable ();
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hi = operand_subword_force (copy_rtx (dest), WORDS_BIG_ENDIAN == 0,
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DImode);
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lo = operand_subword_force (dest, WORDS_BIG_ENDIAN != 0,
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DImode);
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emit_move_insn (hi, GEN_INT (c >> 32));
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c = ((c & 0xffffffff) ^ 0x80000000) - 0x80000000;
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emit_move_insn (lo, GEN_INT (c));
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}
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result = rs6000_emit_set_long_const (dest, c0, c1);
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else
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rs6000_emit_set_long_const (dest, c);
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break;
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default:
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@ -7905,107 +7902,103 @@ rs6000_emit_set_const (rtx dest, enum machine_mode mode,
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insn = get_last_insn ();
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set = single_set (insn);
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if (! CONSTANT_P (SET_SRC (set)))
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set_unique_reg_note (insn, REG_EQUAL, source);
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set_unique_reg_note (insn, REG_EQUAL, GEN_INT (c));
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return result;
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return true;
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}
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/* Having failed to find a 3 insn sequence in rs6000_emit_set_const,
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fall back to a straight forward decomposition. We do this to avoid
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exponential run times encountered when looking for longer sequences
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with rs6000_emit_set_const. */
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static rtx
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rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c1, HOST_WIDE_INT c2)
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{
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if (!TARGET_POWERPC64)
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{
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rtx operand1, operand2;
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/* Subroutine of rs6000_emit_set_const, handling PowerPC64 DImode.
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Output insns to set DEST equal to the constant C as a series of
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lis, ori and shl instructions. */
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operand1 = operand_subword_force (dest, WORDS_BIG_ENDIAN == 0,
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DImode);
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operand2 = operand_subword_force (copy_rtx (dest), WORDS_BIG_ENDIAN != 0,
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DImode);
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emit_move_insn (operand1, GEN_INT (c1));
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emit_move_insn (operand2, GEN_INT (c2));
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static void
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rs6000_emit_set_long_const (rtx dest, HOST_WIDE_INT c)
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{
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rtx temp;
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HOST_WIDE_INT ud1, ud2, ud3, ud4;
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ud1 = c & 0xffff;
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c = c >> 16;
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ud2 = c & 0xffff;
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c = c >> 16;
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ud3 = c & 0xffff;
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c = c >> 16;
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ud4 = c & 0xffff;
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if ((ud4 == 0xffff && ud3 == 0xffff && ud2 == 0xffff && (ud1 & 0x8000))
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|| (ud4 == 0 && ud3 == 0 && ud2 == 0 && ! (ud1 & 0x8000)))
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emit_move_insn (dest, GEN_INT ((ud1 ^ 0x8000) - 0x8000));
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else if ((ud4 == 0xffff && ud3 == 0xffff && (ud2 & 0x8000))
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|| (ud4 == 0 && ud3 == 0 && ! (ud2 & 0x8000)))
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{
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temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
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emit_move_insn (ud1 != 0 ? copy_rtx (temp) : dest,
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GEN_INT (((ud2 << 16) ^ 0x80000000) - 0x80000000));
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if (ud1 != 0)
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emit_move_insn (dest,
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gen_rtx_IOR (DImode, copy_rtx (temp),
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GEN_INT (ud1)));
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}
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else if (ud3 == 0 && ud4 == 0)
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{
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temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
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gcc_assert (ud2 & 0x8000);
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emit_move_insn (copy_rtx (temp),
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GEN_INT (((ud2 << 16) ^ 0x80000000) - 0x80000000));
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if (ud1 != 0)
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emit_move_insn (copy_rtx (temp),
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gen_rtx_IOR (DImode, copy_rtx (temp),
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GEN_INT (ud1)));
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emit_move_insn (dest,
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gen_rtx_ZERO_EXTEND (DImode,
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gen_lowpart (SImode,
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copy_rtx (temp))));
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}
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else if ((ud4 == 0xffff && (ud3 & 0x8000))
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|| (ud4 == 0 && ! (ud3 & 0x8000)))
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{
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temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
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emit_move_insn (copy_rtx (temp),
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GEN_INT (((ud3 << 16) ^ 0x80000000) - 0x80000000));
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if (ud2 != 0)
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emit_move_insn (copy_rtx (temp),
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gen_rtx_IOR (DImode, copy_rtx (temp),
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GEN_INT (ud2)));
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emit_move_insn (ud1 != 0 ? copy_rtx (temp) : dest,
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gen_rtx_ASHIFT (DImode, copy_rtx (temp),
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GEN_INT (16)));
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if (ud1 != 0)
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emit_move_insn (dest,
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gen_rtx_IOR (DImode, copy_rtx (temp),
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GEN_INT (ud1)));
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}
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else
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{
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HOST_WIDE_INT ud1, ud2, ud3, ud4;
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temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
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ud1 = c1 & 0xffff;
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ud2 = (c1 & 0xffff0000) >> 16;
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c2 = c1 >> 32;
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ud3 = c2 & 0xffff;
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ud4 = (c2 & 0xffff0000) >> 16;
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emit_move_insn (copy_rtx (temp),
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GEN_INT (((ud4 << 16) ^ 0x80000000) - 0x80000000));
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if (ud3 != 0)
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emit_move_insn (copy_rtx (temp),
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gen_rtx_IOR (DImode, copy_rtx (temp),
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GEN_INT (ud3)));
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if ((ud4 == 0xffff && ud3 == 0xffff && ud2 == 0xffff && (ud1 & 0x8000))
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|| (ud4 == 0 && ud3 == 0 && ud2 == 0 && ! (ud1 & 0x8000)))
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emit_move_insn (dest, GEN_INT ((ud1 ^ 0x8000) - 0x8000));
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else if ((ud4 == 0xffff && ud3 == 0xffff && (ud2 & 0x8000))
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|| (ud4 == 0 && ud3 == 0 && ! (ud2 & 0x8000)))
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{
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emit_move_insn (dest, GEN_INT (((ud2 << 16) ^ 0x80000000)
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- 0x80000000));
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if (ud1 != 0)
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emit_move_insn (copy_rtx (dest),
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gen_rtx_IOR (DImode, copy_rtx (dest),
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GEN_INT (ud1)));
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}
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else if (ud3 == 0 && ud4 == 0)
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{
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gcc_assert (ud2 & 0x8000);
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emit_move_insn (dest, GEN_INT (((ud2 << 16) ^ 0x80000000)
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- 0x80000000));
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if (ud1 != 0)
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emit_move_insn (copy_rtx (dest),
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gen_rtx_IOR (DImode, copy_rtx (dest),
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GEN_INT (ud1)));
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emit_move_insn (copy_rtx (dest),
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gen_rtx_ZERO_EXTEND (DImode,
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gen_lowpart (SImode,
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copy_rtx (dest))));
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}
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else if ((ud4 == 0xffff && (ud3 & 0x8000))
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|| (ud4 == 0 && ! (ud3 & 0x8000)))
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{
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emit_move_insn (dest, GEN_INT (((ud3 << 16) ^ 0x80000000)
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- 0x80000000));
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if (ud2 != 0)
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emit_move_insn (copy_rtx (dest),
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gen_rtx_IOR (DImode, copy_rtx (dest),
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GEN_INT (ud2)));
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emit_move_insn (copy_rtx (dest),
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gen_rtx_ASHIFT (DImode, copy_rtx (dest),
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GEN_INT (16)));
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if (ud1 != 0)
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emit_move_insn (copy_rtx (dest),
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gen_rtx_IOR (DImode, copy_rtx (dest),
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GEN_INT (ud1)));
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}
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else
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{
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emit_move_insn (dest, GEN_INT (((ud4 << 16) ^ 0x80000000)
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- 0x80000000));
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if (ud3 != 0)
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emit_move_insn (copy_rtx (dest),
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gen_rtx_IOR (DImode, copy_rtx (dest),
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GEN_INT (ud3)));
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emit_move_insn (copy_rtx (dest),
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gen_rtx_ASHIFT (DImode, copy_rtx (dest),
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GEN_INT (32)));
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if (ud2 != 0)
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emit_move_insn (copy_rtx (dest),
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gen_rtx_IOR (DImode, copy_rtx (dest),
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GEN_INT (ud2 << 16)));
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if (ud1 != 0)
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emit_move_insn (copy_rtx (dest),
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gen_rtx_IOR (DImode, copy_rtx (dest),
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GEN_INT (ud1)));
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}
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emit_move_insn (ud2 != 0 || ud1 != 0 ? copy_rtx (temp) : dest,
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gen_rtx_ASHIFT (DImode, copy_rtx (temp),
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GEN_INT (32)));
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if (ud2 != 0)
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emit_move_insn (ud1 != 0 ? copy_rtx (temp) : dest,
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gen_rtx_IOR (DImode, copy_rtx (temp),
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GEN_INT (ud2 << 16)));
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if (ud1 != 0)
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emit_move_insn (dest,
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gen_rtx_IOR (DImode, copy_rtx (temp),
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GEN_INT (ud1)));
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}
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return dest;
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}
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/* Helper for the following. Get rid of [r+r] memory refs
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@ -9064,9 +9064,8 @@
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(ior:SI (match_dup 0)
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(match_dup 3)))]
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"
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{ rtx tem = rs6000_emit_set_const (operands[0], SImode, operands[1], 2);
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if (tem == operands[0])
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{
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if (rs6000_emit_set_const (operands[0], operands[1]))
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DONE;
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else
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FAIL;
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@ -10137,9 +10136,8 @@
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[(set (match_dup 0) (match_dup 2))
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(set (match_dup 0) (plus:DI (match_dup 0) (match_dup 3)))]
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"
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{ rtx tem = rs6000_emit_set_const (operands[0], DImode, operands[1], 5);
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if (tem == operands[0])
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{
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if (rs6000_emit_set_const (operands[0], operands[1]))
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DONE;
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else
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FAIL;
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@ -10152,9 +10150,8 @@
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[(set (match_dup 0) (match_dup 2))
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(set (match_dup 0) (plus:DI (match_dup 0) (match_dup 3)))]
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"
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{ rtx tem = rs6000_emit_set_const (operands[0], DImode, operands[1], 5);
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if (tem == operands[0])
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{
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if (rs6000_emit_set_const (operands[0], operands[1]))
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DONE;
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else
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FAIL;
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