diff --git a/gcc/config/a29k/a29k.md b/gcc/config/a29k/a29k.md index a44063b59a1..cdf595bde14 100644 --- a/gcc/config/a29k/a29k.md +++ b/gcc/config/a29k/a29k.md @@ -1773,15 +1773,14 @@ { rtx general = gen_reg_rtx (SImode); rtx bp = gen_reg_rtx (PSImode); - - if (TARGET_BYTE_WRITES) - emit_insn (gen_storehihww (XEXP (operands[0], 0), - gen_lowpart (SImode, operands[1]), - general, bp)); - else - emit_insn (gen_storehinhww (XEXP (operands[0], 0), - gen_lowpart (SImode, operands[1]), - general, bp)); + rtx (*fcn) () + = TARGET_BYTE_WRITES ? gen_storehihww : gen_storehinhww; + rtx seq = (*fcn) (XEXP (operands[0], 0), + gen_lowpart (SImode, operands[1]), + general, bp); + + a29k_set_memflags (seq, operands[0]); + emit_insn (seq); DONE; } } @@ -1791,9 +1790,11 @@ { rtx general = gen_reg_rtx (SImode); rtx bp = gen_reg_rtx (PSImode); + rtx seq = gen_loadqi (gen_lowpart (SImode, operands[0]), + XEXP (operands[1], 0), general, bp); - emit_insn (gen_loadqi (gen_lowpart (SImode, operands[0]), - XEXP (operands[1], 0), general, bp)); + a29k_set_memflags (seq, operands[1]); + emit_insn (seq); DONE; } } @@ -1805,10 +1806,13 @@ (match_operand:PSI 2 "register_operand" "=b")])] "! TARGET_DW_ENABLE" " -{ emit_insn (gen_loadhi (gen_lowpart (SImode, operands[0]), - a29k_get_reloaded_address (operands[1]), - gen_rtx (REG, SImode, R_TAV), - operands[2])); +{ rtx seq = gen_loadhi (gen_lowpart (SImode, operands[0]), + a29k_get_reloaded_address (operands[1]), + gen_rtx (REG, SImode, R_TAV), + operands[2]); + + a29k_set_memflags (seq, operands[1]); + emit_insn (seq); DONE; }") @@ -1818,16 +1822,13 @@ (match_operand:PSI 2 "register_operand" "=b")])] "! TARGET_DW_ENABLE" " -{ if (TARGET_BYTE_WRITES) - emit_insn (gen_storehihww (a29k_get_reloaded_address (operands[0]), - gen_lowpart (SImode, operands[1]), - gen_rtx (REG, SImode, R_TAV), - operands[2])); - else - emit_insn (gen_storehinhww (a29k_get_reloaded_address (operands[0]), - gen_lowpart (SImode, operands[1]), - gen_rtx (REG, SImode, R_TAV), - operands[2])); +{ rtx (*fcn) () = TARGET_BYTE_WRITES ? gen_storehihww : gen_storehinhww; + rtx seq = (*fcn) (a29k_get_reloaded_address (operands[0]), + gen_lowpart (SImode, operands[1]), + gen_rtx (REG, SImode, R_TAV), operands[2]); + + a29k_set_memflags (seq, operands[0]); + emit_insn (seq); DONE; }") @@ -1902,16 +1903,14 @@ { rtx general = gen_reg_rtx (SImode); rtx bp = gen_reg_rtx (PSImode); - - if (TARGET_BYTE_WRITES) - emit_insn (gen_storeqihww (XEXP (operands[0], 0), - gen_lowpart (SImode, operands[1]), - general, bp)); - else - emit_insn (gen_storeqinhww (XEXP (operands[0], 0), - gen_lowpart (SImode, operands[1]), - general, bp)); - DONE; + rtx (*fcn) () + = TARGET_BYTE_WRITES ? gen_storeqihww : gen_storeqinhww; + rtx seq = (*fcn) (XEXP (operands[0], 0), + gen_lowpart (SImode, operands[1]), + general, bp); + + a29k_set_memflags (seq, operands[0]); + emit_insn (seq); } } else if (GET_CODE (operands[1]) == MEM) @@ -1920,9 +1919,11 @@ { rtx general = gen_reg_rtx (SImode); rtx bp = gen_reg_rtx (PSImode); + rtx seq = gen_loadqi (gen_lowpart (SImode, operands[0]), + XEXP (operands[1], 0), general, bp); - emit_insn (gen_loadqi (gen_lowpart (SImode, operands[0]), - XEXP (operands[1], 0), general, bp)); + a29k_set_memflags (seq, operands[1]); + emit_insn (seq); DONE; } } @@ -1934,10 +1935,13 @@ (match_operand:PSI 2 "register_operand" "=b")])] "! TARGET_DW_ENABLE" " -{ emit_insn (gen_loadqi (gen_lowpart (SImode, operands[0]), - a29k_get_reloaded_address (operands[1]), - gen_rtx (REG, SImode, R_TAV), - operands[2])); +{ rtx seq = gen_loadqi (gen_lowpart (SImode, operands[0]), + a29k_get_reloaded_address (operands[1]), + gen_rtx (REG, SImode, R_TAV), + operands[2]); + + a29k_set_memflags (seq, operands[1]); + emit_insn (seq); DONE; }") @@ -1947,16 +1951,13 @@ (match_operand:PSI 2 "register_operand" "=b")])] "! TARGET_DW_ENABLE" " -{ if (TARGET_BYTE_WRITES) - emit_insn (gen_storeqihww (a29k_get_reloaded_address (operands[0]), - gen_lowpart (SImode, operands[1]), - gen_rtx (REG, SImode, R_TAV), - operands[2])); - else - emit_insn (gen_storeqinhww (a29k_get_reloaded_address (operands[0]), - gen_lowpart (SImode, operands[1]), - gen_rtx (REG, SImode, R_TAV), - operands[2])); +{ rtx (*fcn) () = TARGET_BYTE_WRITES ? gen_storeqihww : gen_storeqinhww; + rtx seq = (*fcn) (a29k_get_reloaded_address (operands[0]), + gen_lowpart (SImode, operands[1]), + gen_rtx (REG, SImode, R_TAV), operands[2]); + + a29k_set_memflags (seq, operands[0]); + emit_insn (seq); DONE; }")