i386: Add push insns for 4-byte vectors [PR100722]
2021-05-23 Uroš Bizjak <ubizjak@gmail.com> gcc/ PR target/100722 * config/i386/mmx.md (*push<VI_32:mode>2_rex64): New instruction pattern. (*push<VI_32:mode>2): Ditto. (push splitter for SSE registers): New splitter. gcc/testsuite/ PR target/100722 * gcc.target/i386/pr100722.c: New test.
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@ -302,6 +302,39 @@
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(symbol_ref "true")))])
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;; For TARGET_64BIT we always round up to 8 bytes.
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(define_insn "*push<mode>2_rex64"
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[(set (match_operand:VI_32 0 "push_operand" "=X,X")
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(match_operand:VI_32 1 "nonmemory_no_elim_operand" "rC,*v"))]
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"TARGET_SSE2 && TARGET_64BIT"
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"@
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push{q}\t%q1
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#"
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[(set_attr "type" "push,multi")
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(set_attr "mode" "DI")])
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(define_insn "*push<mode>2"
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[(set (match_operand:VI_32 0 "push_operand" "=<,<")
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(match_operand:VI_32 1 "general_no_elim_operand" "rC*m,*v"))]
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"TARGET_SSE2 && !TARGET_64BIT"
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"@
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push{l}\t%1
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#"
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[(set_attr "type" "push,multi")
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(set_attr "mode" "SI")])
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(define_split
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[(set (match_operand:VI_32 0 "push_operand")
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(match_operand:VI_32 1 "sse_reg_operand"))]
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"TARGET_SSE2 && reload_completed"
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[(set (reg:P SP_REG) (plus:P (reg:P SP_REG) (match_dup 2)))
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(set (match_dup 0) (match_dup 1))]
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{
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operands[2] = GEN_INT (-PUSH_ROUNDING (GET_MODE_SIZE (<VI_32:MODE>mode)));
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/* Preserve memory attributes. */
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operands[0] = replace_equiv_address (operands[0], stack_pointer_rtx);
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})
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(define_expand "movmisalign<mode>"
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[(set (match_operand:VI_32 0 "nonimmediate_operand")
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(match_operand:VI_32 1 "nonimmediate_operand"))]
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17
gcc/testsuite/gcc.target/i386/pr100722.c
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17
gcc/testsuite/gcc.target/i386/pr100722.c
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@ -0,0 +1,17 @@
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/* PR target/100722 */
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/* { dg-do compile } */
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/* { dg-options "-O -msse2" } */
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typedef char int8x4_t __attribute__((vector_size(4)));
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void stack_callee (int8x4_t, int8x4_t, int8x4_t, int8x4_t,
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int8x4_t, int8x4_t, int8x4_t);
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int8x4_t stack_caller_x1;
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void stack_caller (void)
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{
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stack_callee (stack_caller_x1, stack_caller_x1, stack_caller_x1,
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stack_caller_x1, stack_caller_x1, stack_caller_x1,
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stack_caller_x1);
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}
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