diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index fef141772e2..f47f4d04714 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,325 @@
+2008-12-21  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	* gcc.target/mips/mips.exp: Rewrite.
+
+	* gcc.target/mips/20020620-1.c: Use dg-options instead of
+	dg-mips-options.  Remove target restrictions from dg-do.
+	* gcc.target/mips/mips-ps-1.c: Likewise.
+	* gcc.target/mips/mips-ps-2.c: Likewise.
+	* gcc.target/mips/mips-ps-3.c: Likewise.
+	* gcc.target/mips/mips-ps-4.c: Likewise.
+	* gcc.target/mips/mips-ps-6.c: Likewise.
+
+	* gcc.target/mips/asm-1.c: Use dg-options instead of dg-mips-options.
+	* gcc.target/mips/branch-1.c: Likewise.
+	* gcc.target/mips/clear-cache-2.c: Likewise.
+	* gcc.target/mips/dse-1.c: Likewise.
+	* gcc.target/mips/fix-r4000-1.c: Likewise.
+	* gcc.target/mips/fix-r4000-2.c: Likewise.
+	* gcc.target/mips/fix-r4000-3.c: Likewise.
+	* gcc.target/mips/fix-r4000-4.c: Likewise.
+	* gcc.target/mips/fix-r4000-5.c: Likewise.
+	* gcc.target/mips/fix-r4000-6.c: Likewise.
+	* gcc.target/mips/fix-r4000-7.c: Likewise.
+	* gcc.target/mips/fix-r4000-8.c: Likewise.
+	* gcc.target/mips/fix-r4000-9.c: Likewise.
+	* gcc.target/mips/fix-r4000-10.c: Likewise.
+	* gcc.target/mips/fix-r4000-11.c: Likewise.
+	* gcc.target/mips/fix-r4000-12.c: Likewise.
+	* gcc.target/mips/fix-vr4130-1.c: Likewise.
+	* gcc.target/mips/fix-vr4130-2.c: Likewise.
+	* gcc.target/mips/fix-vr4130-3.c: Likewise.
+	* gcc.target/mips/fix-vr4130-4.c: Likewise.
+	* gcc.target/mips/fpcmp-1.c: Likewise.
+	* gcc.target/mips/fpcmp-2.c: Likewise.
+	* gcc.target/mips/fpr-moves-1.c: Likewise.
+	* gcc.target/mips/fpr-moves-2.c: Likewise.
+	* gcc.target/mips/fpr-moves-3.c: Likewise.
+	* gcc.target/mips/fpr-moves-4.c: Likewise.
+	* gcc.target/mips/fpr-moves-5.c: Likewise.
+	* gcc.target/mips/fpr-moves-6.c: Likewise.
+	* gcc.target/mips/gcc-have-sync-compare-and-swap-2.c: Likewise.
+	* gcc.target/mips/madd-1.c: Likewise.
+	* gcc.target/mips/madd-2.c: Likewise.
+	* gcc.target/mips/madd-5.c: Likewise.
+	* gcc.target/mips/madd-6.c: Likewise.
+	* gcc.target/mips/madd-7.c: Likewise.
+	* gcc.target/mips/madd-8.c: Likewise.
+	* gcc.target/mips/maddu-1.c: Likewise.
+	* gcc.target/mips/maddu-2.c: Likewise.
+	* gcc.target/mips/memcpy-1.c: Likewise.
+	* gcc.target/mips/mips-sched-madd.c: Likewise.
+	* gcc.target/mips/msub-1.c: Likewise.
+	* gcc.target/mips/msub-2.c: Likewise.
+	* gcc.target/mips/msub-5.c: Likewise.
+	* gcc.target/mips/msub-6.c: Likewise.
+	* gcc.target/mips/msub-7.c: Likewise.
+	* gcc.target/mips/msub-8.c: Likewise.
+	* gcc.target/mips/msubu-1.c: Likewise.
+	* gcc.target/mips/msubu-2.c: Likewise.
+	* gcc.target/mips/neg-abs-1.c: Likewise.
+	* gcc.target/mips/neg-abs-2.c: Likewise.
+	* gcc.target/mips/no-smartmips-lwxs.c: Likewise.
+	* gcc.target/mips/no-smartmips-ror-1.c: Likewise.
+	* gcc.target/mips/octeon-baddu-1.c: Likewise.
+	* gcc.target/mips/octeon-bbit-2.c: Likewise.
+	* gcc.target/mips/octeon-bbit-3.c: Likewise.
+	* gcc.target/mips/octeon-cins-1.c: Likewise.
+	* gcc.target/mips/octeon-cins-2.c: Likewise.
+	* gcc.target/mips/octeon-dmul-1.c: Likewise.
+	* gcc.target/mips/octeon-dmul-2.c: Likewise.
+	* gcc.target/mips/octeon-exts-1.c: Likewise.
+	* gcc.target/mips/octeon-exts-2.c: Likewise.
+	* gcc.target/mips/octeon-exts-3.c: Likewise.
+	* gcc.target/mips/octeon-exts-4.c: Likewise.
+	* gcc.target/mips/octeon-exts-5.c: Likewise.
+	* gcc.target/mips/octeon-pop-1.c: Likewise.
+	* gcc.target/mips/octeon-seq-1.c: Likewise.
+	* gcc.target/mips/octeon-seq-2.c: Likewise.
+	* gcc.target/mips/octeon-seq-3.c: Likewise.
+	* gcc.target/mips/octeon-seq-4.c: Likewise.
+	* gcc.target/mips/pr26765.c: Likewise.
+	* gcc.target/mips/pr33256.c: Likewise.
+	* gcc.target/mips/pr33635-1.c: Likewise.
+	* gcc.target/mips/pr33755.c: Likewise.
+	* gcc.target/mips/pr34831.c: Likewise.
+	* gcc.target/mips/pr35802.c: Likewise.
+	* gcc.target/mips/pr37362.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-1.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-2.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-3.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-4.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-5.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-6.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-7.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-8.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-9.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-10.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-11.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-12.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-13.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-15.c: Likewise.
+	* gcc.target/mips/r3900-mult.c: Likewise.
+	* gcc.target/mips/rsqrt-4.c: Likewise.
+	* gcc.target/mips/sb1-1.c: Likewise.
+	* gcc.target/mips/scc-2.c: Likewise.
+	* gcc.target/mips/scc-4.c: Likewise.
+	* gcc.target/mips/sdata-1.c: Likewise.
+	* gcc.target/mips/sdata-2.c: Likewise.
+	* gcc.target/mips/sdata-3.c: Likewise.
+	* gcc.target/mips/sdata-4.c: Likewise.
+	* gcc.target/mips/smartmips-lwxs.c: Likewise.
+	* gcc.target/mips/smartmips-ror-1.c: Likewise.
+	* gcc.target/mips/smartmips-ror-2.c: Likewise.
+	* gcc.target/mips/smartmips-ror-3.c: Likewise.
+	* gcc.target/mips/smartmips-ror-4.c: Likewise.
+	* gcc.target/mips/timode-1.c: Likewise.
+	* gcc.target/mips/truncate-1.c: Likewise.
+	* gcc.target/mips/truncate-2.c: Likewise.
+	* gcc.target/mips/vr-mult-1.c: Likewise.
+	* gcc.target/mips/vr-mult-2.c: Likewise.
+
+	* gcc.target/mips/atomic-memory-2.c: Use dg-options instead of
+	dg-mips-options.  Use isa>=2 instead of -mips32.
+
+	* gcc.target/mips/branch-cost-1.c: Use dg-options instead of
+	dg-mips-options.  Use isa>=4 instead of -mips64.
+	* gcc.target/mips/branch-cost-2.c: Likewise.
+
+	* gcc.target/mips/cache-1.c: Use dg-options instead of
+	dg-mips-options.  Add isa>=3 and NOMIPS16 attributes.
+
+	* gcc.target/mips/call-saved-1.c: Use dg-options instead of
+	dg-mips-options.  Replace the mips16_attribute directives with
+	a (-mips16) dg-option.  Use isa_rev=0 instead of -mips2.
+	* gcc.target/mips/call-saved-2.c: Likewise.
+	* gcc.target/mips/call-saved-3.c: Likewise.
+
+	* gcc.target/mips/clear-cache-1.c: Use dg-options instead of
+	dg-mips-options.  Use isa_rev>=2 instead of -mips32r2.
+	* gcc.target/mips/ext_ins.c: Likewise.
+
+	* gcc.target/mips/code-readable-1.c: Use dg-options instead of
+	dg-mips-options.  Replace the mips16_attribute directives with
+	a (-mips16) dg-option.  Use addressing=absolute too.
+	* gcc.target/mips/code-readable-2.c: Likewise.
+	* gcc.target/mips/code-readable-3.c: Likewise.
+
+	* gcc.target/mips/dmult-1.c: Use dg-options instead of
+	dg-mips-options.  Remove the mips16_attribute directives.
+	* gcc.target/mips/gcc-have-sync-compare-and-swap-4.c: Likewise.
+
+	* gcc.target/mips/dpaq_sa_l_w.c: Use dg-options instead of
+	dg-mips-options.  Remove target restrictions from dg-do.
+	Use -mgp32 instead of -mips32r2.
+	* gcc.target/mips/dpsq_sa_l_w.c: Likewise.
+
+	* gcc.target/mips/dsp-ctrl.c: Use dg-options instead of
+	dg-mips-options.  Remove target restrictions from dg-do.
+	Remove the !__mips_dsp code and add -mdsp -mgp32 to dg-options
+	instead.  Add NOMIPS16 attributes.
+
+	* gcc.target/mips/dspr2-MULT.c: Use dg-options instead of
+	dg-mips-options.  Replace -march=mips32r2 with -mgp32.
+	* gcc.target/mips/dspr2-MULTU.c: Likewise.
+
+	* gcc.target/mips/ext-1.c: Use dg-options instead of
+	dg-mips-options.  Use isa_rev>=2 instead of -mips64r2.
+
+	* gcc.target/mips/fix-r10000-1.c: Use dg-options instead of
+	dg-mips-options.  Remove -march=mips4.  
+	* gcc.target/mips/fix-r10000-2.c: Likewise.
+	* gcc.target/mips/fix-r10000-3.c: Likewise.
+	* gcc.target/mips/fix-r10000-4.c: Likewise.
+	* gcc.target/mips/fix-r10000-5.c: Likewise.
+	* gcc.target/mips/fix-r10000-6.c: Likewise.
+	* gcc.target/mips/fix-r10000-7.c: Likewise.
+	* gcc.target/mips/fix-r10000-8.c: Likewise.
+	* gcc.target/mips/fix-r10000-9.c: Likewise.
+	* gcc.target/mips/fix-r10000-10.c: Likewise.
+	* gcc.target/mips/fix-r10000-11.c: Likewise.
+	* gcc.target/mips/fix-r10000-12.c: Likewise.
+	* gcc.target/mips/fix-r10000-13.c: Likewise.
+	* gcc.target/mips/fix-r10000-14.c: Likewise.
+	* gcc.target/mips/fix-r10000-15.c: Likewise.
+
+	* gcc.target/mips/fixed-scalar-type.c: Use dg-options instead
+	of dg-mips-options.  Remove target restrictions from dg-do.
+	Remove -march=mips32r2.
+	* gcc.target/mips/fixed-vector-type.c: Likewise.
+	* gcc.target/mips/mips32-dsp-run.c: Likewise.
+	* gcc.target/mips/mips32-dspr2.c: Likewise.  Add NOMIPS16 attributes.
+
+	* gcc.target/mips/fpr-moves-7.c: Use dg-options instead of
+	dg-mips-options.  Replace the mips16_attribute directives with
+	a (-mips16) dg-option.  Remove -msoft-float.
+	* gcc.target/mips/fpr-moves-8.c: Likewise.
+	* gcc.target/mips/int-moves-1.c: Likewise.
+	* gcc.target/mips/int-moves-2.c: Likewise.
+
+	* gcc.target/mips/gcc-have-sync-compare-and-swap-1.c: Use dg-options
+	instead of dg-mips-options.  Use isa>=2 instead of -mips2.
+	Add -mgp32.
+	* gcc.target/mips/gcc-have-sync-compare-and-swap-3.c: Likewise.
+
+	* gcc.target/mips/ins-1.c: Use dg-options instead of
+	dg-mips-options.  Use "isa_rev>=2 -mgp32" instead of -march=mips32r2.
+
+	* gcc.target/mips/loongson-muldiv-1.c: Use dg-options instead of
+	dg-mips-options.  Use isa=loongson instead of -march=loongson2e.
+	* gcc.target/mips/loongson-muldiv-2.c: Likewise.
+
+	* gcc.target/mips/loongson-simd.c: Remove mips_loongson
+	target requirement and use isa=loongson instead.  Add -mhard-float,
+	-mno-mips16 and -flax-vector-conversions.
+
+	* gcc.target/mips/lazy-binding-1.c: Use dg-options instead of
+	dg-mips-options.  Remove target restrictions from dg-do.
+	Add NOMIPS16 attributes.
+
+	* gcc.target/mips/long-calls-pg.c: Use dg-options instead of
+	dg-mips-options.  Remove -march=mips32 and -fno-pic.
+	Add NOMIPS16 attributes.
+
+	* gcc.target/mips/madd-3.c: Use dg-options instead of
+	dg-mips-options.  Use isa_rev>=1 instead of -mips32.
+	* gcc.target/mips/maddu-3.c: Likewise.
+	* gcc.target/mips/msub-3.c: Likewise.
+	* gcc.target/mips/msubu-3.c: Likewise.
+
+	* gcc.target/mips/madd-4.c: Use dg-options instead of
+	dg-mips-options.  Remove -mips32r2.
+	* gcc.target/mips/maddu-4.c: Likewise.
+	* gcc.target/mips/msub-4.c: Likewise.
+	* gcc.target/mips/msubu-4.c: Likewise.
+
+	* gcc.target/mips/mips-3d-1.c: Use dg-options instead of
+	dg-mips-options.  Remove target restrictions from dg-do.
+	Remove -mips64, -mhard-float and -mgp64.
+	* gcc.target/mips/mips-3d-2.c: Likewise.
+	* gcc.target/mips/mips-3d-3.c: Likewise.
+	* gcc.target/mips/mips-3d-4.c: Likewise.
+	* gcc.target/mips/mips-3d-5.c: Likewise.
+	* gcc.target/mips/mips-3d-6.c: Likewise.
+	* gcc.target/mips/mips-3d-7.c: Likewise.
+	* gcc.target/mips/mips-3d-8.c: Likewise.
+	* gcc.target/mips/mips-3d-9.c: Likewise.
+
+	* gcc.target/mips/mips-ps-5.c: Use dg-options instead of
+	dg-mips-options.  Remove -mips64.
+	* gcc.target/mips/mips-ps-type.c: Likewise.
+
+	* gcc.target/mips/mips-ps-7.c: Use dg-options instead of
+	dg-mips-options.  Replace -mips32r2 with -mgp32.
+
+	* gcc.target/mips/mips-ps-type-2.c: Use dg-options instead of
+	dg-mips-options.  Use "isa_rev>=2 -mgp32" instead of -mips32r2.
+
+	* gcc.target/mips/mips16-attributes.c: Use dg-options instead of
+	dg-mips-options.  Replace the mips16_attribute directives with
+	a (-mips16) dg-option.
+	* gcc.target/mips/mips16-attributes-2.c: Likewise.
+	* gcc.target/mips/r10k-cache-barrier-14.c: Likewise.
+	* gcc.target/mips/scc-3.c: Likewise.
+
+	* gcc.target/mips/mips16-attributes-3.c: Add { dg-options "(-mips16)" }.
+
+	* gcc.target/mips/mips16e-extends.c: Use dg-options instead of
+	dg-mips-options.  Replace the mips16_attribute directives with
+	a (-mips16) dg-option.  Use isa_rev>=1 instead of -march=mips32.
+	Add -mlong32.
+
+	* gcc.target/mips/mips32-dsp.c: Use dg-options instead of
+	dg-mips-options.  Replace -march=mips32 with -mgp32.
+
+	* gcc.target/mips/mips32-dsp-type.c: Use dg-options instead of
+	dg-mips-options.  Remove -march=mips32.
+
+	* gcc.target/mips/mips32-dspr2-type.c: Use dg-options instead of
+	dg-mips-options.  Remove -march=mips32r2.
+
+	* gcc.target/mips/mips32r2-mxhc1.c: Use dg-options instead of
+	dg-mips-options.  Add NOMIPS16 attributes.
+
+	* gcc.target/mips/movcc-1.c: Use dg-options instead of
+	dg-mips-options.  Use isa>=4 instead of -mips4.
+	* gcc.target/mips/movcc-2.c: Likewise.
+	* gcc.target/mips/movcc-3.c: Likewise.
+
+	* gcc.target/mips/octeon-bbit-1.c: Use dg-options instead of
+	dg-mips-options.  Declare foo as a NOMIPS16 function.
+	Use foo instead of g.
+
+	* gcc.target/mips/near-far-1.c: Use dg-options instead of
+	dg-mips-options.  Replace the nonpic directives with an
+	addressing=absolute option.
+	* gcc.target/mips/near-far-2.c: Likewise.
+	* gcc.target/mips/near-far-3.c: Likewise.
+	* gcc.target/mips/near-far-4.c: Likewise.
+
+	* gcc.target/mips/nmadd-1.c: Use dg-options instead of
+	dg-mips-options.  Use isa=4 instead of -mips4.
+	* gcc.target/mips/nmadd-2.c: Likewise.
+	* gcc.target/mips/nmadd-3.c: Likewise.
+	* gcc.target/mips/rsqrt-1.c: Likewise.
+	* gcc.target/mips/rsqrt-2.c: Likewise.
+	* gcc.target/mips/rsqrt-3.c: Likewise.
+
+	* gcc.target/mips/save-restore-1.c: Use dg-options instead of
+	dg-mips-options.  Replace the mips16_attribute directives with
+	a (-mips16) dg-option.  Use isa_rev>=1 instead of -mips32r2.
+	* gcc.target/mips/save-restore-2.c: Likewise.
+	* gcc.target/mips/save-restore-3.c: Likewise.
+	* gcc.target/mips/save-restore-4.c: Likewise.
+	* gcc.target/mips/save-restore-5.c: Likewise.
+
+	* gcc.target/mips/scc-1.c: Use dg-options instead of
+	dg-mips-options.  Replace the mips16_attribute directives with
+	a (-mips16) dg-option.  Use isa_rev>=1 instead of -mips32.
+
+	* gcc.target/mips/timode-2.c: Remove target restrictions from dg-do.
+	Use -mgp64.
+
 2008-12-21  Richard Sandiford  <rdsandiford@googlemail.com>
 
 	PR target/35899
diff --git a/gcc/testsuite/gcc.target/mips/20020620-1.c b/gcc/testsuite/gcc.target/mips/20020620-1.c
index f4828f439e7..1f2affe48fc 100644
--- a/gcc/testsuite/gcc.target/mips/20020620-1.c
+++ b/gcc/testsuite/gcc.target/mips/20020620-1.c
@@ -1,5 +1,5 @@
-/* { dg-do compile { target mips64*-*-* mipsisa64*-*-* } } */
-/* { dg-mips-options "-O2 -mlong64" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mlong64" } */
 int foo (int *x, int i)
 {
   return x[i] + i;
diff --git a/gcc/testsuite/gcc.target/mips/asm-1.c b/gcc/testsuite/gcc.target/mips/asm-1.c
index ab5d8f8c480..9f9cb3a3483 100644
--- a/gcc/testsuite/gcc.target/mips/asm-1.c
+++ b/gcc/testsuite/gcc.target/mips/asm-1.c
@@ -1,7 +1,7 @@
 /* PR target/17565.  GCC used to put the asm into the delay slot
    of the call.  */
 /* { dg-do assemble } */
-/* { dg-mips-options "-O" } */
+/* { dg-options "-O" } */
 
 NOMIPS16 int foo (int n)
 {
diff --git a/gcc/testsuite/gcc.target/mips/atomic-memory-2.c b/gcc/testsuite/gcc.target/mips/atomic-memory-2.c
index 34214e4476a..bc597ab2d2b 100644
--- a/gcc/testsuite/gcc.target/mips/atomic-memory-2.c
+++ b/gcc/testsuite/gcc.target/mips/atomic-memory-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32 -mabi=32" } */
+/* { dg-options "-O2 isa>=2 -mabi=32" } */
 /* { dg-final { scan-assembler "addiu" } } */
 /* { dg-final { scan-assembler-not "subu" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/branch-1.c b/gcc/testsuite/gcc.target/mips/branch-1.c
index 8c991dd9ff1..fb715362e08 100644
--- a/gcc/testsuite/gcc.target/mips/branch-1.c
+++ b/gcc/testsuite/gcc.target/mips/branch-1.c
@@ -1,6 +1,6 @@
 /* We should implement these "if" statements using an "andi" instruction
    followed by a branch on zero.  */
-/* { dg-mips-options "-O2" } */
+/* { dg-options "-O2" } */
 
 void bar (void);
 NOMIPS16 void f1 (int x) { if (x & 4) bar (); }
diff --git a/gcc/testsuite/gcc.target/mips/branch-cost-1.c b/gcc/testsuite/gcc.target/mips/branch-cost-1.c
index 8048f37459d..d825e06176e 100644
--- a/gcc/testsuite/gcc.target/mips/branch-cost-1.c
+++ b/gcc/testsuite/gcc.target/mips/branch-cost-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mbranch-cost=1 -mips64 -O2" } */
+/* { dg-options "-mbranch-cost=1 isa>=4 -O2" } */
 NOMIPS16 int
 foo (int x, int y, int z, int k)
 {
diff --git a/gcc/testsuite/gcc.target/mips/branch-cost-2.c b/gcc/testsuite/gcc.target/mips/branch-cost-2.c
index d4dc8fe1bba..23f528ad63f 100644
--- a/gcc/testsuite/gcc.target/mips/branch-cost-2.c
+++ b/gcc/testsuite/gcc.target/mips/branch-cost-2.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mbranch-cost=10 -mips64 -O2" } */
+/* { dg-options "-mbranch-cost=10 isa>=4 -O2" } */
 NOMIPS16 int
 foo (int x, int y, int z, int k)
 {
diff --git a/gcc/testsuite/gcc.target/mips/cache-1.c b/gcc/testsuite/gcc.target/mips/cache-1.c
index 40c22e08cdc..05cb4079157 100644
--- a/gcc/testsuite/gcc.target/mips/cache-1.c
+++ b/gcc/testsuite/gcc.target/mips/cache-1.c
@@ -1,24 +1,24 @@
-/* { dg-mips-options "-O2" } */
+/* { dg-options "-O2 isa>=3" } */
 
-void
+NOMIPS16 void
 f1 (int *area)
 {
   __builtin_mips_cache (20, area);
 }
 
-void
+NOMIPS16 void
 f2 (const short *area)
 {
   __builtin_mips_cache (24, area + 10);
 }
 
-void
+NOMIPS16 void
 f3 (volatile unsigned int *area, int offset)
 {
   __builtin_mips_cache (0, area + offset);
 }
 
-void
+NOMIPS16 void
 f4 (const volatile unsigned char *area)
 {
   __builtin_mips_cache (4, area - 80);
diff --git a/gcc/testsuite/gcc.target/mips/call-saved-1.c b/gcc/testsuite/gcc.target/mips/call-saved-1.c
index 42d2dfbfada..5c86b6c8cf9 100644
--- a/gcc/testsuite/gcc.target/mips/call-saved-1.c
+++ b/gcc/testsuite/gcc.target/mips/call-saved-1.c
@@ -1,8 +1,6 @@
 /* Check that we save all call-saved GPRs in a MIPS16 __builtin_eh_return
    function.  */
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mips2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev=0" } */
 
 void bar (void);
 
diff --git a/gcc/testsuite/gcc.target/mips/call-saved-2.c b/gcc/testsuite/gcc.target/mips/call-saved-2.c
index 80ca92cf1a1..9ac7a2735ad 100644
--- a/gcc/testsuite/gcc.target/mips/call-saved-2.c
+++ b/gcc/testsuite/gcc.target/mips/call-saved-2.c
@@ -1,7 +1,5 @@
 /* Check that we save non-MIPS16 GPRs if they are explicitly clobbered.  */
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mips2 -O2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev=0 -O2" } */
 
 MIPS16 void
 foo (void)
diff --git a/gcc/testsuite/gcc.target/mips/call-saved-3.c b/gcc/testsuite/gcc.target/mips/call-saved-3.c
index 5f71c85ec4a..e178eb0f061 100644
--- a/gcc/testsuite/gcc.target/mips/call-saved-3.c
+++ b/gcc/testsuite/gcc.target/mips/call-saved-3.c
@@ -1,8 +1,6 @@
 /* Check that we save all call-saved GPRs in a MIPS16 __builtin_setjmp
    function.  */
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mips2 -O2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev=0 -O2" } */
 
 void bar (void);
 extern int buf[];
diff --git a/gcc/testsuite/gcc.target/mips/clear-cache-1.c b/gcc/testsuite/gcc.target/mips/clear-cache-1.c
index d6e60c251ff..60bbf9dfc40 100644
--- a/gcc/testsuite/gcc.target/mips/clear-cache-1.c
+++ b/gcc/testsuite/gcc.target/mips/clear-cache-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32r2" } */
+/* { dg-options "-O2 isa_rev>=2" } */
 /* { dg-final { scan-assembler "synci" } } */
 /* { dg-final { scan-assembler "jr.hb" } } */
 /* { dg-final { scan-assembler-not "_flush_cache" } } */
diff --git a/gcc/testsuite/gcc.target/mips/clear-cache-2.c b/gcc/testsuite/gcc.target/mips/clear-cache-2.c
index ee7c05048ab..2c925b86031 100644
--- a/gcc/testsuite/gcc.target/mips/clear-cache-2.c
+++ b/gcc/testsuite/gcc.target/mips/clear-cache-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32" } */
+/* { dg-options "-O2 -mips32" } */
 /* { dg-final { scan-assembler-not "synci" } } */
 /* { dg-final { scan-assembler-not "jr.hb" } } */
 /* { dg-final { scan-assembler "_flush_cache" } } */
diff --git a/gcc/testsuite/gcc.target/mips/code-readable-1.c b/gcc/testsuite/gcc.target/mips/code-readable-1.c
index 7a58457d929..ee239e1f85f 100644
--- a/gcc/testsuite/gcc.target/mips/code-readable-1.c
+++ b/gcc/testsuite/gcc.target/mips/code-readable-1.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mcode-readable=yes -mgp32" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -mcode-readable=yes -mgp32 addressing=absolute" } */
 
 MIPS16 int
 foo (int i)
diff --git a/gcc/testsuite/gcc.target/mips/code-readable-2.c b/gcc/testsuite/gcc.target/mips/code-readable-2.c
index 18a1218eb38..1aeecafe1c8 100644
--- a/gcc/testsuite/gcc.target/mips/code-readable-2.c
+++ b/gcc/testsuite/gcc.target/mips/code-readable-2.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mcode-readable=pcrel -mgp32" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -mcode-readable=pcrel -mgp32 addressing=absolute" } */
 
 MIPS16 int
 foo (int i)
diff --git a/gcc/testsuite/gcc.target/mips/code-readable-3.c b/gcc/testsuite/gcc.target/mips/code-readable-3.c
index 5afa136c1c5..21dc82be2b5 100644
--- a/gcc/testsuite/gcc.target/mips/code-readable-3.c
+++ b/gcc/testsuite/gcc.target/mips/code-readable-3.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mcode-readable=no -mgp32" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -mcode-readable=no -mgp32 addressing=absolute" } */
 
 MIPS16 int
 foo (int i)
diff --git a/gcc/testsuite/gcc.target/mips/dmult-1.c b/gcc/testsuite/gcc.target/mips/dmult-1.c
index 561bdf4bb15..61e66c20ffc 100644
--- a/gcc/testsuite/gcc.target/mips/dmult-1.c
+++ b/gcc/testsuite/gcc.target/mips/dmult-1.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mips64 -mgp64" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "-mips64 -mgp64" } */
 /* { dg-final { scan-assembler "\tdmult\t" } } */
 /* { dg-final { scan-assembler "\tmflo\t" } } */
 /* { dg-final { scan-assembler-not "\tdmul\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/dpaq_sa_l_w.c b/gcc/testsuite/gcc.target/mips/dpaq_sa_l_w.c
index 1197fa92a27..d1812c16520 100644
--- a/gcc/testsuite/gcc.target/mips/dpaq_sa_l_w.c
+++ b/gcc/testsuite/gcc.target/mips/dpaq_sa_l_w.c
@@ -1,5 +1,5 @@
-/* { dg-do compile { target {fixed_point} } } */
-/* { dg-mips-options "-O2 -mips32r2 -mdsp" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mgp32 -mdsp" } */
 /* { dg-final { scan-assembler-times "\tdpaq_sa.l.w\t\\\$ac" 3 } } */
 
 NOMIPS16 _Sat long long _Fract
diff --git a/gcc/testsuite/gcc.target/mips/dpsq_sa_l_w.c b/gcc/testsuite/gcc.target/mips/dpsq_sa_l_w.c
index 42935bb0215..849bd923261 100644
--- a/gcc/testsuite/gcc.target/mips/dpsq_sa_l_w.c
+++ b/gcc/testsuite/gcc.target/mips/dpsq_sa_l_w.c
@@ -1,5 +1,5 @@
-/* { dg-do compile { target {fixed_point} } } */
-/* { dg-mips-options "-O2 -mips32r2 -mdsp" } */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mgp32 -mdsp" } */
 /* { dg-final { scan-assembler-times "\tdpsq_sa.l.w\t\\\$ac" 2 } } */
 
 NOMIPS16 _Sat long long _Fract
diff --git a/gcc/testsuite/gcc.target/mips/dse-1.c b/gcc/testsuite/gcc.target/mips/dse-1.c
index 30ceb73f461..6ef55cde25e 100644
--- a/gcc/testsuite/gcc.target/mips/dse-1.c
+++ b/gcc/testsuite/gcc.target/mips/dse-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-mgp64 -O" } */
+/* { dg-options "-mgp64 -O" } */
 
 #define TEST(ID, TYPE1, TYPE2)					\
   union u##ID {							\
diff --git a/gcc/testsuite/gcc.target/mips/dsp-ctrl.c b/gcc/testsuite/gcc.target/mips/dsp-ctrl.c
index 97e93bcc0ab..bb89e84f239 100644
--- a/gcc/testsuite/gcc.target/mips/dsp-ctrl.c
+++ b/gcc/testsuite/gcc.target/mips/dsp-ctrl.c
@@ -1,31 +1,30 @@
-/* { dg-do run { target mips*-*-* } } */
-/* { dg-options "-O2" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mdsp -mgp32" } */
 
 extern void abort (void);
 extern void exit (int);
-#if __mips_dsp
 
-void __attribute__ ((noinline))
+NOMIPS16 void __attribute__ ((noinline))
 test1 (int i)
 {
   __builtin_mips_wrdsp (i, 63);
 }
 
-void __attribute__ ((noinline))
+NOMIPS16 void __attribute__ ((noinline))
 test2 ()
 {
   long long a = 0;
   __builtin_mips_extpdp (a, 3);
 }
 
-void __attribute__ ((noinline))
+NOMIPS16 void __attribute__ ((noinline))
 test3 (int i)
 {
   long long a = 0;
   __builtin_mips_extpdp (a, i);
 }
 
-void __attribute__ ((noinline))
+NOMIPS16 void __attribute__ ((noinline))
 test4 ()
 {
   long long a = 0;
@@ -33,7 +32,7 @@ test4 ()
   __builtin_mips_mthlip (a, i);
 }
 
-int
+NOMIPS16 int
 main ()
 {
   int cntl;
@@ -68,13 +67,3 @@ main ()
 
   exit (0);
 }
-
-#else
-
-int
-main ()
-{
-  exit (0); 
-}
-
-#endif
diff --git a/gcc/testsuite/gcc.target/mips/dspr2-MULT.c b/gcc/testsuite/gcc.target/mips/dspr2-MULT.c
index 9aa95c69afa..ab2c28a7321 100644
--- a/gcc/testsuite/gcc.target/mips/dspr2-MULT.c
+++ b/gcc/testsuite/gcc.target/mips/dspr2-MULT.c
@@ -1,6 +1,6 @@
 /* Test MIPS32 DSP REV 2 MULT instruction */
 /* { dg-do compile } */
-/* { dg-mips-options "-march=mips32r2 -mdspr2 -O2 -ffixed-hi -ffixed-lo" } */
+/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo" } */
 
 /* { dg-final { scan-assembler "\tmult\t" } } */
 /* { dg-final { scan-assembler "ac1" } } */
diff --git a/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c b/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c
index ac8a7d80286..312938ae57d 100644
--- a/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c
+++ b/gcc/testsuite/gcc.target/mips/dspr2-MULTU.c
@@ -1,6 +1,6 @@
 /* Test MIPS32 DSP REV 2 MULTU instruction */
 /* { dg-do compile } */
-/* { dg-mips-options "-march=mips32r2 -mdspr2 -O2 -ffixed-hi -ffixed-lo" } */
+/* { dg-options "-mgp32 -mdspr2 -O2 -ffixed-hi -ffixed-lo" } */
 
 /* { dg-final { scan-assembler "\tmultu\t" } } */
 /* { dg-final { scan-assembler "ac1" } } */
diff --git a/gcc/testsuite/gcc.target/mips/ext-1.c b/gcc/testsuite/gcc.target/mips/ext-1.c
index 2d9368a8bd1..426cbb28573 100644
--- a/gcc/testsuite/gcc.target/mips/ext-1.c
+++ b/gcc/testsuite/gcc.target/mips/ext-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -mips64r2 -mgp64" } */
+/* { dg-options "-O isa_rev>=2 -mgp64" } */
 /* { dg-final { scan-assembler "\tdext\t" } } */
 /* { dg-final { scan-assembler-not "and" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/ext_ins.c b/gcc/testsuite/gcc.target/mips/ext_ins.c
index 77df1d2ba87..8186b84a27f 100644
--- a/gcc/testsuite/gcc.target/mips/ext_ins.c
+++ b/gcc/testsuite/gcc.target/mips/ext_ins.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=mips32r2" } */
+/* { dg-options "isa_rev>=2" } */
 /* { dg-final { scan-assembler "ext" } } */
 /* { dg-final { scan-assembler "ins" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-1.c b/gcc/testsuite/gcc.target/mips/fix-r10000-1.c
index e72974befc7..76f3b86ec5d 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-1.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-10.c b/gcc/testsuite/gcc.target/mips/fix-r10000-10.c
index a6dbfa3dfc7..6ac908a71bb 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-10.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-10.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-11.c b/gcc/testsuite/gcc.target/mips/fix-r10000-11.c
index 4bf16e175a9..e1677b6577a 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-11.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-11.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-12.c b/gcc/testsuite/gcc.target/mips/fix-r10000-12.c
index 160f9aedd3b..f767ae20289 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-12.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-12.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 /* { dg-message "note: '__sync_nand_and_fetch' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-13.c b/gcc/testsuite/gcc.target/mips/fix-r10000-13.c
index 7e1efc85ab9..b0779e0ec34 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-13.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-13.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-14.c b/gcc/testsuite/gcc.target/mips/fix-r10000-14.c
index 8d8fe095e34..4a690f59ed1 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-14.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-14.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-15.c b/gcc/testsuite/gcc.target/mips/fix-r10000-15.c
index fd7d0364bd7..bb5fd743af7 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-15.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-15.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-2.c b/gcc/testsuite/gcc.target/mips/fix-r10000-2.c
index 900a697c99e..bac01913405 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-2.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-3.c b/gcc/testsuite/gcc.target/mips/fix-r10000-3.c
index de74e9724ee..bec7951c1d4 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-3.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-4.c b/gcc/testsuite/gcc.target/mips/fix-r10000-4.c
index 0c962ee267f..864ab8c1ee4 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-4.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-5.c b/gcc/testsuite/gcc.target/mips/fix-r10000-5.c
index 15a0704f2c9..62fd70f5f09 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-5.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-6.c b/gcc/testsuite/gcc.target/mips/fix-r10000-6.c
index 1f81e5bc66c..d8bdb4516de 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-6.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-6.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 /* { dg-message "note: '__sync_fetch_and_nand' changed semantics in GCC 4.4" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-7.c b/gcc/testsuite/gcc.target/mips/fix-r10000-7.c
index bbe985695da..d4b558e0115 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-7.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-7.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-8.c b/gcc/testsuite/gcc.target/mips/fix-r10000-8.c
index 6e990a63fa6..d48ed263c82 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-8.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r10000-9.c b/gcc/testsuite/gcc.target/mips/fix-r10000-9.c
index 8373c42d949..88afad339c9 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r10000-9.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r10000-9.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=mips4 -mfix-r10000" } */
+/* { dg-options "-O2 -mfix-r10000" } */
 /* { dg-final { scan-assembler-times "\tbeql\t" 3 } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-1.c b/gcc/testsuite/gcc.target/mips/fix-r4000-1.c
index adb32a2eed1..513fc6130a5 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-1.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-march=r4000 -mfix-r4000 -O2 -dp" } */
+/* { dg-options "-march=r4000 -mfix-r4000 -O2 -dp" } */
 typedef int int32_t;
 typedef int uint32_t;
 int32_t foo (int32_t x, int32_t y) { return x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-10.c b/gcc/testsuite/gcc.target/mips/fix-r4000-10.c
index 3c217b984cd..ebf3ca30562 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-10.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-10.c
@@ -1,7 +1,7 @@
 /* ??? At the moment, lower-subreg.c decomposes the copy of the multiplication
    result to $2, which prevents the register allocators from storing the
    multiplication result in $2.  */
-/* { dg-mips-options "-mips3 -mfix-r4000 -mgp64 -O2 -fno-split-wide-types -dp -EL" } */
+/* { dg-options "-mips3 -mfix-r4000 -mgp64 -O2 -fno-split-wide-types -dp -EL" } */
 typedef unsigned long long uint64_t;
 typedef unsigned int uint128_t __attribute__((mode(TI)));
 uint128_t foo (uint64_t x, uint64_t y) { return (uint128_t) x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-11.c b/gcc/testsuite/gcc.target/mips/fix-r4000-11.c
index 528a30bbddd..93f78134e4e 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-11.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-11.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
+/* { dg-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
 typedef long long int64_t;
 int64_t foo (int64_t x) { return x / 11993; }
 /* { dg-final { scan-assembler "[concat {\tdmult\t\$4,\$[0-9]+[^\n]+smuldi3_highpart[^\n]+\n\tmfhi\t\$[0-9]+\n}]" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-12.c b/gcc/testsuite/gcc.target/mips/fix-r4000-12.c
index f03a7a06147..554975ccca1 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-12.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-12.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
+/* { dg-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
 typedef unsigned long long uint64_t;
 uint64_t foo (uint64_t x) { return x / 11993; }
 /* { dg-final { scan-assembler "[concat {\tdmultu\t\$4,\$[0-9]+[^\n]+umuldi3_highpart[^\n]+\n\tmfhi\t\$[0-9]+\n}]" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-2.c b/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
index 038dd5ecd49..4f27041bedb 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-2.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mips1 -mfix-r4000 -O2 -dp -EB" } */
+/* { dg-options "-mips1 -mfix-r4000 -O2 -dp -EB" } */
 typedef int int32_t;
 typedef long long int64_t;
 int32_t foo (int32_t x, int32_t y) { return ((int64_t) x * y) >> 32; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-3.c b/gcc/testsuite/gcc.target/mips/fix-r4000-3.c
index 43189430496..207fc66b062 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-3.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-3.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mips1 -mfix-r4000 -O2 -dp -EB" } */
+/* { dg-options "-mips1 -mfix-r4000 -O2 -dp -EB" } */
 typedef unsigned int uint32_t;
 typedef unsigned long long uint64_t;
 uint32_t foo (uint32_t x, uint32_t y) { return ((uint64_t) x * y) >> 32; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-4.c b/gcc/testsuite/gcc.target/mips/fix-r4000-4.c
index 7acb2374d5a..be32b57ae4f 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-4.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-4.c
@@ -1,7 +1,7 @@
 /* ??? At the moment, lower-subreg.c decomposes the copy of the multiplication
    result to $2, which prevents the register allocators from storing the
    multiplication result in $2.  */
-/* { dg-mips-options "-mips1 -mfix-r4000 -O2 -fno-split-wide-types -dp -EL" } */
+/* { dg-options "-mips1 -mfix-r4000 -O2 -fno-split-wide-types -dp -EL" } */
 typedef int int32_t;
 typedef long long int64_t;
 int64_t foo (int32_t x, int32_t y) { return (int64_t) x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-5.c b/gcc/testsuite/gcc.target/mips/fix-r4000-5.c
index 86ab8a26eea..c14e949f229 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-5.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-5.c
@@ -1,7 +1,7 @@
 /* ??? At the moment, lower-subreg.c decomposes the copy of the multiplication
    result to $2, which prevents the register allocators from storing the
    multiplication result in $2.  */
-/* { dg-mips-options "-mips1 -mfix-r4000 -O2 -fno-split-wide-types -dp -EL" } */
+/* { dg-options "-mips1 -mfix-r4000 -O2 -fno-split-wide-types -dp -EL" } */
 typedef unsigned int uint32_t;
 typedef unsigned long long uint64_t;
 uint64_t foo (uint32_t x, uint32_t y) { return (uint64_t) x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-6.c b/gcc/testsuite/gcc.target/mips/fix-r4000-6.c
index 2c75deddeca..32861f9750b 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-6.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-6.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
+/* { dg-options "-march=r4000 -mfix-r4000 -mgp64 -O2 -dp" } */
 typedef long long int64_t;
 typedef unsigned long long uint64_t;
 int64_t foo (int64_t x, int64_t y) { return x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-7.c b/gcc/testsuite/gcc.target/mips/fix-r4000-7.c
index e7b9251ceb4..2555d5306d7 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-7.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-7.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-march=r4000 -mfix-r4000 -O2 -mgp64 -dp -EB" } */
+/* { dg-options "-march=r4000 -mfix-r4000 -O2 -mgp64 -dp -EB" } */
 typedef long long int64_t;
 typedef int int128_t __attribute__((mode(TI)));
 int64_t foo (int64_t x, int64_t y) { return ((int128_t) x * y) >> 64; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-8.c b/gcc/testsuite/gcc.target/mips/fix-r4000-8.c
index 5089b99e08d..964dc222291 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-8.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-8.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-march=r4000 -mfix-r4000 -O2 -mgp64 -dp -EB" } */
+/* { dg-options "-march=r4000 -mfix-r4000 -O2 -mgp64 -dp -EB" } */
 typedef unsigned long long uint64_t;
 typedef unsigned int uint128_t __attribute__((mode(TI)));
 uint64_t foo (uint64_t x, uint64_t y) { return ((uint128_t) x * y) >> 64; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-r4000-9.c b/gcc/testsuite/gcc.target/mips/fix-r4000-9.c
index 55183396f07..68724eb376f 100644
--- a/gcc/testsuite/gcc.target/mips/fix-r4000-9.c
+++ b/gcc/testsuite/gcc.target/mips/fix-r4000-9.c
@@ -1,7 +1,7 @@
 /* ??? At the moment, lower-subreg.c decomposes the copy of the multiplication
    result to $2, which prevents the register allocators from storing the
    multiplication result in $2.  */
-/* { dg-mips-options "-mips3 -mfix-r4000 -mgp64 -O2 -fno-split-wide-types -dp -EL" } */
+/* { dg-options "-mips3 -mfix-r4000 -mgp64 -O2 -fno-split-wide-types -dp -EL" } */
 typedef long long int64_t;
 typedef int int128_t __attribute__((mode(TI)));
 int128_t foo (int64_t x, int64_t y) { return (int128_t) x * y; }
diff --git a/gcc/testsuite/gcc.target/mips/fix-vr4130-1.c b/gcc/testsuite/gcc.target/mips/fix-vr4130-1.c
index 48840accd62..f4eb492e4e4 100644
--- a/gcc/testsuite/gcc.target/mips/fix-vr4130-1.c
+++ b/gcc/testsuite/gcc.target/mips/fix-vr4130-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=vr4130 -mfix-vr4130" } */
+/* { dg-options "-march=vr4130 -mfix-vr4130" } */
 NOMIPS16 unsigned int
 foo (unsigned int x, unsigned int y)
 {
diff --git a/gcc/testsuite/gcc.target/mips/fix-vr4130-2.c b/gcc/testsuite/gcc.target/mips/fix-vr4130-2.c
index aaeba4f2836..18708cb450a 100644
--- a/gcc/testsuite/gcc.target/mips/fix-vr4130-2.c
+++ b/gcc/testsuite/gcc.target/mips/fix-vr4130-2.c
@@ -1,4 +1,4 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=vr4130 -mfix-vr4130" } */
+/* { dg-options "-march=vr4130 -mfix-vr4130" } */
 NOMIPS16 int foo (void) { int r; asm ("# foo" : "=l" (r)); return r; }
 /* { dg-final { scan-assembler "\tmacc\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fix-vr4130-3.c b/gcc/testsuite/gcc.target/mips/fix-vr4130-3.c
index 5cc32cafe43..d3399d10cee 100644
--- a/gcc/testsuite/gcc.target/mips/fix-vr4130-3.c
+++ b/gcc/testsuite/gcc.target/mips/fix-vr4130-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=vr4130 -mgp64 -mfix-vr4130" } */
+/* { dg-options "-march=vr4130 -mgp64 -mfix-vr4130" } */
 NOMIPS16 unsigned long long
 foo (unsigned long long x, unsigned long long y)
 {
diff --git a/gcc/testsuite/gcc.target/mips/fix-vr4130-4.c b/gcc/testsuite/gcc.target/mips/fix-vr4130-4.c
index 91b883d46b5..8b307c6e621 100644
--- a/gcc/testsuite/gcc.target/mips/fix-vr4130-4.c
+++ b/gcc/testsuite/gcc.target/mips/fix-vr4130-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=vr4130 -mgp64 -mfix-vr4130" } */
+/* { dg-options "-march=vr4130 -mgp64 -mfix-vr4130" } */
 NOMIPS16 long long
 foo (void)
 {
diff --git a/gcc/testsuite/gcc.target/mips/fixed-scalar-type.c b/gcc/testsuite/gcc.target/mips/fixed-scalar-type.c
index ff4e975618c..a2e2fbfefe3 100644
--- a/gcc/testsuite/gcc.target/mips/fixed-scalar-type.c
+++ b/gcc/testsuite/gcc.target/mips/fixed-scalar-type.c
@@ -1,6 +1,6 @@
 /* Test scalar fixed-point instructions */
-/* { dg-do compile { target {fixed_point} } } */
-/* { dg-mips-options "-march=mips32r2 -mdspr2 -O2" } */
+/* { dg-do compile } */
+/* { dg-options "-mdspr2 -O2" } */
 /* { dg-final { scan-assembler-times "\taddu\t" 10 } } */
 /* { dg-final { scan-assembler-times "\tsubu\t" 10 } } */
 /* { dg-final { scan-assembler "\taddu_s.qb\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fixed-vector-type.c b/gcc/testsuite/gcc.target/mips/fixed-vector-type.c
index 08208f2c2d7..2fb16aa1d07 100644
--- a/gcc/testsuite/gcc.target/mips/fixed-vector-type.c
+++ b/gcc/testsuite/gcc.target/mips/fixed-vector-type.c
@@ -1,6 +1,6 @@
 /* Test vector fixed-point instructions */
-/* { dg-do compile { target {fixed_point} } } */
-/* { dg-mips-options "-march=mips32r2 -mdspr2 -O2" } */
+/* { dg-do compile } */
+/* { dg-options "-mdspr2 -O2" } */
 /* { dg-final { scan-assembler-times "\taddq_s.ph\t" 2 } } */
 /* { dg-final { scan-assembler-times "\tsubq_s.ph\t" 2 } } */
 /* { dg-final { scan-assembler-times "\taddu_s.qb\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/mips/fpcmp-1.c b/gcc/testsuite/gcc.target/mips/fpcmp-1.c
index 19e66f96b78..cae48a0e93a 100644
--- a/gcc/testsuite/gcc.target/mips/fpcmp-1.c
+++ b/gcc/testsuite/gcc.target/mips/fpcmp-1.c
@@ -1,5 +1,5 @@
 /* We used to use c.lt.fmt instead of c.ule.fmt here.  */
-/* { dg-mips-options "-mhard-float -O2" } */
+/* { dg-options "-mhard-float -O2" } */
 NOMIPS16 int f1 (float x, float y) { return __builtin_isless (x, y); }
 NOMIPS16 int f2 (double x, double y) { return __builtin_isless (x, y); }
 /* { dg-final { scan-assembler "c\\.ule\\.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fpcmp-2.c b/gcc/testsuite/gcc.target/mips/fpcmp-2.c
index 9c1090bb4ba..3e1c259f89a 100644
--- a/gcc/testsuite/gcc.target/mips/fpcmp-2.c
+++ b/gcc/testsuite/gcc.target/mips/fpcmp-2.c
@@ -1,5 +1,5 @@
 /* We used to use c.le.fmt instead of c.ult.fmt here.  */
-/* { dg-mips-options "-mhard-float -O2" } */
+/* { dg-options "-mhard-float -O2" } */
 NOMIPS16 int f1 (float x, float y) { return __builtin_islessequal (x, y); }
 NOMIPS16 int f2 (double x, double y) { return __builtin_islessequal (x, y); }
 /* { dg-final { scan-assembler "c\\.ult\\.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-1.c b/gcc/testsuite/gcc.target/mips/fpr-moves-1.c
index db2190d18dc..92977e04e38 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-1.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mabi=32 -mhard-float -mips1 -O2 -EL" } */
+/* { dg-options "-mabi=32 -mhard-float -mips1 -O2 -EL" } */
 
 NOMIPS16 void
 foo (double d, double *x)
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-2.c b/gcc/testsuite/gcc.target/mips/fpr-moves-2.c
index fe21ee2a1d9..3f4f833ba5e 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-2.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-2.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mabi=32 -mhard-float -mips1 -O2 -EB" } */
+/* { dg-options "-mabi=32 -mhard-float -mips1 -O2 -EB" } */
 
 NOMIPS16 void
 foo (double d, double *x)
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-3.c b/gcc/testsuite/gcc.target/mips/fpr-moves-3.c
index a32c6874eaf..34784d01ce2 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-3.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-3.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mabi=32 -mfp64 -O2 -EL" } */
+/* { dg-options "-mabi=32 -mfp64 -O2 -EL" } */
 
 NOMIPS16 double
 foo (double d)
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-4.c b/gcc/testsuite/gcc.target/mips/fpr-moves-4.c
index 4f26f0694e4..282cf761b37 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-4.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-4.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mabi=32 -mfp64 -O2 -EB" } */
+/* { dg-options "-mabi=32 -mfp64 -O2 -EB" } */
 
 NOMIPS16 double
 foo (double d)
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-5.c b/gcc/testsuite/gcc.target/mips/fpr-moves-5.c
index 7159d381b85..848e5ea25ed 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-5.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-5.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mabi=64 -mhard-float -O2 -EL" } */
+/* { dg-options "-mabi=64 -mhard-float -O2 -EL" } */
 
 NOMIPS16 void
 foo (long double d, long double *x)
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-6.c b/gcc/testsuite/gcc.target/mips/fpr-moves-6.c
index f1933feccc1..7f2611397ba 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-6.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-6.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mabi=64 -mhard-float -O2 -EB" } */
+/* { dg-options "-mabi=64 -mhard-float -O2 -EB" } */
 
 NOMIPS16 void
 foo (long double d, long double *x)
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-7.c b/gcc/testsuite/gcc.target/mips/fpr-moves-7.c
index 4736edd24ee..3abd10417d7 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-7.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-7.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mabi=64 -msoft-float -O2 -EL" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -mabi=64 -O2 -EL" } */
 
 extern long double g[16];
 extern unsigned char gstuff[0x10000];
diff --git a/gcc/testsuite/gcc.target/mips/fpr-moves-8.c b/gcc/testsuite/gcc.target/mips/fpr-moves-8.c
index ade9e5e9c0a..8b6901b7fc7 100644
--- a/gcc/testsuite/gcc.target/mips/fpr-moves-8.c
+++ b/gcc/testsuite/gcc.target/mips/fpr-moves-8.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mabi=64 -msoft-float -O2 -EB" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -mabi=64 -O2 -EB" } */
 
 extern long double g[16];
 extern unsigned char gstuff[0x10000];
diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c
index c12d08e0521..74df7de1481 100644
--- a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c
+++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-1.c
@@ -1,5 +1,5 @@
 /* { dg-do preprocess } */
-/* { dg-mips-options "-mips2" } */
+/* { dg-options "isa>=2 -mgp32" } */
 
 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
 #error nonono
diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c
index eaae7801754..3a03ba3491b 100644
--- a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c
+++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-2.c
@@ -1,5 +1,5 @@
 /* { dg-do preprocess } */
-/* { dg-mips-options "-mgp64" } */
+/* { dg-options "-mgp64" } */
 
 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
 #error nonono
diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-3.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-3.c
index faf50fc69ca..b47a2ceb2db 100644
--- a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-3.c
+++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-3.c
@@ -1,6 +1,4 @@
-/* { dg-do preprocess { target mips16_attribute } } */
-/* { dg-mips-options "-mips2 -mips16" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "isa>=2 -mgp32 -mips16" } */
 
 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
 #error nonono
diff --git a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-4.c b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-4.c
index b53f4b05b61..78a12440a2e 100644
--- a/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-4.c
+++ b/gcc/testsuite/gcc.target/mips/gcc-have-sync-compare-and-swap-4.c
@@ -1,6 +1,4 @@
-/* { dg-do preprocess { target mips16_attribute } } */
-/* { dg-mips-options "-mgp64 -mips16" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "-mgp64 -mips16" } */
 
 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
 #error nonono
diff --git a/gcc/testsuite/gcc.target/mips/ins-1.c b/gcc/testsuite/gcc.target/mips/ins-1.c
index 77047af60b9..9e19354d1a6 100644
--- a/gcc/testsuite/gcc.target/mips/ins-1.c
+++ b/gcc/testsuite/gcc.target/mips/ins-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=mips32r2" } */
+/* { dg-options "-O isa_rev>=2 -mgp32" } */
 /* { dg-final { scan-assembler "\tins\t" } } */
 
 struct
diff --git a/gcc/testsuite/gcc.target/mips/int-moves-1.c b/gcc/testsuite/gcc.target/mips/int-moves-1.c
index 62e659a93fe..485555c39ff 100644
--- a/gcc/testsuite/gcc.target/mips/int-moves-1.c
+++ b/gcc/testsuite/gcc.target/mips/int-moves-1.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mgp64 -msoft-float -O2 -EL" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -mgp64 -O2 -EL" } */
 
 typedef unsigned uint128_t __attribute__((mode(TI)));
 
diff --git a/gcc/testsuite/gcc.target/mips/int-moves-2.c b/gcc/testsuite/gcc.target/mips/int-moves-2.c
index 325bfceb029..eba7983707b 100644
--- a/gcc/testsuite/gcc.target/mips/int-moves-2.c
+++ b/gcc/testsuite/gcc.target/mips/int-moves-2.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mgp64 -msoft-float -O2 -EB" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -mgp64 -O2 -EB" } */
 
 typedef unsigned uint128_t __attribute__((mode(TI)));
 
diff --git a/gcc/testsuite/gcc.target/mips/lazy-binding-1.c b/gcc/testsuite/gcc.target/mips/lazy-binding-1.c
index 761be46e032..e85727c42d7 100644
--- a/gcc/testsuite/gcc.target/mips/lazy-binding-1.c
+++ b/gcc/testsuite/gcc.target/mips/lazy-binding-1.c
@@ -1,9 +1,9 @@
-/* { dg-do compile { target nomips16 } } */
-/* { dg-mips-options "-mabicalls -mshared -mexplicit-relocs -O2 -fno-delayed-branch" } */
+/* { dg-do compile } */
+/* { dg-options "-mabicalls -mshared -mexplicit-relocs -O2 -fno-delayed-branch" } */
 
 void bar (void);
 
-void
+NOMIPS16 void
 foo (int n)
 {
   while (n--)
diff --git a/gcc/testsuite/gcc.target/mips/long-calls-pg.c b/gcc/testsuite/gcc.target/mips/long-calls-pg.c
index 7d2d5f16150..5e554c497d8 100644
--- a/gcc/testsuite/gcc.target/mips/long-calls-pg.c
+++ b/gcc/testsuite/gcc.target/mips/long-calls-pg.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mabi=32 -march=mips32 -fno-pic -pg -mno-abicalls -mlong-calls" } */
+/* { dg-options "-O2 -mabi=32 -pg -mno-abicalls -mlong-calls" } */
 /* { dg-final { scan-assembler-not "\tjal\t_mcount" } } */
-void
+NOMIPS16 void
 foo (void)
 {
 }
diff --git a/gcc/testsuite/gcc.target/mips/loongson-muldiv-1.c b/gcc/testsuite/gcc.target/mips/loongson-muldiv-1.c
index d8293b28844..fd7289ceaf7 100644
--- a/gcc/testsuite/gcc.target/mips/loongson-muldiv-1.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-muldiv-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=loongson2e" } */
+/* { dg-options "-O2 isa=loongson" } */
 
 typedef int st;
 typedef unsigned int ut;
diff --git a/gcc/testsuite/gcc.target/mips/loongson-muldiv-2.c b/gcc/testsuite/gcc.target/mips/loongson-muldiv-2.c
index 4953292c062..6f1f1387551 100644
--- a/gcc/testsuite/gcc.target/mips/loongson-muldiv-2.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-muldiv-2.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=loongson2e -mgp64" } */
+/* { dg-options "-O2 isa=loongson -mgp64" } */
 
 typedef long long st;
 typedef unsigned long long ut;
diff --git a/gcc/testsuite/gcc.target/mips/loongson-simd.c b/gcc/testsuite/gcc.target/mips/loongson-simd.c
index e4cae5ea61d..ae3565f4795 100644
--- a/gcc/testsuite/gcc.target/mips/loongson-simd.c
+++ b/gcc/testsuite/gcc.target/mips/loongson-simd.c
@@ -19,7 +19,10 @@ along with GCC; see the file COPYING3.  If not see
 <http://www.gnu.org/licenses/>.  */
 
 /* { dg-do run } */
-/* { dg-require-effective-target mips_loongson } */
+/* loongson.h does not handle or check for MIPS16ness.  There doesn't
+   seem any good reason for it to, given that the Loongson processors
+   do not support MIPS16.  */
+/* { dg-options "isa=loongson -mhard-float -mno-mips16 -flax-vector-conversions" } */
 
 #include "loongson.h"
 #include <stdio.h>
diff --git a/gcc/testsuite/gcc.target/mips/madd-1.c b/gcc/testsuite/gcc.target/mips/madd-1.c
index c0cdf495896..53881a4b085 100644
--- a/gcc/testsuite/gcc.target/mips/madd-1.c
+++ b/gcc/testsuite/gcc.target/mips/madd-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr4130 -mgp32" } */
+/* { dg-options "-O2 -march=vr4130 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmacc\t\\\$1," 3 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/madd-2.c b/gcc/testsuite/gcc.target/mips/madd-2.c
index daadd416c03..eab7a68454c 100644
--- a/gcc/testsuite/gcc.target/mips/madd-2.c
+++ b/gcc/testsuite/gcc.target/mips/madd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr5500 -mgp32" } */
+/* { dg-options "-O2 -march=vr5500 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmadd\t" 3 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/madd-3.c b/gcc/testsuite/gcc.target/mips/madd-3.c
index 8526a5e1806..6b479f59c71 100644
--- a/gcc/testsuite/gcc.target/mips/madd-3.c
+++ b/gcc/testsuite/gcc.target/mips/madd-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32 -mgp32" } */
+/* { dg-options "-O2 isa_rev>=1 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmadd\t" 3 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/madd-4.c b/gcc/testsuite/gcc.target/mips/madd-4.c
index 8bdf99fbb24..f325af74698 100644
--- a/gcc/testsuite/gcc.target/mips/madd-4.c
+++ b/gcc/testsuite/gcc.target/mips/madd-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32r2 -mdspr2 -mgp32" } */
+/* { dg-options "-O2 -mdspr2 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmadd\t\\\$ac" 3 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/madd-5.c b/gcc/testsuite/gcc.target/mips/madd-5.c
index 780194dc7e6..1ad1c91f3e1 100644
--- a/gcc/testsuite/gcc.target/mips/madd-5.c
+++ b/gcc/testsuite/gcc.target/mips/madd-5.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc" } */
 /* { dg-final { scan-assembler-times "\tmadd\t" 4 } } */
 /* { dg-final { scan-assembler-not "\tmtlo\t" } } */
 /* { dg-final { scan-assembler-times "\tmflo\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/mips/madd-6.c b/gcc/testsuite/gcc.target/mips/madd-6.c
index bbb6783d4a0..4e5afadceb2 100644
--- a/gcc/testsuite/gcc.target/mips/madd-6.c
+++ b/gcc/testsuite/gcc.target/mips/madd-6.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc" } */
 /* { dg-final { scan-assembler-not "\tmadd\t" } } */
 /* { dg-final { scan-assembler "\tmul\t" } } */
 /* { dg-final { scan-assembler "\taddu\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/madd-7.c b/gcc/testsuite/gcc.target/mips/madd-7.c
index bcda15cf455..93ed0fc6f06 100644
--- a/gcc/testsuite/gcc.target/mips/madd-7.c
+++ b/gcc/testsuite/gcc.target/mips/madd-7.c
@@ -1,5 +1,5 @@
 /* -mlong32 added because of PR target/38598.  */
-/* { dg-mips-options "-O2 -march=5kc -mlong32" } */
+/* { dg-options "-O2 -march=5kc -mlong32" } */
 /* { dg-final { scan-assembler-not "\tmul\t" } } */
 /* { dg-final { scan-assembler "\tmadd\t" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/madd-8.c b/gcc/testsuite/gcc.target/mips/madd-8.c
index 0fc680e5979..35092a8ad93 100644
--- a/gcc/testsuite/gcc.target/mips/madd-8.c
+++ b/gcc/testsuite/gcc.target/mips/madd-8.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc" } */
 /* { dg-final { scan-assembler "\tmul\t" } } */
 /* { dg-final { scan-assembler-not "\tmadd\t" } } */
 /* { dg-final { scan-assembler-not "\tmtlo\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/maddu-1.c b/gcc/testsuite/gcc.target/mips/maddu-1.c
index 254f3e75d54..04161ce3a21 100644
--- a/gcc/testsuite/gcc.target/mips/maddu-1.c
+++ b/gcc/testsuite/gcc.target/mips/maddu-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr4130 -mgp32" } */
+/* { dg-options "-O2 -march=vr4130 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmaccu\t\\\$1," 3 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/maddu-2.c b/gcc/testsuite/gcc.target/mips/maddu-2.c
index fc1574e9667..a9768f15bf8 100644
--- a/gcc/testsuite/gcc.target/mips/maddu-2.c
+++ b/gcc/testsuite/gcc.target/mips/maddu-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr5500 -mgp32" } */
+/* { dg-options "-O2 -march=vr5500 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmaddu\t" 3 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/maddu-3.c b/gcc/testsuite/gcc.target/mips/maddu-3.c
index b3cc5105554..b0b4817a47f 100644
--- a/gcc/testsuite/gcc.target/mips/maddu-3.c
+++ b/gcc/testsuite/gcc.target/mips/maddu-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32 -mgp32" } */
+/* { dg-options "-O2 isa_rev>=1 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmaddu\t" 3 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/maddu-4.c b/gcc/testsuite/gcc.target/mips/maddu-4.c
index 2bc54f86471..9c1ccd5f926 100644
--- a/gcc/testsuite/gcc.target/mips/maddu-4.c
+++ b/gcc/testsuite/gcc.target/mips/maddu-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32r2 -mdspr2 -mgp32" } */
+/* { dg-options "-O2 -mdspr2 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmaddu\t\\\$ac" 3 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/memcpy-1.c b/gcc/testsuite/gcc.target/mips/memcpy-1.c
index 4e50b20cda6..f3eda7500db 100644
--- a/gcc/testsuite/gcc.target/mips/memcpy-1.c
+++ b/gcc/testsuite/gcc.target/mips/memcpy-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2" } */
+/* { dg-options "-O2" } */
 /* { dg-final { scan-assembler-not "\tlbu\t" } } */
 
 #include <string.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-1.c b/gcc/testsuite/gcc.target/mips/mips-3d-1.c
index 393ebfc71e9..eb3f8f9a864 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-1.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-1.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Test MIPS-3D builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-2.c b/gcc/testsuite/gcc.target/mips/mips-3d-2.c
index 3c8850bb1aa..dc815748ebd 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-2.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-2.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Test MIPS-3D branch-if-any-two builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-3.c b/gcc/testsuite/gcc.target/mips/mips-3d-3.c
index 909a89a2440..7df590f5c30 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-3.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-3.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Test MIPS-3D absolute compare builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-4.c b/gcc/testsuite/gcc.target/mips/mips-3d-4.c
index 058ff2c3c8e..7f9cbdb1b84 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-4.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-4.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Test MIPS-3D branch-if-any-four builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-5.c b/gcc/testsuite/gcc.target/mips/mips-3d-5.c
index a98e579e731..c07dbe50580 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-5.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-5.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Test MIPS-3D absolute-compare & branch-if-any-four builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-6.c b/gcc/testsuite/gcc.target/mips/mips-3d-6.c
index 30715ea31a3..848414540f0 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-6.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-6.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Test MIPS-3D absolute compare (floats) builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-7.c b/gcc/testsuite/gcc.target/mips/mips-3d-7.c
index 0eef933b2ee..d5d09f99869 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-7.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-7.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Test MIPS-3D absolute compare (doubles) builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-8.c b/gcc/testsuite/gcc.target/mips/mips-3d-8.c
index 042a73066b1..c80f2b9c893 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-8.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-8.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Test MIPS-3D absolute compare and conditional move builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-3d-9.c b/gcc/testsuite/gcc.target/mips/mips-3d-9.c
index fdfedcbeae3..3875391b535 100644
--- a/gcc/testsuite/gcc.target/mips/mips-3d-9.c
+++ b/gcc/testsuite/gcc.target/mips/mips-3d-9.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mipsisa64*-*-* } } */
-/* { dg-mips-options "-mips64 -O2 -mips3d -mhard-float -mgp64" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mips3d" } */
 
 /* Matrix Multiplications */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-1.c b/gcc/testsuite/gcc.target/mips/mips-ps-1.c
index c47b57dc5c5..9e6c6600617 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-1.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-1.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mpaired_single } } */
-/* { dg-mips-options "-O2 -mpaired-single" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mpaired-single" } */
 
 /* Test v2sf calculations */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-2.c b/gcc/testsuite/gcc.target/mips/mips-ps-2.c
index d7b33b1afc8..baec12c1ce6 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-2.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-2.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mpaired_single } } */
-/* { dg-mips-options "-O2 -mpaired-single" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mpaired-single" } */
 
 /* Test MIPS paired-single builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-3.c b/gcc/testsuite/gcc.target/mips/mips-ps-3.c
index a7c9545df3f..e9ed4c03f5f 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-3.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-3.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mpaired_single } } */
-/* { dg-mips-options "-O2 -mpaired-single" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mpaired-single" } */
 
 /* Test MIPS paired-single conditional move */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-4.c b/gcc/testsuite/gcc.target/mips/mips-ps-4.c
index 54efb80e464..b4452d09105 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-4.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-4.c
@@ -1,5 +1,5 @@
-/* { dg-do run { target mpaired_single } } */
-/* { dg-mips-options "-O2 -mpaired-single" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mpaired-single" } */
 
 /* Test MIPS paired-single comparisons */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-5.c b/gcc/testsuite/gcc.target/mips/mips-ps-5.c
index 9b748887ade..94d2f80efc7 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-5.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-5.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-mips64 -O2 -mpaired-single -mgp64 -ftree-vectorize" } */
+/* { dg-options "-O2 -mpaired-single -mgp64 -ftree-vectorize" } */
 
 extern float a[], b[], c[];
 
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-6.c b/gcc/testsuite/gcc.target/mips/mips-ps-6.c
index fc198dc3d09..5b8b2522866 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-6.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-6.c
@@ -1,7 +1,7 @@
 /* mips-ps-2.c with an extra -ffinite-math-only option.  This option
    changes the way that abs.ps is handled.  */
-/* { dg-do run { target mpaired_single } } */
-/* { dg-mips-options "-O2 -mpaired-single -ffinite-math-only" } */
+/* { dg-do run } */
+/* { dg-options "-O2 -mpaired-single -ffinite-math-only" } */
 
 /* Test MIPS paired-single builtin functions */
 #include <stdlib.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-7.c b/gcc/testsuite/gcc.target/mips/mips-ps-7.c
index cfec230ceb1..65a1104ba39 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-7.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-7.c
@@ -1,6 +1,6 @@
-/* mips-ps-5.c with -mips32r2 instead of -mips64.  */
+/* mips-ps-5.c with -mgp32 instead of -mgp64.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-mips32r2 -O2 -mpaired-single -ftree-vectorize" } */
+/* { dg-options "-mgp32 -O2 -mpaired-single -ftree-vectorize" } */
 
 extern float a[], b[], c[];
 
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c b/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c
index 07ce7741b06..f7988553394 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-type-2.c
@@ -1,7 +1,7 @@
 /* Test v2sf calculations.  The nmadd and nmsub patterns need
    -ffinite-math-only.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-mips32r2 -O2 -mpaired-single -ffinite-math-only" } */
+/* { dg-options "isa_rev>=2 -mgp32 -O2 -mpaired-single -ffinite-math-only" } */
 /* { dg-final { scan-assembler "cvt.ps.s" } } */
 /* { dg-final { scan-assembler "mov.ps" } } */
 /* { dg-final { scan-assembler "ldc1" } } */
diff --git a/gcc/testsuite/gcc.target/mips/mips-ps-type.c b/gcc/testsuite/gcc.target/mips/mips-ps-type.c
index df1cec707aa..2a10f91bd54 100644
--- a/gcc/testsuite/gcc.target/mips/mips-ps-type.c
+++ b/gcc/testsuite/gcc.target/mips/mips-ps-type.c
@@ -1,7 +1,7 @@
 /* Test v2sf calculations.  The nmadd and nmsub patterns need
    -ffinite-math-only.  */
 /* { dg-do compile } */ 
-/* { dg-mips-options "-mips64 -O2 -mpaired-single -mgp64 -ffinite-math-only" } */
+/* { dg-options "-O2 -mpaired-single -mgp64 -ffinite-math-only" } */
 /* { dg-final { scan-assembler "cvt.ps.s" } } */ 
 /* { dg-final { scan-assembler "mov.ps" } } */ 
 /* { dg-final { scan-assembler "ldc1" } } */ 
diff --git a/gcc/testsuite/gcc.target/mips/mips-sched-madd.c b/gcc/testsuite/gcc.target/mips/mips-sched-madd.c
index 92f14e1f3bc..c0f9d332a59 100644
--- a/gcc/testsuite/gcc.target/mips/mips-sched-madd.c
+++ b/gcc/testsuite/gcc.target/mips/mips-sched-madd.c
@@ -1,7 +1,7 @@
 /* Test for case where another independent multiply insn may interfere
    with a macc chain.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-Os -march=24kf" } */
+/* { dg-options "-Os -march=24kf" } */
 
 NOMIPS16 int foo (int a, int b, int c, int d, int e, int f, int g)
 {
diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp
index 8e66e0a1901..e1496d9d6a7 100644
--- a/gcc/testsuite/gcc.target/mips/mips.exp
+++ b/gcc/testsuite/gcc.target/mips/mips.exp
@@ -1,4 +1,4 @@
-#   Copyright (C) 1997, 2007 Free Software Foundation, Inc.
+#   Copyright (C) 1997, 2007, 2008 Free Software Foundation, Inc.
 
 # This program is free software; you can redistribute it and/or modify
 # it under the terms of the GNU General Public License as published by
@@ -14,371 +14,1113 @@
 # along with GCC; see the file COPYING3.  If not see
 # <http://www.gnu.org/licenses/>.
 
-# GCC testsuite that uses the `dg.exp' driver.
+# A MIPS version of the GCC dg.exp driver.
+#
+# There are many MIPS features that we want to test, and many of those
+# features are specific to certain architectures, certain ABIs and so on.
+# There are therefore many cases in which we want to test something that
+# is incompatible with the user's chosen test options.
+#
+# In most dg testsuites, the options added by dg-options have a lower
+# priority than the options chosen by the user.  For example, if a test
+# specifies:
+#
+#    { dg-options "-mips1" }
+#
+# and the user passes the following option to runtest:
+#
+#    --target_board unix/-mips3
+#
+# the test would be compiled as MIPS III rather than MIPS I.  If the
+# test really wouldn't work with -mips3, normal practice would be to
+# have something like:
+#
+#    { dg-do compile { target can_force_mips1 } }
+#
+# so that the test is skipped when an option like -mips3 is passed.
+#
+# Sticking to the same approach here would cause us to skip many tests,
+# even though the toolchain can generate the required code.  For example,
+# there are 6 MIPS ABIs, plus variants.  Some configurations support
+# more than one ABI, so it is natural to use something like:
+#
+#    --target_board unix{-mabi=n32,-mabi=32,-mabi=64}
+#
+# when testing them.  But these -mabi=* options would normally prevent any
+# EABI and o64 tests from running.
+#
+# This testsuite therefore defines a local version of dg-options that
+# overrides any user options that are incompatible with the test options.
+# It tries to keep the other user options intact.
+#
+#
+# Most of the tests in this testsuite are scan-assembler tests, but
+# sometimes we need a link test instead.  In these cases, we must not
+# try to link code with options that are incompatible with the current
+# multilib, because xgcc is passed -L and -B options that are specific
+# to that multilib.
+#
+# Normal GCC practice would be to skip incompatible link tests as
+# unsupported, but in this particular case, it seems better to downgrade
+# them to an assemble test instead.  At least that way we get some
+# test-for-ICE and code-sanity coverage.
+#
+# The same problem applies to run tests.  If a test requires runtime
+# support for a particular feature, and if the current target does not
+# provide that support, normal practice would be to skip the test.
+# But in this case it seems better to downgrade it to a link test instead.
+# (We might then have to downgrade it to an assembler test according to
+# the constraints just mentioned.)
+#
+# The local dg-options therefore checks whether the new options are
+# link-compatiable with the user's options.  If not, it automatically
+# downgrades link tests to assemble tests.  It does the same for run
+# tests, but in addition, it downgrades run tests to link tests if the
+# target does not provide runtime support for a required feature or ASE.
+#
+#
+# Another problem is that many of the options we want to test require
+# certain other features.  For example, -mips3d requires both 64-bit
+# FPRs and a MIPS32 or MIPS64 target; -mfix-r10000 requires branch-
+# likely instructions; and so on.  We could handle this by specifying
+# a set of options that are guaranteed to give us what we want, such as:
+#
+#   dg-options "-mips3d -mpaired-single -mhard-float -mgp64 -mfp64 -mabi=n32 -march=mips64 -mips64"
+#
+# With the new dg-options semantics, this would override any troublesome
+# user options like -mips3, -march=vr4100, -mfp32, -mgp32, -msoft-float,
+# -mno-paired-single and so on.  But there are three major problems with
+# this:
+#
+#   - It is easy to forget options.
+#
+#   - If a new option is added, all tests that are incompatible with that
+#     option must be updated.
+#
+#   - We want to be able to test MIPS-3D with things like -march=mips32,
+#     -march=mips64r2, -march=sb1, and so on.
+#
+# The local version of dg-options therefore works out the requirements
+# of each test option.  As with the test options themselves, the local
+# dg-options overrides any user options that incompatible with these
+# requirements, but it keeps the other user options the same.
+#
+# For example, if the user passes -mips3, a MIPS-3D test will choose
+# a different architecture like -mips64 instead.  But if the user
+# passes -march=sb1, MIPS-3D tests will be run with that option.
+#
+#
+# Sometimes it is useful to say "I want an environment that is compatible
+# with option X, but I don't want to pass option X itself".  The main example
+# of this is -mips16: we want to be able to test __attribute__((mips16))
+# without requiring the test itself to be compiled as -mips16.  The local
+# version of dg-options lets you do this by putting X in parentheses.
+# For example:
+#
+#   { dg-options "(-mips16)" }
+#
+# selects a MIPS16-compatible target without passing -mips16 itself.
+#
+# It is also useful to say "any architecture within this ISA range is fine".
+# This can be done using special pseudo-options of the form:
+#
+#   PROP=VALUE PROP<=VALUE PROP>=VALUE
+#
+# where PROP can be:
+#
+#   isa:
+#	the value of the __mips macro.
+#
+#   isa_rev:
+#	the value of the __mips_isa_rev macro, or 0 if it isn't defined.
+#
+# For example, "isa_rev>=1" selects a MIPS32 or MIPS64 processor,
+# "isa=4" selects a MIPS IV processor, and so on.  There are also
+# the following special pseudo-options:
+#
+#   isa=loongson:
+#	select a Loongson processor
+#
+#   addressing=absolute
+#	force absolute addresses to be used
+#
+#
+# In summary:
+#
+#   (1) Try to avoid { target ... } requirements wherever possible.
+#       Specify the requirements as dg-options instead.
+#
+#   (2) Don't worry about the consequences of (1) for link and run tests.
+#       If the test uses { dg-do link } or { dg-do run }, and its
+#       dg-options are incompatible with the current target, the
+#       testsuite will downgrade them where necessary.
+#
+#   (3) Try to use the bare minimum of options and leave dg-options
+#       to work out the dependencies.  For example, if you want
+#       a MIPS-3D test, you should generally just specify -mips3d.
+#       Don't specify an architecture option like -mips64 unless
+#       the test really doesn't work with -mips32r2, -mips64r2,
+#       -march=sb1, etc.
+#
+#   (4) If you want something compatible with a particular option,
+#       but don't want to pass the option itself, wrap that option
+#       in parentheses.  In particular, pass '(-mips16)' if you
+#       want to use "mips16" attributes.
+#
+#   (5) When testing a feature of a generic ISA (as opposed to a
+#	processor-specific extension), try to use the "isa" and
+#	"isa_rev" pseudo-options instead of specific architecture
+#	options.  For example, if the feature is present on revision 2
+#	processors and above, try to use "isa_rev>=2" instead of
+#	"-mips32r2" or "-mips64r2".
 
 # Exit immediately if this isn't a MIPS target.
 if ![istarget mips*-*-*] {
-  return
+    return
 }
 
 # Load support procs.
 load_lib gcc-dg.exp
 
-# Find out which target is selected by the default compiler flags.
-# Also remember which aspects of the target are forced on the command
-# line (as opposed to being overridable defaults).
-#
-#    $mips_isa:		 the ISA level specified by __mips
-#    $mips_isa_rev:	 the ISA revision specified by __mips_isa_rev
-#    $mips_arch:	 the architecture specified by _MIPS_ARCH
-#    $mips_mips16:	 true if MIPS16 output is selected
-#    $mips_gp:		 the number of bytes in a general register
-#    $mips_fp:		 the number of bytes in a floating-point register
-#    $mips_float:	 "hard" or "soft"
-#    $mips_abi:		 the ABI specified by _MIPS_SIM
-#
-#    $mips_forced_isa:	 true if the command line uses -march=* or -mips*
-#    $mips_forced_abi:	 true if the command line uses -mabi=*
-#    $mips_forced_regs:  true if the command line uses -mgp* or -mfp*
-#    $mips_forced_float: true if the command line uses -mhard/soft-float
-#    $mips_forced_be	 true if the command line uses -EB or -meb
-#    $mips_forced_le	 true if the command line uses -EL or -mel
-#    $mips_forced_gp	 true if the command line forces a particular GP mode
-#    $mips_forced_no_abicalls
-#			 true if the command line contains -mno-abicalls
-#    $mips_forced_no_shared
-#			 true if the command line contains -mno-shared
-#    $mips_forced_no_er  true if the command line contains -mno-explicit-relocs
-proc setup_mips_tests {} {
-    global mips_isa
-    global mips_isa_rev
-    global mips_arch
-    global mips_mips16
-    global mips_gp
-    global mips_fp
-    global mips_float
-    global mips_abi
+# A list of GROUP REGEXP pairs.  Each GROUP represents a logical group of
+# options from which only option should be chosen.  REGEXP matches all the
+# options in that group; it is implicitly wrapped in "^(...)$".
+set mips_option_groups {
+    abi "-mabi=.*"
+    addressing "addressing=.*"
+    arch "-mips([1-5]|32.*|64.*)|-march=.*|isa(|_rev)(=|<=|>=).*"
+    dump_pattern "-dp"
+    endianness "-E(L|B)|-me(l|b)"
+    float "-m(hard|soft)-float"
+    fp "-mfp(32|64)"
+    gp "-mgp(32|64)"
+    long "-mlong(32|64)"
+    mips16 "-mips16|-mno-mips16"
+    mips3d "-mips3d|-mno-mips3d"
+    optimization "-O(|[0-3s])"
+    pic "-f(no-|)(pic|PIC)"
+    profiling "-pg"
+    small-data "-G[0-9]+"
+    warnings "-w"
+}
 
-    global mips_forced_isa
-    global mips_forced_abi
-    global mips_forced_float
-    global mips_forced_be
-    global mips_forced_le
-    global mips_forced_gp
-    global mips_forced_no_abicalls
-    global mips_forced_no_shared
-    global mips_forced_no_er
-    global mips_forced_regs
+# Add -mfoo/-mno-foo options to mips_option_groups.
+foreach option {
+    abicalls
+    branch-likely
+    dsp
+    dspr2
+    explicit-relocs
+    extern-sdata
+    fix-r4000
+    fix-r10000
+    fix-vr4130
+    gpopt
+    local-sdata
+    long-calls
+    paired-single
+    plt
+    shared
+    smartmips
+    sym32
+} {
+    lappend mips_option_groups $option "-m(no-|)$option"
+}
 
-    global compiler_flags
+# Add -mfoo= options to mips_option_groups.
+foreach option {
+    branch-cost
+    code-readable
+    r10k-cache-barrier
+} {
+    lappend mips_option_groups $option "-m$option=.*"
+}
+
+# Add -ffoo/-fno-foo options to mips_option_groups.
+foreach option {
+    delayed-branch
+    fast-math
+    finite-math-only
+    fixed-hi
+    fixed-lo
+    lax-vector-conversions
+    split-wide-types
+    tree-vectorize
+} {
+    lappend mips_option_groups $option "-f(no-|)$option"
+}
+
+# A list of option groups that have an impact on the ABI.
+set mips_abi_groups {
+    abi
+    abicalls
+    arch
+    endianness
+    float
+    fp
+    gp
+    gpopt
+    long
+    pic
+    small-data
+}
+
+# mips_option_tests(OPTION) is some assembly code that will run to completion
+# on a target that supports OPTION.
+set mips_option_tests(-mips16) {
+    move $2,$31
+    jal 1f
+    b 2f
+    .align 2
+    .set mips16
+1:
+    jr $31
+    .set nomips16
+    .align 2
+2:
+    move $31,$2
+}
+set mips_option_tests(-mpaired-single) {
+    .set mips64
+    lui $2,0x3f80
+    mtc1 $2,$f0
+    cvt.ps.s $f2,$f0,$f0
+}
+set mips_option_tests(-mips3d) {
+    .set mips64
+    .set mips3d
+    lui $2,0x3f80
+    mtc1 $2,$f0
+    cvt.ps.s $f2,$f0,$f0
+    mulr.ps $f2,$f2,$f2
+    rsqrt1.s $f2,$f0
+    mul.s $f4,$f2,$f0
+    rsqrt2.s $f4,$f4,$f2
+    madd.s $f4,$f2,$f2,$f4
+}
+set mips_option_tests(-mdsp) {
+    .set mips64r2
+    .set dsp
+    addsc $2,$2,$2
+}
+set mips_option_tests(-mdspr2) {
+    .set mips64r2
+    .set dspr2
+    prepend $2,$3,11
+}
+
+# Canonicalize command-line option OPTION.
+proc mips_canonicalize_option { option } {
+    regsub {^-mips([1-5]|32*|64*)$} $option {-march=mips\1} option
+
+    regsub {^-mel$} $option {-EL} option
+    regsub {^-meb$} $option {-EB} option
+
+    regsub {^-O$} $option {-O1} option
+
+    # MIPS doesn't use -fpic and -fPIC to distinguish between code models.
+    regsub {^-f(no-|)PIC} $option {-f\1pic} option
+
+    return $option
+}
+
+# Return true if OPTION1 and OPTION2 represent the same command-line option.
+proc mips_same_option_p { option1 option2 } {
+    return [string equal \
+		[mips_canonicalize_option $option1] \
+		[mips_canonicalize_option $option2]]
+}
+
+# Preprocess CODE using target_compile options OPTIONS.  Return the
+# compiler output.
+proc mips_preprocess { options code } {
     global tool
 
     set src dummy[pid].c
     set f [open $src "w"]
-    puts $f {
-	int isa = __mips;
-	#ifdef __mips_isa_rev
-	int isa_rev = __mips_isa_rev;
-	#else
-	int isa_rev = 1;
-	#endif
-	const char *arch = _MIPS_ARCH;
-	#ifdef __mips16
-	int mips16 = 1;
-	#endif
-	#ifdef __mips64
-	int gp = 64;
-	#else
-	int gp = 32;
-	#endif
-	int fp = __mips_fpr;
-	#ifdef __mips_hard_float
-	const char *float = "hard";
-	#else
-	const char *float = "soft";
-	#endif
-	#if !defined _MIPS_SIM
-	const char *abi = "eabi";
-	#elif _MIPS_SIM==_ABIO32
-	const char *abi = "32";
-	#elif _MIPS_SIM==_ABIO64
-	const char *abi = "o64";
-	#elif _MIPS_SIM==_ABIN32
-	const char *abi = "n32";
-	#else
-	const char *abi = "64";
-	#endif
-    }
+    puts $f $code
     close $f
-    set output [${tool}_target_compile $src "" preprocess ""]
+    set output [${tool}_target_compile $src "" preprocess $options]
     file delete $src
 
-    regexp {isa = ([^;]*)} $output dummy mips_isa
-    regexp {isa_rev = ([^;]*)} $output dummy mips_isa_rev
-    regexp {arch = "([^"]*)} $output dummy mips_arch
-    set mips_mips16 [regexp {mips16 = 1} $output]
-    regexp {gp = ([^;]*)} $output dummy mips_gp
-    regexp {fp = ([^;]*)} $output dummy mips_fp
-    regexp {float = "([^"]*)} $output dummy mips_float
-    regexp {abi = "([^"]*)} $output dummy mips_abi
+    return $output
+}
 
-    set mips_forced_isa [regexp -- {(-mips[1-5][[:>:]]|-mips32*|-mips64*|-march)} $compiler_flags]
-    set mips_forced_abi [regexp -- {-mabi} $compiler_flags]
-    set mips_forced_regs [regexp -- {(-mgp|-mfp)} $compiler_flags]
-    set mips_forced_float [regexp -- {-m(hard|soft)-float} $compiler_flags]
-    set mips_forced_be [regexp -- {-(EB|meb)[[:>:]]} $compiler_flags]
-    set mips_forced_le [regexp -- {-(EL|mel)[[:>:]]} $compiler_flags]
-    set mips_forced_gp [regexp -- {-(G|m(|no-)((extern|local)-sdata|gpopt)|mabicalls|mrtp)} $compiler_flags]
-    set mips_forced_no_abicalls [regexp -- {-mno-abicalls} $compiler_flags]
-    set mips_forced_no_shared [regexp -- {-mno-shared} $compiler_flags]
-    set mips_forced_no_er [regexp -- {-mno-explicit-relocs} $compiler_flags]
+# Set the target board's command-line options to NEW_OPTIONS, storing the
+# old values in UPVAR.
+proc mips_push_test_options { upvar new_options } {
+    upvar $upvar var
+    global board_info
 
-    if {$mips_forced_regs && $mips_gp == 32 && $mips_fp == 64} {
-	set mips_forced_abi 1
-	set mips_forced_isa 1
+    array unset var
+    set var(name) board_info([target_info name],multilib_flags)
+    if { [info exists $var(name)] } {
+	set var(old_options) [set $var(name)]
+	set $var(name) [join $new_options " "]
     }
 }
 
-# Like dg-options, but treats certain MIPS-specific options specially:
+# Undo the effects of [mips_push_test_options UPVAR ...]
+proc mips_pop_test_options { upvar } {
+    upvar $upvar var
+    global board_info
+
+    if { [info exists var(old_options)] } {
+	set $var(name) $var(old_options)
+    }
+}
+
+# Return property PROP for architecture option ARCH (which belongs to
+# the "arch" group in mips_option_groups).  See the comment at the
+# top of the file for the valid property names.
 #
-#    -mgp32
-#    -march=mips32*
-#	Force 32-bit code.  Skip the test if the multilib flags force
-#	a 64-bit ABI.
+# Cache the results in mips_arch_info (which can be reused between test
+# variants).
+proc mips_arch_info { arch prop } {
+    global mips_arch_info
+    global board_info
+
+    set arch [mips_canonicalize_option $arch]
+    if { ![info exists mips_arch_info($arch,$prop)] } {
+	mips_push_test_options saved_options {}
+	set output [mips_preprocess [list "additional_flags=$arch -mabi=32"] {
+	    int isa = __mips;
+	    #ifdef __mips_isa_rev
+	    int isa_rev = __mips_isa_rev;
+	    #else
+	    int isa_rev = 0;
+	    #endif
+	}]
+	foreach lhs { isa isa_rev } {
+	    regsub ".*$lhs = (\[^;\]*).*" $output {\1} rhs
+	    verbose -log "Architecture $arch has $lhs $rhs"
+	    set mips_arch_info($arch,$lhs) $rhs
+	}
+	mips_pop_test_options saved_options
+    }
+    return $mips_arch_info($arch,$prop)
+}
+
+# Return the option group associated with OPTION, or "" if none.
+proc mips_option_maybe_group { option } {
+    global mips_option_groups
+
+    foreach { group regexp } $mips_option_groups {
+	if { [regexp -- "^($regexp)\$" $option] } {
+	    return $group
+	}
+    }
+    return ""
+}
+
+# Return the option group associated with OPTION.  Raise an error if
+# there is none.
+proc mips_option_group { option } {
+    set group [mips_option_maybe_group $option]
+    if { [string equal $group ""] } {
+	error "Unrecognised option: $option"
+    }
+    return $group
+}
+
+# Return the option for option group GROUP, or "" if no option in that
+# group has been chosen.  UPSTATUS describes the option status.
+proc mips_option { upstatus group } {
+    upvar $upstatus status
+
+    return $status(option,$group)
+}
+
+# If the default options for this test run include an option in group GROUP,
+# return that option, otherwise return "".
+proc mips_original_option { group } {
+    global mips_base_options
+
+    return [mips_option mips_base_options $group]
+}
+
+# Return true if the test described up UPSTATUS requires a specific
+# option in group GROUP.
+proc mips_test_option_p { upstatus group } {
+    upvar $upstatus status
+
+    return $status(test_option_p,$group)
+}
+
+# If the test described by UPSTATUS requires a particular option in group
+# GROUP, return that option, otherwise return "".
+proc mips_test_option { upstatus group } {
+    upvar $upstatus status
+
+    if { [mips_test_option_p status $group] } {
+	return [mips_option status $group]
+    } else {
+	return ""
+    }
+}
+
+# Return true if the options described by UPSTATUS include OPTION.
+proc mips_have_option_p { upstatus option } {
+    upvar $upstatus status
+
+    return [mips_same_option_p \
+		[mips_option status [mips_option_group $option]] \
+		$option]
+}
+
+# Return true if the test described by UPSTATUS requires option OPTION.
+proc mips_have_test_option_p { upstatus option } {
+    upvar $upstatus status
+
+    set group [mips_option_group $option]
+    return [mips_same_option_p [mips_test_option status $group] $option]
+}
+
+# If the test described by UPSTATUS does not specify an option in
+# OPTION's group, act as though it had specified OPTION.
 #
-#    -mgp64
-#	Force 64-bit code.  Also force a 64-bit target architecture
-#	if the other flags don't do so.  Skip the test if the multilib
-#	flags force a 32-bit ABI or a 32-bit architecture.
+# The first optional argument indicates whether the option should be
+# treated as though it were wrapped in parentheses; see the comment at
+# the top of the file for details about this convention.  The default is 0.
+proc mips_make_test_option { upstatus option args } {
+    upvar $upstatus status
+
+    set group [mips_option_group $option]
+    if { ![mips_test_option_p status $group] } {
+	set status(option,$group) $option
+	set status(test_option_p,$group) 1
+	if { [llength $args] == 0 || ![lindex $args 0] } {
+	    set status(explicit_p,$group) 1
+	}
+    }
+}
+
+# If the test described by UPSTATUS requires option FROM, assume that
+# it implicitly requires option TO.
+proc mips_option_dependency { upstatus from to } {
+    upvar $upstatus status
+
+    if { [mips_have_test_option_p status $from] } {
+	mips_make_test_option status $to
+    }
+}
+
+# Return true if the given arch-group option specifies a 32-bit ISA.
+proc mips_32bit_arch_p { option } {
+    set isa [mips_arch_info $option isa]
+    return [expr { $isa < 3 || $isa == 32 }]
+}
+
+# Return true if the given arch-group option specifies a 64-bit ISA.
+proc mips_64bit_arch_p { option } {
+    return [expr { ![mips_32bit_arch_p $option] }]
+}
+
+# Return true if the given abi-group option implicitly requires -mgp32.
+proc mips_32bit_abi_p { option } {
+    switch -glob -- $option {
+	-mabi=32 {
+	    return 1
+	}
+    }
+    return 0
+}
+
+# Return true if the given abi-group option implicitly requires -mgp64.
+proc mips_64bit_abi_p { option } {
+    switch -glob -- $option {
+	-mabi=o64 -
+	-mabi=n32 -
+	-mabi=64 {
+	    return 1
+	}
+    }
+    return 0
+}
+
+# Check whether the current target supports all the options that the
+# current test requires.  Return "" if so, otherwise return one of
+# the incompatible options.  UPSTATUS describes the option status.
+proc mips_first_unsupported_option { upstatus } {
+    global mips_option_tests
+    upvar $upstatus status
+
+    foreach { option code } [array get mips_option_tests] {
+	if { [mips_have_test_option_p status $option] } {
+	    regsub -all "\n" $code "\\n\\\n" asm
+	    # Use check_runtime from target-supports.exp, which caches
+	    # the result for us.
+	    if { ![check_runtime mips_option_$option [subst {
+		__attribute__((nomips16)) int
+		main (void)
+		{
+		    asm (".set push\
+		    $asm\
+		    .set pop");
+		    return 0;
+		}
+	    }]] } {
+		return $option
+	    }
+	}
+    }
+    return ""
+}
+
+# Initialize this testsuite for a new test variant.
+proc mips-dg-init {} {
+    # Invariant information.
+    global mips_option_groups
+
+    # Internally-generated information about this run.
+    global mips_base_options
+    global mips_extra_options
+
+    # Override dg-options with our mips-dg-options routine.
+    rename dg-options mips-old-dg-options
+    rename mips-dg-options dg-options
+
+    # Start with a fresh option status.
+    array unset mips_base_options
+    foreach { group regexp } $mips_option_groups {
+	set mips_base_options(option,$group) ""
+	set mips_base_options(explicit_p,$group) 0
+	set mips_base_options(test_option_p,$group) 0
+    }
+
+    # Use preprocessor macros to work out as many implicit options as we can.
+    set output [mips_preprocess "" {
+	const char *options[] = {
+	    #if !defined _MIPS_SIM
+	    "-mabi=eabi",
+	    #elif _MIPS_SIM==_ABIO32
+	    "-mabi=32",
+	    #elif _MIPS_SIM==_ABIO64
+	    "-mabi=o64",
+	    #elif _MIPS_SIM==_ABIN32
+	    "-mabi=n32",
+	    #else
+	    "-mabi=64",
+	    #endif
+
+	    "-march=" _MIPS_ARCH,
+
+	    #ifdef _MIPSEB
+	    "-EB",
+	    #else
+	    "-EL",
+	    #endif
+
+	    #ifdef __mips_hard_float
+	    "-mhard-float",
+	    #else
+	    "-msoft-float",
+	    #endif
+
+	    #if __mips_fpr == 64
+	    "-mfp64",
+	    #else
+	    "-mfp32",
+	    #endif
+
+	    #ifdef __mips64
+	    "-mgp64",
+	    #else
+	    "-mgp32",
+	    #endif
+
+	    #if _MIPS_SZLONG == 64
+	    "-mlong64",
+	    #else
+	    "-mlong32",
+	    #endif
+
+	    #ifdef __mips16
+	    "-mips16",
+	    #else
+	    "-mno-mips16",
+	    #endif
+
+	    #ifdef __mips3d
+	    "-mips3d",
+	    #else
+	    "-mno-mips3d",
+	    #endif
+
+	    #ifdef __mips_paired_single_float
+	    "-mpaired-single",
+	    #else
+	    "-mno-paired-single",
+	    #endif
+
+	    #if __mips_abicalls
+	    "-mabicalls",
+	    #else
+	    "-mno-abicalls",
+	    #endif
+
+	    #if __mips_dsp_rev >= 2
+	    "-mdspr2",
+	    #else
+	    "-mno-dspr2",
+	    #endif
+
+	    #if __mips_dsp_rev >= 1
+	    "-mdsp",
+	    #else
+	    "-mno-dsp",
+	    #endif
+
+	    #ifndef __PIC__
+	    "addressing=absolute",
+	    #endif
+
+	    #ifdef __mips_smartmips
+	    "-msmartmips",
+	    #else
+	    "-mno-smartmips",
+	    #endif
+
+	    0
+	};
+    }]
+    foreach line [split $output "\r\n"] {
+	# Poor man's string concatenation.
+	regsub -all {" "} $line "" line
+	if { [regexp {"(.*)",} $line dummy option] } {
+	    set group [mips_option_group $option]
+	    set mips_base_options(option,$group) $option
+	}
+    }
+
+    # Process the target's multilib options, saving any unrecognized
+    # ones in mips_extra_options.
+    set mips_extra_options {}
+    foreach option [split [board_info target multilib_flags]] {
+	set group [mips_option_maybe_group $option]
+	if { ![string equal $group ""] } {
+	    set mips_base_options(option,$group) $option
+	    set mips_base_options(explicit_p,$group) 1
+	} else {
+	    lappend mips_extra_options $option
+	}
+    }
+}
+
+# Finish a test run started by mips-dg-init.
+proc mips-dg-finish {} {
+    rename dg-options mips-dg-options
+    rename mips-old-dg-options dg-options
+}
+
+# Override dg-options so that we can do some MIPS-specific processing.
+# All options used in this testsuite must appear in mips_option_groups.
 #
-#    -mfp64
-#	Force the use of 64-bit floating-point registers, even on a
-#	32-bit target.  Also force -mhard-float and an architecture that
-#	supports such a combination, unless these things are already
-#	specified by other parts of the given flags.
+# Test options override multilib options.  Certain test options can
+# also imply other test options, which also override multilib options.
+# These dependencies are ordered as follows:
 #
-#    -mabi=*
-#	Force a particular ABI.  Skip the test if the multilib flags
-#	force a specific ABI or a different register size.  If testing
-#	MIPS16 multilibs, try to force -msoft-float for ABIs other than
-#	o32 and o64, and skip the test if this is not possible.
+#          START                        END
+#            |                           |
+#         -mips16                     -mno-mips16
+#            |                           |
+#         -mips3d                     -mno-mips3d
+#            |                           |
+#         -mpaired-single             -mno-paired-single
+#            |                           |
+#         -mfp64                      -mfp32
+#            |                           |
+#         -mhard-float                -msoft-float
+#            |                           |
+#         -mno-sym32                  -msym32
+#            |                           |
+#         -fpic                       -fno-pic
+#            |                           |
+#         -mshared                    -mno-shared
+#            |                           |
+#         -mno-plt                    -mplt
+#            |                           |
+#         addressing=unknown          addressing=absolute
+#            |                           |
+#         -mabicalls                  -mno-abicalls
+#            |                           |
+#         -G0                         <other value>
+#            |                           |
+#         <other value>               -mr10k-cache-barrier=none
+#            |                           |
+#         -mfix-r10000                -mno-fix-r10000
+#            |                           |
+#         -mbranch-likely             -mno-branch-likely
+#            |                           |
+#         -msmartmips                 -mno-smartmips
+#            |                           |
+#         -mno-gpopt                  -mgpopt
+#            |                           |
+#         -mexplicit-relocs           -mno-explicit-relocs
+#            |                           |
+#            +-- gp, abi & arch ---------+
 #
-#    -march=*
-#    -mips*
-#	Select the target architecture.  Skip the test if the multilib
-#	flags force a different architecture.
-#
-#    -msoft-float
-#    -mhard-float
-#	Select the given floating-point mode.  Skip the test if the
-#	multilib flags force a different selection.
-#
-#    -EB
-#    -EL
-#	Select the given endianness.  Skip the test if the multilib flags
-#	force the opposite endianness.
-#
-#    -G*
-#    -m(no-)extern-sdata
-#    -m(no-)local-sdata
-#    -m(no-)gpopt
-#	Select the small-data mode, and -mno-abcialls.  Skip the test if
-#	the multilib flags already contain such an option, or specify
-#	something that might be incompatible with them.
-#
-#    -mabicalls
-#    -mshared
-#	Select the form of SVR4 PIC.  Skip the test if the multilib flags
-#	conflict with the required setting.
-#
-#    -mexplicit-relocs
-#	Select explicit relocations.  Skip the test if the multilib flags
-#	force -mno-explicit-relocs.
-#
-#    -mpaired-single
-#	Select paired-single instructions.  Also behave as for -mfp64.
-proc dg-mips-options {args} {
+# For these purposes, the "gp", "abi" & "arch" option groups are treated
+# as a single node.
+proc mips-dg-options { args } {
+    # dg.exp variables.
     upvar dg-extra-tool-flags extra_tool_flags
     upvar dg-do-what do_what
 
-    global mips_isa
-    global mips_isa_rev
-    global mips_arch
-    global mips_mips16
-    global mips_gp
-    global mips_fp
-    global mips_float
-    global mips_abi
+    # Invariant information.
+    global mips_option_groups
+    global mips_abi_groups
 
-    global mips_forced_isa
-    global mips_forced_abi
-    global mips_forced_regs
-    global mips_forced_float
-    global mips_forced_be
-    global mips_forced_le
-    global mips_forced_gp
-    global mips_forced_no_abicalls
-    global mips_forced_no_shared
-    global mips_forced_no_er
+    # Information about this run.
+    global mips_base_options
 
-    set flags [lindex $args 1]
-    set matches 1
+    # Start out with the default option state.
+    array set options [array get mips_base_options]
 
-    # Add implied flags.
-    foreach flag $flags {
-	if {[string match -mpaired-single $flag]
-	    && [lsearch $flags -mfp*] < 0} {
-	    append flags " -mfp64"
-	} elseif {[regexp -- {^-mabi=(.*)} $flag dummy abi]
-		  && $mips_mips16
-		  && $abi != "32"
-		  && $abi != "o64"} {
-	    if {[lsearch $flags -mhard-float] >= 0} {
-		set matches 0
-	    } else {
-		append flags " -msoft-float"
-	    }
-	} elseif {[regexp -- {^-mr10k-cache-barrier=(load|store)} $flag]
-		  && $mips_isa < 3
-		  && [lsearch -regexp $flags {^(-mips|-march)}] < 0} {
-	    append flags " -mips3"
-	}
-    }
-    foreach flag $flags {
-	if {[string match -mfp* $flag]
-	    && [lsearch -regexp $flags {^-m(hard|soft)-float$}] < 0} {
-	    append flags " -mhard-float"
+    # Record the options that this test explicitly needs.
+    foreach option [lindex $args 1] {
+	set all_but_p [regexp {^\((.*)\)$} $option dummy option]
+	set group [mips_option_group $option]
+	if { [mips_test_option_p options $group] } {
+	    set old [mips_option options $group]
+	    error "Inconsistent $group option: $old vs. $option"
+	} else {
+	    mips_make_test_option options $option $all_but_p
 	}
     }
 
-    # Handle options that force a particular register size.  Add
-    # architecture and ABI options if necessary.
-    set mips_new_gp $mips_gp
-    set mips_new_fp $mips_fp
-    foreach flag $flags {
-	switch -glob -- $flag {
-	    -msmartmips -
-	    -mips[12] -
-	    -mips32* -
-	    -march=mips32* -
-	    -march=r3900 -
-	    -march=24k* -
-	    -mabi=32 -
-	    -mgp32 {
-		set mips_new_gp 32
-	    }
-	    -mabi=64 -
-	    -mabi=o64 -
-	    -mabi=n32 -
-	    -mgp64 {
-		set mips_new_gp 64
-	    }
-	    -mfp64 {
-		set mips_new_fp 64
-	    }
+    # Handle dependencies between options on the left of the
+    # dependency diagram.
+    mips_option_dependency options "-mips3d" "-mpaired-single"
+    mips_option_dependency options "-mpaired-single" "-mfp64"
+    mips_option_dependency options "-mfp64" "-mhard-float"
+    mips_option_dependency options "-fpic" "-mshared"
+    mips_option_dependency options "-mshared" "-mno-plt"
+    mips_option_dependency options "-mno-plt" "addressing=unknown"
+    mips_option_dependency options "-mabicalls" "-G0"
+    mips_option_dependency options "-mno-gpopt" "-mexplicit-relocs"
+
+    # Work out information about the current ABI.
+    set abi_test_option_p [mips_test_option_p options abi]
+    set abi [mips_option options abi]
+    set eabi_p [mips_same_option_p $abi "-mabi=eabi"]
+
+    # If the test forces a particular ABI, set the register size
+    # accordingly.
+    if { $abi_test_option_p } {
+	if { [mips_32bit_abi_p $abi] } {
+	    mips_make_test_option options "-mgp32"
+	} elseif { [mips_64bit_abi_p $abi] } {
+	    mips_make_test_option options "-mgp64"
 	}
     }
 
-    if {$mips_new_gp != $mips_gp || $mips_new_fp != $mips_fp} {
-	if {$mips_forced_regs} {
-	    set matches 0
-	}
-	# Select an appropriate ABI.
-	if {[lsearch $flags "-mabi=*"] < 0} {
-	    if {$mips_new_gp == 32} {
-		append flags " -mabi=32"
-	    } else {
-		append flags " -mabi=o64"
+    # Interpret the special "isa" and "isa_rev" options.  If we have
+    # a choice of a 32-bit or a 64-bit architecture, prefer to keep
+    # the -mgp setting the same.
+    set spec [mips_option options arch]
+    if { [regexp {^[^-]} $spec] } {
+	set arch [mips_option mips_base_options arch]
+	if { [string equal $spec "isa=loongson"] } {
+	    if { ![regexp {^-march=loongson} $arch] } {
+		set arch "-march=loongson2f"
 	    }
-	}
-	# And an appropriate architecture.
-	if {[lsearch -regexp $flags {^(-mips|-march)}] < 0} {
-	    if {$mips_new_gp == 64 && $mips_gp == 32} {
-		append flags " -mips3"
-	    } elseif {$mips_new_gp == 32 && $mips_new_fp == 64} {
-		append flags " -mips32r2"
+	} else {
+	    if { ![regexp {^(isa(?:|_rev))(=|<=|>=)([0-9]+)$} $spec \
+		       dummy prop relation value] } {
+		error "Unrecognized isa specification: $isa_spec"
 	    }
-	}
-    }
-
-    foreach flag $flags {
-	if {[string match -mabicalls $flag]} {
-	    # EABI has no SVR4-style PIC mode, so try to force another ABI.
-	    if {$mips_abi == "eabi" && [lsearch $flags "-mabi=*"] < 0} {
-		if {$mips_new_gp == 32} {
-		    append flags " -mabi=32"
+	    set current [mips_arch_info $arch $prop]
+	    if { ($current < $value && ![string equal $relation "<="])
+		 || ($current > $value && ![string equal $relation ">="])
+		 || ([mips_have_test_option_p options "-mgp64"]
+		     && [mips_32bit_arch_p $arch]) } {
+		# The current setting is out of range; it cannot
+		# possibly be used.  Find a replacement that can.
+		if { [string equal $prop "isa"] } {
+		    set arch "-mips$value"
+		} elseif { $value == 0 } {
+		    set arch "-mips4"
 		} else {
-		    append flags " -mabi=n32"
+		    if { [mips_have_option_p options "-mgp32"] } {
+			set arch "-mips32"
+		    } else {
+			set arch "-mips64"
+		    }
+		    if { $value > 1 } {
+			append arch "r$value"
+		    }
 		}
 	    }
-	    # Turn off small data, if on by default.
-	    append flags " -G0"
+	}
+	set options(option,arch) $arch
+    }
+
+    # Work out information about the current architecture.
+    set arch_test_option_p [mips_test_option_p options arch]
+    set arch [mips_option options arch]
+    set isa [mips_arch_info $arch isa]
+    set isa_rev [mips_arch_info $arch isa_rev]
+
+    # If the test forces a 32-bit architecture, force -mgp32.
+    # Force the current -mgp setting otherwise; if we don't,
+    # some configurations would make a 64-bit architecture
+    # imply -mgp64.
+    if { $arch_test_option_p } {
+	if { [mips_32bit_arch_p $arch] } {
+	    mips_make_test_option options "-mgp32"
+	} else {
+	    mips_make_test_option options [mips_option options gp]
 	}
     }
 
-    # Handle the other options.
-    foreach flag $flags {
-	if {[regexp -- {^-mabi=(.*)} $flag dummy abi]} {
-	    if {$abi != $mips_abi && $mips_forced_abi} {
-		set matches 0
+    # We've now fixed the GP register size.  Make it easily available.
+    set gp_size [expr { [mips_have_option_p options "-mgp32"] ? 32 : 64 }]
+
+    # Handle dependencies between the pre-arch options and the arch option.
+    # This should mirror the arch and post-arch code below.
+    if { !$arch_test_option_p } {
+	# We need a revision 2 or better ISA for:
+	#
+	#   - the combination of -mgp32 -mfp64
+	#   - the DSP ASE
+	if { $isa_rev < 2
+	     && (($gp_size == 32 && [mips_have_test_option_p options "-mfp64"])
+		 || [mips_have_test_option_p options "-mdsp"]
+		 || [mips_have_test_option_p options "-mdspr2"]) } {
+	    if { $gp_size == 32 } {
+		mips_make_test_option options "-mips32r2"
+	    } else {
+		mips_make_test_option options "-mips64r2"
 	    }
-	} elseif {[regexp -- {^-mips(.*)} $flag dummy isa]
-		  || [regexp -- {^-march=mips(.*)} $flag dummy isa]} {
-	    if {![regexp {(.*)r(.*)} $isa dummy isa isa_rev]} {
-		set isa_rev 1
+        # We need a MIPS32 or MIPS64 ISA for:
+	#
+        #   - paired-single instructions(*)
+        #
+	# (*) Note that we don't support MIPS V at the moment.
+	} elseif { $isa_rev < 1
+		   && [mips_have_test_option_p options "-mpaired-single"] } {
+	    if { $gp_size == 32 } {
+		mips_make_test_option options "-mips32"
+	    } else {
+		mips_make_test_option options "-mips64"
 	    }
-	    if {($isa != $mips_isa || $isa_rev != $mips_isa_rev)
-		&& $mips_forced_isa} {
-		set matches 0
+        # We need MIPS III or higher for:
+	#
+	#   - the "cache" instruction
+	} elseif { $isa < 3
+		   && ([mips_have_test_option_p options \
+			    "-mr10k-cache-barrier=load-store"]
+		       || [mips_have_test_option_p options \
+			       "-mr10k-cache-barrier=store"]) } {
+	    mips_make_test_option options "-mips3"
+        # We need MIPS II or higher for:
+	#
+	#   - branch-likely instructions(*)
+        #
+	# (*) needed by both -mbranch-likely and -mfix-r10000
+	} elseif { $isa < 2
+		   && ([mips_have_test_option_p options "-mbranch-likely"]
+		       || [mips_have_test_option_p options "-mfix-r10000"]) } {
+	    mips_make_test_option options "-mips2"
+	# Check whether we need to switch from a 32-bit processor to the
+	# "nearest" 64-bit processor.
+	} elseif { $gp_size == 64 && [mips_32bit_arch_p $arch] } {
+	    if { $isa_rev == 0 } {
+		mips_make_test_option options "-mips3"
+	    } elseif { $isa_rev == 1 } {
+		mips_make_test_option options "-mips64"
+	    } else {
+		mips_make_test_option options "-mips64r$isa_rev"
 	    }
-	} elseif {[regexp -- {^-march=(.*)} $flag dummy arch]} {
-	    if {$arch != $mips_arch && $mips_forced_isa} {
-		set matches 0
+	}
+	unset arch
+	unset isa
+	unset isa_rev
+    }
+
+    # Set an appropriate ABI, handling dependencies between the pre-abi
+    # options and the abi options.  This should mirror the abi and post-abi
+    # code below.
+    if { !$abi_test_option_p } {
+	if { ($eabi_p
+	      && ([mips_have_option_p options "-mabicalls"]
+		  || ($gp_size == 32
+		      && [mips_have_option_p options "-mfp64"]))) } {
+	    # EABI doesn't support -mabicalls.
+	    # EABI doesn't support the combination -mgp32 -mfp64.
+	    set force_abi 1
+	} elseif { [mips_have_option_p options "-mips16"]
+		   && ![mips_same_option_p $abi "-mabi=32"]
+		   && ![mips_same_option_p $abi "-mabi=o64"]
+		   && (![mips_have_option_p options "addressing=absolute"]
+		       || [mips_have_option_p options "-mhard-float"]) } {
+	    # -mips16 -mhard-float requires o32 or o64.
+	    # -mips16 PIC requires o32 or o64.
+	    set force_abi 1
+	} else {
+	    set force_abi 0
+	}
+	if { $gp_size == 32 } {
+	    if { $force_abi || [mips_64bit_abi_p $abi] } {
+		mips_make_test_option options "-mabi=32"
 	    }
-	} elseif {[regexp -- {^-m(hard|soft)-float} $flag dummy float]} {
-	    if {$mips_float != $float && $mips_forced_float} {
-		set matches 0
+	} else {
+	    if { $force_abi || [mips_32bit_abi_p $abi] } {
+		# All configurations should have an assembler that
+		# supports o64, since it requires the same BFD target
+		# vector as o32.  In contrast, many assembler
+		# configurations do not have n32 or n64 support.
+		mips_make_test_option options "-mabi=o64"
 	    }
-	} elseif {[regexp -- {^-(EB|meb)$} $flag]} {
-	    if {$mips_forced_le} {
-		set matches 0
+	}
+	unset abi
+	unset eabi_p
+    }
+
+    # Handle dependencies between the abi options and the post-abi options.
+    # This should mirror the abi and pre-abi code above.
+    if { $abi_test_option_p } {
+	if { $eabi_p } {
+	    mips_make_test_option options "-mno-abicalls"
+	    if { $gp_size == 32 } {
+		mips_make_test_option options "-mfp32"
 	    }
-	} elseif {[regexp -- {^-(EL|mel)$} $flag]} {
-	    if {$mips_forced_be} {
-		set matches 0
+	}
+	if { [mips_have_option_p options "-mips16"]
+	     && ![mips_same_option_p $abi "-mabi=32"]
+	     && ![mips_same_option_p $abi "-mabi=o64"]
+	     && (![mips_have_option_p options "addressing=absolute"]
+		 || [mips_have_option_p options "-mhard-float"]) } {
+	    if { [mips_test_option_p options mips16] } {
+		mips_make_test_option options "addressing=absolute"
+		mips_make_test_option options "-msoft-float"
+	    } else {
+		mips_make_test_option options "-mno-mips16"
 	    }
-	} elseif {[regexp -- {^-(G|m(|no-)((extern|local)-sdata|gpopt))} $flag]} {
-	    if {$flag != "-G0"} {
-		append flags " -mno-abicalls"
+	}
+	unset abi
+	unset eabi_p
+    }
+
+    # Handle dependencies between the arch option and the post-arch options.
+    # This should mirror the arch and pre-arch code above.
+    if { $arch_test_option_p } {
+	if { $isa < 2 } {
+	    mips_make_test_option options "-mno-branch-likely"
+	    mips_make_test_option options "-mno-fix-r10000"
+	}
+	if { $isa < 3 } {
+	    mips_make_test_option options "-mr10k-cache-barrier=none"
+	}
+	if { $isa_rev < 1 } {
+	    mips_make_test_option options "-mno-paired-single"
+	}
+	if { $isa_rev < 2 } {
+	    if { $gp_size == 32 } {
+		mips_make_test_option options "-mfp32"
 	    }
-	    if {$mips_forced_gp} {
-		set matches 0
-	    }
-	} elseif {[regexp -- {^-mabicalls$} $flag]} {
-	    if {$mips_forced_no_abicalls} {
-		set matches 0
-	    }
-	} elseif {[regexp -- {^-mshared$} $flag]} {
-	    if {$mips_forced_no_shared} {
-		set matches 0
-	    }
-	} elseif {[regexp -- {^-mexplicit-relocs$} $flag]} {
-	    if {$mips_forced_no_er} {
-		set matches 0
+	    mips_make_test_option options "-mno-dsp"
+	    mips_make_test_option options "-mno-dspr2"
+	}
+	unset arch
+	unset isa
+	unset isa_rev
+    }
+
+    # Handle dependencies between options on the right of the diagram.
+    mips_option_dependency options "-mno-explicit-relocs" "-mgpopt"
+    switch -- [mips_test_option options small-data] {
+	"" -
+	-G0 {}
+	default {
+	    mips_make_test_option options "-mno-abicalls"
+	}
+    }
+    if { [mips_have_option_p options "-mabicalls"] } {
+	mips_option_dependency options "addressing=absolute" "-mplt"
+    }
+    mips_option_dependency options "-mplt" "-msym32"
+    mips_option_dependency options "-mplt" "-mno-shared"
+    mips_option_dependency options "-mno-shared" "-fno-pic"
+    mips_option_dependency options "-mfp32" "-mno-paired-single"
+    mips_option_dependency options "-msoft-float" "-mno-paired-single"
+    mips_option_dependency options "-mno-paired-single" "-mno-mips3d"
+
+    # If the test requires an unsupported option, change run tests
+    # to link tests.
+
+    switch -- [lindex $do_what 0] {
+	run {
+	    set option [mips_first_unsupported_option options]
+	    if { ![string equal $option ""] } {
+		set do_what [lreplace $do_what 0 0 link]
+		verbose -log "Downgraded to a 'link' test due to unsupported option '$option'"
 	    }
 	}
     }
-    if {$matches} {
-	append extra_tool_flags " " $flags
-    } else {
-	set do_what [list [lindex $do_what 0] "N" "P"]
+
+    # If the test has overridden a option that changes the ABI,
+    # downgrade a link or execution test to an assembler test.
+    foreach group $mips_abi_groups {
+	set old_option [mips_original_option $group]
+	set new_option [mips_option options $group]
+	if { ![mips_same_option_p $old_option $new_option] } {
+	    switch -- [lindex $do_what 0] {
+		link -
+		run {
+		    set do_what [lreplace $do_what 0 0 assemble]
+		    verbose -log "Downgraded to an 'assemble' test due to incompatible $group option ($old_option changed to $new_option)"
+		}
+	    }
+	    break
+	}
+    }
+
+    # Add all options to the dg variable.
+    set options(explicit_p,addressing) 0
+    foreach { group regexp } $mips_option_groups {
+	if { $options(explicit_p,$group) } {
+	    append extra_tool_flags " " $options(option,$group)
+	}
+    }
+
+    # If the test is MIPS16-compatible, provide a counterpart to the
+    # NOMIPS16 convenience macro.
+    if { [mips_have_test_option_p options "-mips16"] } {
+	append extra_tool_flags " -DMIPS16=__attribute__((mips16))"
+    }
+
+    # Use our version of gcc-dg-test for this test.
+    if { ![string equal [info procs "mips-gcc-dg-test"] ""] } {
+	rename gcc-dg-test mips-old-gcc-dg-test
+	rename mips-gcc-dg-test gcc-dg-test
     }
 }
 
-setup_mips_tests
+# A version of gcc-dg-test that is used by dg-options tests.
+proc mips-gcc-dg-test { prog do_what extra_tool_flags } {
+    global board_info
+    global mips_extra_options
+
+    # Override the user's chosen test options with the combined test/user
+    # version.
+    mips_push_test_options saved_options $mips_extra_options
+    set result [gcc-dg-test-1 gcc_target_compile $prog \
+		    $do_what $extra_tool_flags]
+    mips_pop_test_options saved_options
+
+    # Restore the usual gcc-dg-test.
+    rename gcc-dg-test mips-gcc-dg-test
+    rename mips-old-gcc-dg-test gcc-dg-test
+
+    return $result
+}
 
 dg-init
-# MIPS16 is defined in add_options_for_mips16_attribute.
+mips-dg-init
+# MIPS16 is defined by "-mips16" or "(-mips16)" in dg-options.
 dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.c]] "" \
     "-DNOMIPS16=__attribute__((nomips16))"
+mips-dg-finish
 dg-finish
diff --git a/gcc/testsuite/gcc.target/mips/mips16-attributes-2.c b/gcc/testsuite/gcc.target/mips/mips16-attributes-2.c
index edab378c218..bc81cfa7e03 100644
--- a/gcc/testsuite/gcc.target/mips/mips16-attributes-2.c
+++ b/gcc/testsuite/gcc.target/mips/mips16-attributes-2.c
@@ -1,6 +1,5 @@
-/* { dg-do compile { target mips16_attribute } } */
 /* { dg-skip-if "" { *-*-* } { "-mflip-mips16" } { "" } } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16)" } */
 
 void f1 (void);
 void __attribute__((mips16)) f1 (void) {} /* { dg-error "conflicting" } */
diff --git a/gcc/testsuite/gcc.target/mips/mips16-attributes-3.c b/gcc/testsuite/gcc.target/mips/mips16-attributes-3.c
index 3b4e10777a4..74745039056 100644
--- a/gcc/testsuite/gcc.target/mips/mips16-attributes-3.c
+++ b/gcc/testsuite/gcc.target/mips/mips16-attributes-3.c
@@ -1,3 +1,4 @@
+/* { dg-options "(-mips16)" } */
 /* We should be able to assign mips16 and nomips16 functions to a pointer.  */
 void __attribute__((mips16)) f1 (void);
 void (*ptr1) (void) = f1;
diff --git a/gcc/testsuite/gcc.target/mips/mips16-attributes.c b/gcc/testsuite/gcc.target/mips/mips16-attributes.c
index 96945e10e8c..28bb9aae7fa 100644
--- a/gcc/testsuite/gcc.target/mips/mips16-attributes.c
+++ b/gcc/testsuite/gcc.target/mips/mips16-attributes.c
@@ -1,8 +1,8 @@
 /* Verify that mips16 and nomips16 attributes work, checking all combinations
    of calling a nomips16/mips16/default function from a nomips16/mips16/default
    function.  */
-/* { dg-do run { target { mipsisa*-*-elf* && mips16_attribute } } } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-do run } */
+/* { dg-options "(-mips16)" } */
 
 #include <stdlib.h>
 
diff --git a/gcc/testsuite/gcc.target/mips/mips16e-extends.c b/gcc/testsuite/gcc.target/mips/mips16e-extends.c
index df43c415cd1..d077f2fae6e 100644
--- a/gcc/testsuite/gcc.target/mips/mips16e-extends.c
+++ b/gcc/testsuite/gcc.target/mips/mips16e-extends.c
@@ -1,6 +1,5 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-Os -march=mips32" } */
-/* { dg-add-options mips16_attribute } */
+/* -mlong32 added because of PR target/38595.  */
+/* { dg-options "(-mips16) -Os isa_rev>=1 -mlong32" } */
 
 MIPS16 short cksum16 (unsigned long n)
 {
diff --git a/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c b/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c
index c82f68ee38f..e6a271e246b 100644
--- a/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c
+++ b/gcc/testsuite/gcc.target/mips/mips32-dsp-run.c
@@ -1,6 +1,6 @@
 /* Test MIPS32 DSP instructions */
-/* { dg-do run { target mipsisa32r2*-*-* } } */
-/* { dg-mips-options "-march=mips32r2 -mdsp -O2" } */
+/* { dg-do run } */
+/* { dg-options "-mdsp -O2" } */
 
 #include <stdlib.h>
 #include <stdio.h>
diff --git a/gcc/testsuite/gcc.target/mips/mips32-dsp-type.c b/gcc/testsuite/gcc.target/mips/mips32-dsp-type.c
index f0f3fda403e..cbf347b29c9 100644
--- a/gcc/testsuite/gcc.target/mips/mips32-dsp-type.c
+++ b/gcc/testsuite/gcc.target/mips/mips32-dsp-type.c
@@ -1,6 +1,6 @@
 /* Test MIPS32 DSP instructions */
 /* { dg-do compile } */
-/* { dg-mips-options "-march=mips32 -mdsp" } */
+/* { dg-options "-mdsp" } */
 /* { dg-final { scan-assembler "addq.ph" } } */
 /* { dg-final { scan-assembler "addu.qb" } } */
 /* { dg-final { scan-assembler "subq.ph" } } */
diff --git a/gcc/testsuite/gcc.target/mips/mips32-dsp.c b/gcc/testsuite/gcc.target/mips/mips32-dsp.c
index 08f18da6ff2..c00ea3e0b49 100644
--- a/gcc/testsuite/gcc.target/mips/mips32-dsp.c
+++ b/gcc/testsuite/gcc.target/mips/mips32-dsp.c
@@ -1,6 +1,6 @@
 /* Test MIPS32 DSP instructions */
 /* { dg-do compile } */
-/* { dg-mips-options "-march=mips32 -mdsp" } */
+/* { dg-options "-mgp32 -mdsp" } */
 /* { dg-final { scan-assembler "addq.ph" } } */
 /* { dg-final { scan-assembler "addq_s.ph" } } */
 /* { dg-final { scan-assembler "addq_s.w" } } */
diff --git a/gcc/testsuite/gcc.target/mips/mips32-dspr2-type.c b/gcc/testsuite/gcc.target/mips/mips32-dspr2-type.c
index 5d231983b22..9501e9cbeac 100644
--- a/gcc/testsuite/gcc.target/mips/mips32-dspr2-type.c
+++ b/gcc/testsuite/gcc.target/mips/mips32-dspr2-type.c
@@ -1,6 +1,6 @@
 /* Test MIPS32 DSP REV 2 instructions */
 /* { dg-do compile } */
-/* { dg-mips-options "-march=mips32r2 -mdspr2" } */
+/* { dg-options "-mdspr2" } */
 /* { dg-final { scan-assembler "\tmul.ph\t" } } */
 
 typedef short v2hi __attribute__ ((vector_size(4)));
diff --git a/gcc/testsuite/gcc.target/mips/mips32-dspr2.c b/gcc/testsuite/gcc.target/mips/mips32-dspr2.c
index 31cf22cfcd4..1b3031ff19d 100644
--- a/gcc/testsuite/gcc.target/mips/mips32-dspr2.c
+++ b/gcc/testsuite/gcc.target/mips/mips32-dspr2.c
@@ -1,6 +1,6 @@
 /* Test MIPS32 DSP REV 2 instructions */
-/* { dg-do run { target mipsisa32r2*-*-* } } */
-/* { dg-mips-options "-march=mips32r2 -mdspr2 -O2" } */
+/* { dg-do run } */
+/* { dg-options "-mdspr2 -O2" } */
 
 typedef signed char v4q7 __attribute__ ((vector_size(4)));
 typedef signed char v4i8 __attribute__ ((vector_size(4)));
@@ -13,7 +13,7 @@ typedef long long a64;
 
 void abort (void);
 
-void test_MIPS_DSPR2 (void);
+NOMIPS16 void test_MIPS_DSPR2 (void);
 
 int little_endian;
 
@@ -28,7 +28,7 @@ int main ()
   return 0;
 }
 
-void test_MIPS_DSPR2 ()
+NOMIPS16 void test_MIPS_DSPR2 ()
 {
   v4q7 v4q7_a,v4q7_b,v4q7_c,v4q7_r,v4q7_s;
   v4i8 v4i8_a,v4i8_b,v4i8_c,v4i8_r,v4i8_s;
diff --git a/gcc/testsuite/gcc.target/mips/mips32r2-mxhc1.c b/gcc/testsuite/gcc.target/mips/mips32r2-mxhc1.c
index 9257612cc17..cf57323db1a 100644
--- a/gcc/testsuite/gcc.target/mips/mips32r2-mxhc1.c
+++ b/gcc/testsuite/gcc.target/mips/mips32r2-mxhc1.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -mabi=32 -mfp64" } */
+/* { dg-options "-O -mabi=32 -mfp64" } */
 /* { dg-final { scan-assembler "mthc1" } } */
 /* { dg-final { scan-assembler "mfhc1" } } */
 
-double func1 (long long a)
+NOMIPS16 double func1 (long long a)
 {
   return a;
 }
 
-long long func2 (double b)
+NOMIPS16 long long func2 (double b)
 {
   return b;
 }
diff --git a/gcc/testsuite/gcc.target/mips/movcc-1.c b/gcc/testsuite/gcc.target/mips/movcc-1.c
index 1f216b7937e..1a930c9ac06 100644
--- a/gcc/testsuite/gcc.target/mips/movcc-1.c
+++ b/gcc/testsuite/gcc.target/mips/movcc-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips4" } */
+/* { dg-options "-O2 isa>=4" } */
 /* { dg-final { scan-assembler "movz" } } */
 /* { dg-final { scan-assembler "movn" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/movcc-2.c b/gcc/testsuite/gcc.target/mips/movcc-2.c
index bb578099a5b..d42acc1d77c 100644
--- a/gcc/testsuite/gcc.target/mips/movcc-2.c
+++ b/gcc/testsuite/gcc.target/mips/movcc-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips4" } */
+/* { dg-options "-O2 isa>=4" } */
 /* { dg-final { scan-assembler "movz" } } */
 /* { dg-final { scan-assembler "movn" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/movcc-3.c b/gcc/testsuite/gcc.target/mips/movcc-3.c
index c3e0b422a30..e6481777add 100644
--- a/gcc/testsuite/gcc.target/mips/movcc-3.c
+++ b/gcc/testsuite/gcc.target/mips/movcc-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips4 -mhard-float" } */
+/* { dg-options "-O2 isa>=4 -mhard-float" } */
 /* { dg-final { scan-assembler "movt" } } */
 /* { dg-final { scan-assembler "movf" } } */
 /* { dg-final { scan-assembler "movz.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/msub-1.c b/gcc/testsuite/gcc.target/mips/msub-1.c
index ec6bbc5faaf..803ea77df74 100644
--- a/gcc/testsuite/gcc.target/mips/msub-1.c
+++ b/gcc/testsuite/gcc.target/mips/msub-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr5400 -mgp32" } */
+/* { dg-options "-O2 -march=vr5400 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsac\t\\\$0," 2 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/msub-2.c b/gcc/testsuite/gcc.target/mips/msub-2.c
index 09c22e76632..e6cdc2c1a9a 100644
--- a/gcc/testsuite/gcc.target/mips/msub-2.c
+++ b/gcc/testsuite/gcc.target/mips/msub-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr5500 -mgp32" } */
+/* { dg-options "-O2 -march=vr5500 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsub\t" 2 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/msub-3.c b/gcc/testsuite/gcc.target/mips/msub-3.c
index 97dccf2fd97..c44f34f4f0e 100644
--- a/gcc/testsuite/gcc.target/mips/msub-3.c
+++ b/gcc/testsuite/gcc.target/mips/msub-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32 -mgp32" } */
+/* { dg-options "-O2 isa_rev>=1 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsub\t" 2 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/msub-4.c b/gcc/testsuite/gcc.target/mips/msub-4.c
index df08a6304a4..d41c3129914 100644
--- a/gcc/testsuite/gcc.target/mips/msub-4.c
+++ b/gcc/testsuite/gcc.target/mips/msub-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32r2 -mdspr2 -mgp32" } */
+/* { dg-options "-O2 -mdspr2 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsub\t\\\$ac" 2 } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/msub-5.c b/gcc/testsuite/gcc.target/mips/msub-5.c
index 675da64a5e1..dcb124a7198 100644
--- a/gcc/testsuite/gcc.target/mips/msub-5.c
+++ b/gcc/testsuite/gcc.target/mips/msub-5.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc" } */
 /* { dg-final { scan-assembler-times "\tmsub\t" 4 } } */
 /* { dg-final { scan-assembler-not "\tmtlo\t" } } */
 /* { dg-final { scan-assembler-times "\tmflo\t" 3 } } */
diff --git a/gcc/testsuite/gcc.target/mips/msub-6.c b/gcc/testsuite/gcc.target/mips/msub-6.c
index afe01cb5162..ee4ca3d8da0 100644
--- a/gcc/testsuite/gcc.target/mips/msub-6.c
+++ b/gcc/testsuite/gcc.target/mips/msub-6.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc" } */
 /* { dg-final { scan-assembler-not "\tmsub\t" } } */
 /* { dg-final { scan-assembler "\tmul\t" } } */
 /* { dg-final { scan-assembler "\tsubu\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/msub-7.c b/gcc/testsuite/gcc.target/mips/msub-7.c
index df195668701..ca90cee9ea5 100644
--- a/gcc/testsuite/gcc.target/mips/msub-7.c
+++ b/gcc/testsuite/gcc.target/mips/msub-7.c
@@ -1,5 +1,5 @@
 /* -mlong32 added because of PR target/38598.  */
-/* { dg-mips-options "-O2 -march=5kc -mlong32" } */
+/* { dg-options "-O2 -march=5kc -mlong32" } */
 /* { dg-final { scan-assembler-not "\tmul\t" } } */
 /* { dg-final { scan-assembler "\tmsub\t" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/msub-8.c b/gcc/testsuite/gcc.target/mips/msub-8.c
index 7517540cdc4..49d67f24a6c 100644
--- a/gcc/testsuite/gcc.target/mips/msub-8.c
+++ b/gcc/testsuite/gcc.target/mips/msub-8.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=5kc" } */
+/* { dg-options "-O2 -march=5kc" } */
 /* { dg-final { scan-assembler "\tmul\t" } } */
 /* { dg-final { scan-assembler-not "\tmsub\t" } } */
 /* { dg-final { scan-assembler-not "\tmtlo\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/msubu-1.c b/gcc/testsuite/gcc.target/mips/msubu-1.c
index 187cb71c728..ae804034644 100644
--- a/gcc/testsuite/gcc.target/mips/msubu-1.c
+++ b/gcc/testsuite/gcc.target/mips/msubu-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr5400 -mgp32" } */
+/* { dg-options "-O2 -march=vr5400 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsacu\t\\\$0," 2 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/msubu-2.c b/gcc/testsuite/gcc.target/mips/msubu-2.c
index 36cb91bcfa5..186dc47d6f7 100644
--- a/gcc/testsuite/gcc.target/mips/msubu-2.c
+++ b/gcc/testsuite/gcc.target/mips/msubu-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr5500 -mgp32" } */
+/* { dg-options "-O2 -march=vr5500 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsubu\t" 2 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/msubu-3.c b/gcc/testsuite/gcc.target/mips/msubu-3.c
index ee5dd6a9cf9..272c64818e3 100644
--- a/gcc/testsuite/gcc.target/mips/msubu-3.c
+++ b/gcc/testsuite/gcc.target/mips/msubu-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32 -mgp32" } */
+/* { dg-options "-O2 isa_rev>=1 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsubu\t" 2 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/msubu-4.c b/gcc/testsuite/gcc.target/mips/msubu-4.c
index fb655db8730..8f5fd647b37 100644
--- a/gcc/testsuite/gcc.target/mips/msubu-4.c
+++ b/gcc/testsuite/gcc.target/mips/msubu-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips32r2 -mdspr2 -mgp32" } */
+/* { dg-options "-O2 -mdspr2 -mgp32" } */
 /* { dg-final { scan-assembler-times "\tmsubu\t\\\$ac" 2 } } */
 
 typedef unsigned int ui;
diff --git a/gcc/testsuite/gcc.target/mips/near-far-1.c b/gcc/testsuite/gcc.target/mips/near-far-1.c
index f8bc5c93ef4..ac0cc1ef79b 100644
--- a/gcc/testsuite/gcc.target/mips/near-far-1.c
+++ b/gcc/testsuite/gcc.target/mips/near-far-1.c
@@ -1,6 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-mlong-calls" } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-options "-mlong-calls addressing=absolute" } */
 
 extern int long_call_func () __attribute__((long_call));
 extern int far_func () __attribute__((far));
diff --git a/gcc/testsuite/gcc.target/mips/near-far-2.c b/gcc/testsuite/gcc.target/mips/near-far-2.c
index d65c44cf9f9..c954b444cb0 100644
--- a/gcc/testsuite/gcc.target/mips/near-far-2.c
+++ b/gcc/testsuite/gcc.target/mips/near-far-2.c
@@ -1,6 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-mno-long-calls" } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-options "-mno-long-calls addressing=absolute" } */
 
 extern int long_call_func () __attribute__((long_call));
 extern int far_func () __attribute__((far));
diff --git a/gcc/testsuite/gcc.target/mips/near-far-3.c b/gcc/testsuite/gcc.target/mips/near-far-3.c
index bde44e54366..f4ae791f1a0 100644
--- a/gcc/testsuite/gcc.target/mips/near-far-3.c
+++ b/gcc/testsuite/gcc.target/mips/near-far-3.c
@@ -1,6 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-mlong-calls -O2" } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-options "-mlong-calls addressing=absolute -O2" } */
 
 NOMIPS16 extern int long_call_func () __attribute__((long_call));
 NOMIPS16 extern int far_func () __attribute__((far));
diff --git a/gcc/testsuite/gcc.target/mips/near-far-4.c b/gcc/testsuite/gcc.target/mips/near-far-4.c
index f79216860ba..b9aa21fe4f4 100644
--- a/gcc/testsuite/gcc.target/mips/near-far-4.c
+++ b/gcc/testsuite/gcc.target/mips/near-far-4.c
@@ -1,6 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-mno-long-calls -O2" } */
-/* { dg-require-effective-target nonpic } */
+/* { dg-options "-mno-long-calls addressing=absolute -O2" } */
 
 NOMIPS16 extern int long_call_func () __attribute__((long_call));
 NOMIPS16 extern int far_func () __attribute__((far));
diff --git a/gcc/testsuite/gcc.target/mips/neg-abs-1.c b/gcc/testsuite/gcc.target/mips/neg-abs-1.c
index e5daa291af0..20691ff2c4b 100644
--- a/gcc/testsuite/gcc.target/mips/neg-abs-1.c
+++ b/gcc/testsuite/gcc.target/mips/neg-abs-1.c
@@ -1,7 +1,7 @@
 /* Make sure that we use abs.fmt and neg.fmt when the signs of NaNs don't
    matter.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mhard-float -ffinite-math-only" } */
+/* { dg-options "-O2 -mhard-float -ffinite-math-only" } */
 /* { dg-final { scan-assembler "neg.s" } } */
 /* { dg-final { scan-assembler "neg.d" } } */
 /* { dg-final { scan-assembler "abs.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/neg-abs-2.c b/gcc/testsuite/gcc.target/mips/neg-abs-2.c
index 5ef08da6f34..67125f78a67 100644
--- a/gcc/testsuite/gcc.target/mips/neg-abs-2.c
+++ b/gcc/testsuite/gcc.target/mips/neg-abs-2.c
@@ -1,7 +1,7 @@
 /* Make sure that we avoid abs.fmt and neg.fmt when the signs of NaNs
    matter.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mhard-float -fno-finite-math-only" } */
+/* { dg-options "-O2 -mhard-float -fno-finite-math-only" } */
 /* { dg-final { scan-assembler-not "neg.s" } } */
 /* { dg-final { scan-assembler-not "neg.d" } } */
 /* { dg-final { scan-assembler-not "abs.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/nmadd-1.c b/gcc/testsuite/gcc.target/mips/nmadd-1.c
index bd3b10ab69c..123d48799ed 100644
--- a/gcc/testsuite/gcc.target/mips/nmadd-1.c
+++ b/gcc/testsuite/gcc.target/mips/nmadd-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -ffast-math -mips4 -mhard-float" } */
+/* { dg-options "-O2 -ffast-math isa=4 -mhard-float" } */
 /* { dg-final { scan-assembler "nmadd.s" } } */
 /* { dg-final { scan-assembler "nmadd.d" } } */
 /* { dg-final { scan-assembler "nmsub.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/nmadd-2.c b/gcc/testsuite/gcc.target/mips/nmadd-2.c
index cce3710881d..90e4d838d89 100644
--- a/gcc/testsuite/gcc.target/mips/nmadd-2.c
+++ b/gcc/testsuite/gcc.target/mips/nmadd-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -fno-fast-math -ffinite-math-only -mips4 -mhard-float" } */
+/* { dg-options "-O2 -fno-fast-math -ffinite-math-only isa=4 -mhard-float" } */
 /* { dg-final { scan-assembler "nmadd.s" } } */
 /* { dg-final { scan-assembler "nmadd.d" } } */
 /* { dg-final { scan-assembler "nmsub.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/nmadd-3.c b/gcc/testsuite/gcc.target/mips/nmadd-3.c
index 381fdef08fb..df726186128 100644
--- a/gcc/testsuite/gcc.target/mips/nmadd-3.c
+++ b/gcc/testsuite/gcc.target/mips/nmadd-3.c
@@ -1,7 +1,7 @@
 /* The same code as nmadd-2.c, but compiled with -fno-finite-math-only.
    We can't use nmadd and nmsub in that case.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -fno-fast-math -fno-finite-math-only -mips4 -mhard-float" } */
+/* { dg-options "-O2 -fno-fast-math -fno-finite-math-only isa=4 -mhard-float" } */
 /* { dg-final { scan-assembler-not "nmadd.s" } } */
 /* { dg-final { scan-assembler-not "nmadd.d" } } */
 /* { dg-final { scan-assembler-not "nmsub.s" } } */
diff --git a/gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c b/gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c
index 6d1d7e8c0ec..ee7f3d54d5d 100644
--- a/gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c
+++ b/gcc/testsuite/gcc.target/mips/no-smartmips-lwxs.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -mno-smartmips" } */
+/* { dg-options "-O -mno-smartmips" } */
 
 NOMIPS16 int scaled_indexed_word_load (int a[], int b)
 {
diff --git a/gcc/testsuite/gcc.target/mips/no-smartmips-ror-1.c b/gcc/testsuite/gcc.target/mips/no-smartmips-ror-1.c
index 6433397f4e3..d1f50a8fbef 100644
--- a/gcc/testsuite/gcc.target/mips/no-smartmips-ror-1.c
+++ b/gcc/testsuite/gcc.target/mips/no-smartmips-ror-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -mno-smartmips -march=mips32" } */
+/* { dg-options "-O -mno-smartmips -march=mips32" } */
 
 NOMIPS16 int rotate_left (unsigned a, unsigned s)
 {
diff --git a/gcc/testsuite/gcc.target/mips/octeon-baddu-1.c b/gcc/testsuite/gcc.target/mips/octeon-baddu-1.c
index 97aacc58a2a..8dd5be16765 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-baddu-1.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-baddu-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=octeon" } */
+/* { dg-options "-O -march=octeon" } */
 /* { dg-final { scan-assembler-times "\tbaddu\t" 4 } } */
 /* { dg-final { scan-assembler-not "\tandi\t" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/octeon-bbit-1.c b/gcc/testsuite/gcc.target/mips/octeon-bbit-1.c
index 24fd72884e7..6629dbb5844 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-bbit-1.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-bbit-1.c
@@ -1,9 +1,11 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=octeon" } */
+/* { dg-options "-O2 -march=octeon" } */
 /* { dg-final { scan-assembler-times "\tbbit1\t" 4 } } */
 /* { dg-final { scan-assembler-times "\tbbit0\t" 2 } } */
 /* { dg-final { scan-assembler-not "andi\t" } } */
 
+NOMIPS16 void foo (void);
+
 NOMIPS16 void
 f1 (long long i)
 {
@@ -51,5 +53,5 @@ NOMIPS16 void
 f6 ()
 {
   if (!test_bit(0, &r))
-    g ();
+    foo ();
 }
diff --git a/gcc/testsuite/gcc.target/mips/octeon-bbit-2.c b/gcc/testsuite/gcc.target/mips/octeon-bbit-2.c
index 6be7ef58643..55bf23eae4e 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-bbit-2.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-bbit-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=octeon -mbranch-likely" } */
+/* { dg-options "-O2 -march=octeon -mbranch-likely" } */
 /* { dg-final { scan-assembler "\tbbit\[01\]\t" } } */
 /* { dg-final { scan-assembler-not "\tbbit\[01\]l\t" } } */
 /* { dg-final { scan-assembler "\tbnel\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/octeon-bbit-3.c b/gcc/testsuite/gcc.target/mips/octeon-bbit-3.c
index fd01f12181d..bcc37d29e34 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-bbit-3.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-bbit-3.c
@@ -11,7 +11,7 @@
 
   which does not get recognized as a valid bbit pattern.  The
   middle-end should be able to simplify this further.  */
-/* { dg-mips-options "-O2 -march=octeon -meb" } */
+/* { dg-options "-O2 -march=octeon -meb" } */
 
 /* { dg-final { scan-assembler-times "\tbbit\[01\]\t|\tbgez\t" 2 } } */
 /* { dg-final { scan-assembler-not "ext\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/octeon-cins-1.c b/gcc/testsuite/gcc.target/mips/octeon-cins-1.c
index 27dc6b3d2b7..ac85e237846 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-cins-1.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-cins-1.c
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* The tests also work with -mgp32.  For long long tests, only one of
    the 32-bit parts is used.  */
-/* { dg-mips-options "-O -march=octeon" } */
+/* { dg-options "-O -march=octeon" } */
 /* { dg-final { scan-assembler-times "\tcins\t" 3 } } */
 /* { dg-final { scan-assembler-not "\tandi\t|sll\t" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/octeon-cins-2.c b/gcc/testsuite/gcc.target/mips/octeon-cins-2.c
index c60ee933ffa..2dcff0aad1c 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-cins-2.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-cins-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=octeon -mgp64" } */
+/* { dg-options "-O -march=octeon -mgp64" } */
 /* { dg-final { scan-assembler-not "\tcins\t" } } */
 
 NOMIPS16 unsigned
diff --git a/gcc/testsuite/gcc.target/mips/octeon-dmul-1.c b/gcc/testsuite/gcc.target/mips/octeon-dmul-1.c
index 1cbf7a63c51..b8b8c1bc324 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-dmul-1.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-dmul-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=octeon -mgp64" } */
+/* { dg-options "-march=octeon -mgp64" } */
 /* { dg-final { scan-assembler "\tdmul\t" } } */
 /* { dg-final { scan-assembler-not "\tdmult\t" } } */
 /* { dg-final { scan-assembler-not "\tmflo\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/octeon-dmul-2.c b/gcc/testsuite/gcc.target/mips/octeon-dmul-2.c
index 2e8e4e61033..6b2308c0bba 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-dmul-2.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-dmul-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=octeon -mgp64" } */
+/* { dg-options "-march=octeon -mgp64" } */
 /* { dg-final { scan-assembler-not "\tdmul" } } */
 
 NOMIPS16 long long
diff --git a/gcc/testsuite/gcc.target/mips/octeon-exts-1.c b/gcc/testsuite/gcc.target/mips/octeon-exts-1.c
index bdaa0b927ef..b0f4be143fc 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-exts-1.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-exts-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=octeon" } */
+/* { dg-options "-march=octeon" } */
 /* { dg-final { scan-assembler "\texts\t" } } */
 
 struct foo
diff --git a/gcc/testsuite/gcc.target/mips/octeon-exts-2.c b/gcc/testsuite/gcc.target/mips/octeon-exts-2.c
index 7847cf9411b..fc5df639d02 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-exts-2.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-exts-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=octeon -meb" } */
+/* { dg-options "-O -march=octeon -meb" } */
 /* { dg-final { scan-assembler-times "\texts\t" 4 } } */
 
 struct bar
diff --git a/gcc/testsuite/gcc.target/mips/octeon-exts-3.c b/gcc/testsuite/gcc.target/mips/octeon-exts-3.c
index d7610f82e32..9d0e9302a54 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-exts-3.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-exts-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=octeon -mgp64" } */
+/* { dg-options "-O -march=octeon -mgp64" } */
 /* { dg-final { scan-assembler-times "\texts\t" 3 } } */
 
 struct foo
diff --git a/gcc/testsuite/gcc.target/mips/octeon-exts-4.c b/gcc/testsuite/gcc.target/mips/octeon-exts-4.c
index 475fa21e8dc..7e6a578a19c 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-exts-4.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-exts-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=octeon -mgp64" } */
+/* { dg-options "-O -march=octeon -mgp64" } */
 /* { dg-final { scan-assembler-not "\tsll\t\[^\n\]*,0" } } */
 /* { dg-final { scan-assembler-times "\texts\t" 6 } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/octeon-exts-5.c b/gcc/testsuite/gcc.target/mips/octeon-exts-5.c
index 31251e74763..e7a4738b96f 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-exts-5.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-exts-5.c
@@ -1,6 +1,6 @@
 /* -mel version of octeon-exts-2.c.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=octeon -mel" } */
+/* { dg-options "-O -march=octeon -mel" } */
 /* { dg-final { scan-assembler-times "\texts\t" 4 } } */
 
 struct bar
diff --git a/gcc/testsuite/gcc.target/mips/octeon-pop-1.c b/gcc/testsuite/gcc.target/mips/octeon-pop-1.c
index 2554af6c821..54d2e9c04aa 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-pop-1.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-pop-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=octeon -mgp64" } */
+/* { dg-options "-O -march=octeon -mgp64" } */
 /* { dg-final { scan-assembler "\tpop\t" } } */
 /* { dg-final { scan-assembler "\tdpop\t" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/octeon-seq-1.c b/gcc/testsuite/gcc.target/mips/octeon-seq-1.c
index 3199cd7ad2a..c07660a2e66 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-seq-1.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-seq-1.c
@@ -1,7 +1,7 @@
 /* Check if we expand seq and sne.  */
 
 /* { dg-do compile } */
-/* { dg-mips-options "-march=octeon" } */
+/* { dg-options "-march=octeon" } */
 /* { dg-final { scan-assembler-times "\tseq\t|\tseqi\t" 4 } } */
 /* { dg-final { scan-assembler-times "\tsne\t|\tsnei\t" 4 } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/octeon-seq-2.c b/gcc/testsuite/gcc.target/mips/octeon-seq-2.c
index 994e51b7738..83e068c54fd 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-seq-2.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-seq-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=octeon -mgp64" } */
+/* { dg-options "-march=octeon -mgp64" } */
 /* { dg-final { scan-assembler-times "\tseq\t|\tseqi\t" 3 } } */
 /* { dg-final { scan-assembler-times "\tsne\t|\tsnei\t" 3 } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/octeon-seq-3.c b/gcc/testsuite/gcc.target/mips/octeon-seq-3.c
index 522d0eaa4e3..899f145844b 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-seq-3.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-seq-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -march=octeon -mgp64" } */
+/* { dg-options "-O -march=octeon -mgp64" } */
 
 /* { dg-final { scan-assembler-not "and\t\|andi\t\|ext\t\|sll\t\|srl\t" } } */
 /* { dg-final { scan-assembler-times "\tseqi\t\|\tsnei\t" 4 } } */
diff --git a/gcc/testsuite/gcc.target/mips/octeon-seq-4.c b/gcc/testsuite/gcc.target/mips/octeon-seq-4.c
index 88a71001be9..e61bcb361c0 100644
--- a/gcc/testsuite/gcc.target/mips/octeon-seq-4.c
+++ b/gcc/testsuite/gcc.target/mips/octeon-seq-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=octeon" } */
+/* { dg-options "-O2 -march=octeon" } */
 /* { dg-final { scan-assembler-not "xor" } } */
 
 unsigned
diff --git a/gcc/testsuite/gcc.target/mips/pr26765.c b/gcc/testsuite/gcc.target/mips/pr26765.c
index bf90f279174..25c2e8d4c83 100644
--- a/gcc/testsuite/gcc.target/mips/pr26765.c
+++ b/gcc/testsuite/gcc.target/mips/pr26765.c
@@ -2,7 +2,7 @@
    This testcase used to trigger an unrecognizable insn.  */
 
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -w" } */
+/* { dg-options "-O2 -w" } */
 
 __thread int *a = 0;
 
diff --git a/gcc/testsuite/gcc.target/mips/pr33256.c b/gcc/testsuite/gcc.target/mips/pr33256.c
index e19c93291a2..ead5888cc07 100644
--- a/gcc/testsuite/gcc.target/mips/pr33256.c
+++ b/gcc/testsuite/gcc.target/mips/pr33256.c
@@ -1,6 +1,6 @@
 /* GCC used to report an ICE for this test because we generated a LO_SUM
    for an illegitimate constant.  */
-/* { dg-mips-options "-mabi=64 -msym32 -O2 -EB -mno-abicalls" } */
+/* { dg-options "-mabi=64 -msym32 -O2 -EB -mno-abicalls" } */
 extern unsigned long a[];
 int b (int);
 
diff --git a/gcc/testsuite/gcc.target/mips/pr33635-1.c b/gcc/testsuite/gcc.target/mips/pr33635-1.c
index 34251e47fdf..78e761f71c5 100644
--- a/gcc/testsuite/gcc.target/mips/pr33635-1.c
+++ b/gcc/testsuite/gcc.target/mips/pr33635-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mabi=64 -O2" } */
+/* { dg-options "-mabi=64 -O2" } */
 
 NOMIPS16 long double __powitf2 (long double x, int m)
 {
diff --git a/gcc/testsuite/gcc.target/mips/pr33755.c b/gcc/testsuite/gcc.target/mips/pr33755.c
index a550480ddd7..ca6a1e6984d 100644
--- a/gcc/testsuite/gcc.target/mips/pr33755.c
+++ b/gcc/testsuite/gcc.target/mips/pr33755.c
@@ -1,5 +1,5 @@
 /* { dg-do link } */
-/* { dg-mips-options "-O2" } */
+/* { dg-options "-O2" } */
 
 volatile int gv;
 const char *ptrs[2];
diff --git a/gcc/testsuite/gcc.target/mips/pr34831.c b/gcc/testsuite/gcc.target/mips/pr34831.c
index 3cdcd4a72ca..2da436f71b8 100644
--- a/gcc/testsuite/gcc.target/mips/pr34831.c
+++ b/gcc/testsuite/gcc.target/mips/pr34831.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-ffast-math -mips64 -mgp32" } */
+/* { dg-options "-ffast-math -mips64 -mgp32" } */
 
 double
 foo (void)
diff --git a/gcc/testsuite/gcc.target/mips/pr35802.c b/gcc/testsuite/gcc.target/mips/pr35802.c
index 34300980695..9ecc4d06ea6 100644
--- a/gcc/testsuite/gcc.target/mips/pr35802.c
+++ b/gcc/testsuite/gcc.target/mips/pr35802.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -march=74kc -mgp32" } */
+/* { dg-options "-O2 -march=74kc -mgp32" } */
 __thread int x __attribute__((tls_model("initial-exec")));
 __thread int y __attribute__((tls_model("initial-exec")));
 
diff --git a/gcc/testsuite/gcc.target/mips/pr37362.c b/gcc/testsuite/gcc.target/mips/pr37362.c
index a356b787035..14e3a75f1bb 100644
--- a/gcc/testsuite/gcc.target/mips/pr37362.c
+++ b/gcc/testsuite/gcc.target/mips/pr37362.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=mips64r2 -mabi=n32" } */
+/* { dg-options "-march=mips64r2 -mabi=n32" } */
 
 typedef float TFtype __attribute__((mode(TF)));
 
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c
index fd13d8ac876..b271e2bf416 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mabi=64 -mr10k-cache-barrier=store" } */
+/* { dg-options "-O2 -mabi=64 -mr10k-cache-barrier=store" } */
 
 /* Test that stores to uncached addresses do not get unnecessary
    cache barriers.  */
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c
index 405d7fcf033..68c4b7ef239 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-10.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -mips4 -mbranch-likely -mno-abicalls" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mips4 -mbranch-likely -mno-abicalls" } */
 int bar (int);
 
 /* Test that code after a branch-likely does not get an unnecessary
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-11.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-11.c
index be6816fda9b..d1082d910d8 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-11.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-11.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
 
 /* Test that loads are not unnecessarily protected.  */
 
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-12.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-12.c
index 7e8026f1e5f..d4163910900 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-12.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-12.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=load-store -mno-abicalls" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=load-store -mno-abicalls" } */
 
 /* Test that loads are correctly protected.  */
 
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-13.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-13.c
index fa5a416ce20..3e955abf549 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-13.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-13.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store" } */
 
 /* Test that indirect calls are protected.  */
 
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-14.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-14.c
index 4d807833abb..1fdcee0e25a 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-14.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-14.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -O2 -mr10k-cache-barrier=store" } */
 
 /* Test that indirect calls are protected.  */
 
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-15.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-15.c
index 5b03838ca2c..a3e7f0db92c 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-15.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-15.c
@@ -1,2 +1,2 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -mips2" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mips2" } */
 /* { dg-error "requires.*cache.*instruction" "" { target *-*-* } 0 } */
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-2.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-2.c
index ed439b143f5..3d06d0ddb6e 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-2.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-2.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mabi=64 -mr10k-cache-barrier=store" } */
+/* { dg-options "-O2 -mabi=64 -mr10k-cache-barrier=store" } */
 
 /* Test that stores to constant cached addresses are protected
    by cache barriers.  */
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-3.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-3.c
index 8238f39b04c..be2c7fbd76e 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-3.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-3.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
 
 /* Test that in-range stores to the frame are not protected by
    cache barriers.  */
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-4.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-4.c
index e8280e8af27..9dd23eafa78 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-4.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-4.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
 
 void bar (int *x);
 
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-5.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-5.c
index 6e21ec3e393..a6b53a9ea34 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-5.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-5.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -mno-abicalls -mabi=64" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mno-abicalls -mabi=64" } */
 
 /* Test that in-range stores to static objects do not get an unnecessary
    cache barrier.  */
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-6.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-6.c
index f014aa0dcdc..c52caaa1ad2 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-6.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-6.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -mabi=64" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mabi=64" } */
 
 int x[4];
 void bar (void);
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-7.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-7.c
index c98b4a8a0fe..3f738654cc1 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-7.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-7.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -mno-abicalls" } */
 
 void bar1 (void);
 void bar2 (void);
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-8.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-8.c
index 5394ae8067e..394bf486f38 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-8.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-8.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -G8" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -G8" } */
 
 /* Test that in-range stores to components of static objects
    do not get an unnecessary cache barrier.  */
diff --git a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-9.c b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-9.c
index cf795b6e732..67b52f92d35 100644
--- a/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-9.c
+++ b/gcc/testsuite/gcc.target/mips/r10k-cache-barrier-9.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O2 -mr10k-cache-barrier=store -G8" } */
+/* { dg-options "-O2 -mr10k-cache-barrier=store -G8" } */
 
 /* Test that out-of-range stores to components of static objects
    are protected by a cache barrier.  */
diff --git a/gcc/testsuite/gcc.target/mips/r3900-mult.c b/gcc/testsuite/gcc.target/mips/r3900-mult.c
index 393f1086e07..4dc2b003f35 100644
--- a/gcc/testsuite/gcc.target/mips/r3900-mult.c
+++ b/gcc/testsuite/gcc.target/mips/r3900-mult.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-march=r3900" } */
+/* { dg-options "-march=r3900" } */
 /* { dg-final { scan-assembler "\tmult\t\[^\n\]*,\[^\n\]*," } } */
 
 NOMIPS16 int
diff --git a/gcc/testsuite/gcc.target/mips/rsqrt-1.c b/gcc/testsuite/gcc.target/mips/rsqrt-1.c
index 4cc6212c351..f0a9b3aed62 100644
--- a/gcc/testsuite/gcc.target/mips/rsqrt-1.c
+++ b/gcc/testsuite/gcc.target/mips/rsqrt-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -ffast-math -mips4 -mhard-float -mgp64" } */
+/* { dg-options "-O2 -ffast-math isa=4 -mhard-float -mgp64" } */
 /* { dg-final { scan-assembler "rsqrt.d" } } */
 /* { dg-final { scan-assembler "rsqrt.s" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/rsqrt-2.c b/gcc/testsuite/gcc.target/mips/rsqrt-2.c
index 03a001356f0..bc81039d523 100644
--- a/gcc/testsuite/gcc.target/mips/rsqrt-2.c
+++ b/gcc/testsuite/gcc.target/mips/rsqrt-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -ffast-math -mips4 -mhard-float -mgp64" } */
+/* { dg-options "-O2 -ffast-math isa=4 -mhard-float -mgp64" } */
 /* { dg-final { scan-assembler "rsqrt.d" } } */
 /* { dg-final { scan-assembler "rsqrt.s" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/rsqrt-3.c b/gcc/testsuite/gcc.target/mips/rsqrt-3.c
index 76cee835eb6..cfa771ef86b 100644
--- a/gcc/testsuite/gcc.target/mips/rsqrt-3.c
+++ b/gcc/testsuite/gcc.target/mips/rsqrt-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -mips4 -mhard-float" } */
+/* { dg-options "-O2 isa=4 -mhard-float" } */
 /* { dg-final { scan-assembler-not "rsqrt.d" } } */
 /* { dg-final { scan-assembler-not "rsqrt.s" } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/rsqrt-4.c b/gcc/testsuite/gcc.target/mips/rsqrt-4.c
index 7f7da6452ed..726c35403dc 100644
--- a/gcc/testsuite/gcc.target/mips/rsqrt-4.c
+++ b/gcc/testsuite/gcc.target/mips/rsqrt-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -ffast-math -mips64 -mhard-float -mgp32" } */
+/* { dg-options "-O2 -ffast-math -mips64 -mhard-float -mgp32" } */
 /* { dg-final { scan-assembler-not "\trsqrt.d\t" } } */
 /* { dg-final { scan-assembler-times "\trsqrt.s\t" 2 } } */
 
diff --git a/gcc/testsuite/gcc.target/mips/save-restore-1.c b/gcc/testsuite/gcc.target/mips/save-restore-1.c
index 9c8017c7c65..f6a854ee9f3 100644
--- a/gcc/testsuite/gcc.target/mips/save-restore-1.c
+++ b/gcc/testsuite/gcc.target/mips/save-restore-1.c
@@ -1,7 +1,5 @@
 /* Check that we can use the save instruction to save varargs.  */
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mips32r2 -mabi=32 -O2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev>=1 -mabi=32 -O2" } */
 
 #include <stdarg.h>
 
diff --git a/gcc/testsuite/gcc.target/mips/save-restore-2.c b/gcc/testsuite/gcc.target/mips/save-restore-2.c
index de082d331cd..4a11bc21083 100644
--- a/gcc/testsuite/gcc.target/mips/save-restore-2.c
+++ b/gcc/testsuite/gcc.target/mips/save-restore-2.c
@@ -1,7 +1,5 @@
 /* Check that we can use the save instruction to save spilled arguments.  */
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mips32r2 -mabi=32 -O2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev>=1 -mabi=32 -O2" } */
 
 MIPS16 void
 foo (int *a, int b, int c)
diff --git a/gcc/testsuite/gcc.target/mips/save-restore-3.c b/gcc/testsuite/gcc.target/mips/save-restore-3.c
index a73e83b9fff..d45fe50ea6b 100644
--- a/gcc/testsuite/gcc.target/mips/save-restore-3.c
+++ b/gcc/testsuite/gcc.target/mips/save-restore-3.c
@@ -1,8 +1,6 @@
 /* Check that we can use the save instruction to save spilled arguments
    when the argument save area is out of range of a direct load or store.  */
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mips32r2 -mabi=32 -O2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev>=1 -mabi=32 -O2" } */
 
 void bar (int *);
 
diff --git a/gcc/testsuite/gcc.target/mips/save-restore-4.c b/gcc/testsuite/gcc.target/mips/save-restore-4.c
index 13f1f0454ee..ef7722bce09 100644
--- a/gcc/testsuite/gcc.target/mips/save-restore-4.c
+++ b/gcc/testsuite/gcc.target/mips/save-restore-4.c
@@ -1,7 +1,5 @@
 /* Check that we can use the save instruction to save $16, $17 and $31.  */
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-mips32r2 -mabi=32 -O2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev>=1 -mabi=32 -O2" } */
 
 void bar (void);
 
diff --git a/gcc/testsuite/gcc.target/mips/save-restore-5.c b/gcc/testsuite/gcc.target/mips/save-restore-5.c
index a7e82ba144f..0dd823a6813 100644
--- a/gcc/testsuite/gcc.target/mips/save-restore-5.c
+++ b/gcc/testsuite/gcc.target/mips/save-restore-5.c
@@ -1,7 +1,5 @@
 /* Check that we don't try to save the same register twice.  */
-/* { dg-do assemble { target mips16_attribute } } */
-/* { dg-mips-options "-mips32r2 -mgp32 -O2" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) isa_rev>=1 -mgp32 -O2" } */
 
 int bar (int, int, int, int);
 void frob (void);
diff --git a/gcc/testsuite/gcc.target/mips/sb1-1.c b/gcc/testsuite/gcc.target/mips/sb1-1.c
index 6bf8ea7abf8..819938fcdc0 100644
--- a/gcc/testsuite/gcc.target/mips/sb1-1.c
+++ b/gcc/testsuite/gcc.target/mips/sb1-1.c
@@ -1,6 +1,6 @@
 /* Test SB-1 v2sf extensions.  */
 /* { dg-do compile } */ 
-/* { dg-mips-options "-march=sb1 -O2 -mpaired-single -mgp64 -ffast-math" } */
+/* { dg-options "-march=sb1 -O2 -mpaired-single -mgp64 -ffast-math" } */
 /* { dg-final { scan-assembler "div.ps" } } */ 
 /* { dg-final { scan-assembler "recip.ps" } } */ 
 /* { dg-final { scan-assembler "sqrt.ps" } } */ 
diff --git a/gcc/testsuite/gcc.target/mips/scc-1.c b/gcc/testsuite/gcc.target/mips/scc-1.c
index 4bd4a4c2fb2..d0dc040151c 100644
--- a/gcc/testsuite/gcc.target/mips/scc-1.c
+++ b/gcc/testsuite/gcc.target/mips/scc-1.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-O -mips32" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -O isa_rev>=1" } */
 
 /* { dg-final { scan-assembler-times {slt	\$2,\$5,\$4} 1 } } */
 /* { dg-final { scan-assembler-times {sltu	\$2,\$5,\$4} 1 } } */
diff --git a/gcc/testsuite/gcc.target/mips/scc-2.c b/gcc/testsuite/gcc.target/mips/scc-2.c
index c6c79d8cb61..440c28b84bf 100644
--- a/gcc/testsuite/gcc.target/mips/scc-2.c
+++ b/gcc/testsuite/gcc.target/mips/scc-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -mgp64" } */
+/* { dg-options "-O -mgp64" } */
 
 /* { dg-final { scan-assembler-not "and\t\|andi\t\|ext\t\|sll\t\|srl\t" } } */
 /* { dg-final { scan-assembler-times "slt\t\|slti?u\t" 12 } } */
diff --git a/gcc/testsuite/gcc.target/mips/scc-3.c b/gcc/testsuite/gcc.target/mips/scc-3.c
index 445a324bb8a..b295e782c2d 100644
--- a/gcc/testsuite/gcc.target/mips/scc-3.c
+++ b/gcc/testsuite/gcc.target/mips/scc-3.c
@@ -1,6 +1,4 @@
-/* { dg-do compile { target mips16_attribute } } */
-/* { dg-mips-options "-O -mabi=o64" } */
-/* { dg-add-options mips16_attribute } */
+/* { dg-options "(-mips16) -O -mabi=o64" } */
 
 /* { dg-final { scan-assembler-not "and\t\|andi\t\|ext\t\|sll\t\|srl\t" } } */
 /* { dg-final { scan-assembler-times "slt\t\|slti?u\t" 8 } } */
diff --git a/gcc/testsuite/gcc.target/mips/scc-4.c b/gcc/testsuite/gcc.target/mips/scc-4.c
index fd6e9326789..40460666c7f 100644
--- a/gcc/testsuite/gcc.target/mips/scc-4.c
+++ b/gcc/testsuite/gcc.target/mips/scc-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -mabi=o64" } */
+/* { dg-options "-O -mabi=o64" } */
 
 /* { dg-final { scan-assembler "slt\t" } } */
 /* { dg-final { scan-assembler "sltu\t\|xor\t\|xori\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/sdata-1.c b/gcc/testsuite/gcc.target/mips/sdata-1.c
index 2acfdef384d..f9a25cdc9f7 100644
--- a/gcc/testsuite/gcc.target/mips/sdata-1.c
+++ b/gcc/testsuite/gcc.target/mips/sdata-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-G4 -mexplicit-relocs" } */
+/* { dg-options "-G4 -mexplicit-relocs" } */
 
 /* { dg-final { scan-assembler     "%gp_?rel\\(l4a\\)" } } */
 /* { dg-final { scan-assembler     "%gp_?rel\\(l4b\\)" } } */
diff --git a/gcc/testsuite/gcc.target/mips/sdata-2.c b/gcc/testsuite/gcc.target/mips/sdata-2.c
index 5479c813375..5a9fff2da1d 100644
--- a/gcc/testsuite/gcc.target/mips/sdata-2.c
+++ b/gcc/testsuite/gcc.target/mips/sdata-2.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-G4 -mexplicit-relocs -mno-local-sdata" } */
+/* { dg-options "-G4 -mexplicit-relocs -mno-local-sdata" } */
 
 /* { dg-final { scan-assembler-not "%gp_?rel\\(l4a\\)" } } */
 /* { dg-final { scan-assembler-not "%gp_?rel\\(l4b\\)" } } */
diff --git a/gcc/testsuite/gcc.target/mips/sdata-3.c b/gcc/testsuite/gcc.target/mips/sdata-3.c
index 3cea3d3e70c..f232324954f 100644
--- a/gcc/testsuite/gcc.target/mips/sdata-3.c
+++ b/gcc/testsuite/gcc.target/mips/sdata-3.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-G4 -mexplicit-relocs -mno-extern-sdata" } */
+/* { dg-options "-G4 -mexplicit-relocs -mno-extern-sdata" } */
 
 /* { dg-final { scan-assembler     "%gp_?rel\\(l4a\\)" } } */
 /* { dg-final { scan-assembler     "%gp_?rel\\(l4b\\)" } } */
diff --git a/gcc/testsuite/gcc.target/mips/sdata-4.c b/gcc/testsuite/gcc.target/mips/sdata-4.c
index f88348dcadb..7786c6db9e4 100644
--- a/gcc/testsuite/gcc.target/mips/sdata-4.c
+++ b/gcc/testsuite/gcc.target/mips/sdata-4.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-G4 -mexplicit-relocs -mno-gpopt" } */
+/* { dg-options "-G4 -mexplicit-relocs -mno-gpopt" } */
 
 /* { dg-final { scan-assembler-not "%gp_?rel" } } */
 /* { dg-final { scan-assembler-not "\\\$gp" } } */
diff --git a/gcc/testsuite/gcc.target/mips/smartmips-lwxs.c b/gcc/testsuite/gcc.target/mips/smartmips-lwxs.c
index d52726a45f9..c6bc495c8de 100644
--- a/gcc/testsuite/gcc.target/mips/smartmips-lwxs.c
+++ b/gcc/testsuite/gcc.target/mips/smartmips-lwxs.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 /* -mlong32 added because of PR target/38599.  */
-/* { dg-mips-options "-O -msmartmips -mlong32" } */
+/* { dg-options "-O -msmartmips -mlong32" } */
 
 NOMIPS16 int scaled_indexed_word_load (int a[], int b)
 {
diff --git a/gcc/testsuite/gcc.target/mips/smartmips-ror-1.c b/gcc/testsuite/gcc.target/mips/smartmips-ror-1.c
index c36964624f5..e9735b20a52 100644
--- a/gcc/testsuite/gcc.target/mips/smartmips-ror-1.c
+++ b/gcc/testsuite/gcc.target/mips/smartmips-ror-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -msmartmips" } */
+/* { dg-options "-O -msmartmips" } */
 
 NOMIPS16 int rotate_left (unsigned a, unsigned s)
 {
diff --git a/gcc/testsuite/gcc.target/mips/smartmips-ror-2.c b/gcc/testsuite/gcc.target/mips/smartmips-ror-2.c
index 73561c8b3c1..ac4c94df8e2 100644
--- a/gcc/testsuite/gcc.target/mips/smartmips-ror-2.c
+++ b/gcc/testsuite/gcc.target/mips/smartmips-ror-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -msmartmips" } */
+/* { dg-options "-O -msmartmips" } */
 
 NOMIPS16 int rotate_right (unsigned a, unsigned s)
 {
diff --git a/gcc/testsuite/gcc.target/mips/smartmips-ror-3.c b/gcc/testsuite/gcc.target/mips/smartmips-ror-3.c
index dada19efc71..360f3c463ff 100644
--- a/gcc/testsuite/gcc.target/mips/smartmips-ror-3.c
+++ b/gcc/testsuite/gcc.target/mips/smartmips-ror-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -msmartmips" } */
+/* { dg-options "-O -msmartmips" } */
 
 #define S 13
 
diff --git a/gcc/testsuite/gcc.target/mips/smartmips-ror-4.c b/gcc/testsuite/gcc.target/mips/smartmips-ror-4.c
index ee063614d74..b8b82944540 100644
--- a/gcc/testsuite/gcc.target/mips/smartmips-ror-4.c
+++ b/gcc/testsuite/gcc.target/mips/smartmips-ror-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-mips-options "-O -msmartmips" } */
+/* { dg-options "-O -msmartmips" } */
 
 #define S 13
 
diff --git a/gcc/testsuite/gcc.target/mips/timode-1.c b/gcc/testsuite/gcc.target/mips/timode-1.c
index 8f07db98559..fc087ee1c35 100644
--- a/gcc/testsuite/gcc.target/mips/timode-1.c
+++ b/gcc/testsuite/gcc.target/mips/timode-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-mgp64" } */
+/* { dg-options "-mgp64" } */
 typedef int int128_t __attribute__((mode(TI)));
 typedef unsigned int uint128_t __attribute__((mode(TI)));
 
diff --git a/gcc/testsuite/gcc.target/mips/timode-2.c b/gcc/testsuite/gcc.target/mips/timode-2.c
index 025dc21810a..9f3e43c41bd 100644
--- a/gcc/testsuite/gcc.target/mips/timode-2.c
+++ b/gcc/testsuite/gcc.target/mips/timode-2.c
@@ -1,4 +1,5 @@
-/* { dg-do run { target mips64 } } */
+/* { dg-do run } */
+/* { dg-options "-mgp64" } */
 typedef int int128_t __attribute__((mode(TI)));
 typedef unsigned int uint128_t __attribute__((mode(TI)));
 
diff --git a/gcc/testsuite/gcc.target/mips/truncate-1.c b/gcc/testsuite/gcc.target/mips/truncate-1.c
index 0607a700482..7e54aae3eba 100644
--- a/gcc/testsuite/gcc.target/mips/truncate-1.c
+++ b/gcc/testsuite/gcc.target/mips/truncate-1.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O -mgp64" } */
+/* { dg-options "-O -mgp64" } */
 
 #define TEST(ID, TYPE, SHIFT)				\
   int __attribute__((nomips16))				\
diff --git a/gcc/testsuite/gcc.target/mips/truncate-2.c b/gcc/testsuite/gcc.target/mips/truncate-2.c
index 51125a48190..423dc26f4da 100644
--- a/gcc/testsuite/gcc.target/mips/truncate-2.c
+++ b/gcc/testsuite/gcc.target/mips/truncate-2.c
@@ -1,4 +1,4 @@
-/* { dg-mips-options "-O -mgp64" } */
+/* { dg-options "-O -mgp64" } */
 
 #define TEST(ID, TYPE, SHIFT)				\
   int NOMIPS16						\
diff --git a/gcc/testsuite/gcc.target/mips/vr-mult-1.c b/gcc/testsuite/gcc.target/mips/vr-mult-1.c
index 9ea55af44a5..2ed4f2f9b06 100644
--- a/gcc/testsuite/gcc.target/mips/vr-mult-1.c
+++ b/gcc/testsuite/gcc.target/mips/vr-mult-1.c
@@ -1,7 +1,7 @@
 /* Make sure that mul/addu is preferred over mtlo/macc and that mul/subu
    is preferred over mtlo/msac.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr5400" } */
+/* { dg-options "-O2 -march=vr5400" } */
 NOMIPS16 int f1 (int a, int b, int c) { return a + b * c; }
 NOMIPS16 int f2 (int a, int b, int c) { return a - b * c; }
 /* { dg-final { scan-assembler "\tmul\t.*\tmul\t" } } */
diff --git a/gcc/testsuite/gcc.target/mips/vr-mult-2.c b/gcc/testsuite/gcc.target/mips/vr-mult-2.c
index 0ff3d47de70..7e8be5e4283 100644
--- a/gcc/testsuite/gcc.target/mips/vr-mult-2.c
+++ b/gcc/testsuite/gcc.target/mips/vr-mult-2.c
@@ -1,7 +1,7 @@
 /* Make sure that mul/addu is preferred over mtlo/macc and that mul/subu
    is preferred over mtlo/msac.  */
 /* { dg-do compile } */
-/* { dg-mips-options "-O2 -march=vr5500" } */
+/* { dg-options "-O2 -march=vr5500" } */
 NOMIPS16 int f1 (int a, int b, int c) { return a + b * c; }
 NOMIPS16 int f2 (int a, int b, int c) { return a - b * c; }
 /* { dg-final { scan-assembler "\tmul\t.*\tmul\t" } } */