* config/m32r/m32r.md: Remove all define_peephole's.
From-SVN: r79170
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2004-03-09 Kazu Hirata <kazu@cs.umass.edu>
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* config/m32r/m32r.md: Remove all define_peephole's.
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2004-03-09 Alan Modra <amodra@bigpond.net.au>
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* config/rs6000/rs6000.md: Remove trailing whitespace.
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@ -2599,64 +2599,6 @@
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)
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;; Split up troublesome insns for better scheduling.
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;; FIXME: Peepholes go at the end.
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;; ??? Setting the type attribute may not be useful, but for completeness
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;; we do it.
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(define_peephole
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[(set (mem:SI (plus:SI (match_operand:SI 0 "register_operand" "r")
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(const_int 4)))
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(match_operand:SI 1 "register_operand" "r"))]
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"0 && dead_or_set_p (insn, operands[0])"
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"st %1,@+%0"
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[(set_attr "type" "store2")
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(set_attr "length" "2")])
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;; This case is triggered by compiling this code:
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;;
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;; extern void sub(int *);
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;; void main (void)
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;; {
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;; int i=2,j=3,k;
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;; while (i < j) sub(&k);
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;; i = j / k;
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;; sub(&i);
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;; i = j - k;
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;; sub(&i);
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;; }
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;;
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;; Without the peephole the following assembler is generated for the
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;; divide and subtract expressions:
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;;
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;; div r5,r4
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;; mv r4,r5
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;; st r4,@(4,sp)
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;; bl sub
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;;
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;; Similar code is produced for the subtract expression. With this
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;; peephole the redundant move is eliminated.
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;;
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;; This optimization only works if PRESERVE_DEATH_INFO_REGNO_P is
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;; defined in m32r.h
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(define_peephole
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[(set (match_operand:SI 0 "register_operand" "r")
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(match_operand:SI 1 "register_operand" "r")
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)
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(set (mem:SI (plus: SI (match_operand:SI 2 "register_operand" "r")
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(match_operand:SI 3 "immediate_operand" "J")))
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(match_dup 0)
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)
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]
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"0 && dead_or_set_p (insn, operands [0])"
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"st %1,@(%3,%2)"
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[(set_attr "type" "store4")
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(set_attr "length" "4")
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]
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)
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;; Block moves, see m32r.c for more details.
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;; Argument 0 is the destination
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;; Argument 1 is the source
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