pa.c (symbolic_expression_p): New function.
* pa.c (symbolic_expression_p): New function.
(hppa_legitimize_address): Old LEGITIMIZE_ADDRESS moved
here. Handle symbol_ref + displacement addresses.
Use rounding instead of masking off lower bits.
Avoid creating useless pseudos and strip off CONST in
(const (...)) expressions to make processing easier.
From-SVN: r3571
This commit is contained in:
Jeff Law
parent
901a8cea7b
commit
c1d1b3f05f
@ -67,6 +67,21 @@ call_operand_address (op, mode)
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|| (CONSTANT_P (op) && ! TARGET_LONG_CALLS));
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}
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/* Return 1 if X contains a symbolic expression. We know these
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expressions will have one of a few well defined forms, so
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we need only check those forms. */
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int
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symbolic_expression_p (x)
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register rtx x;
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{
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/* Strip off any HIGH. */
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if (GET_CODE (x) == HIGH)
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x = XEXP (x, 0);
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return (symbolic_operand (x, VOIDmode));
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}
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int
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symbolic_operand (op, mode)
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register rtx op;
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@ -470,6 +485,142 @@ finalize_pic ()
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}
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/* Try machine-dependent ways of modifying an illegitimate address
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to be legitimate. If we find one, return the new, valid address.
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This macro is used in only one place: `memory_address' in explow.c.
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OLDX is the address as it was before break_out_memory_refs was called.
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In some cases it is useful to look at this to decide what needs to be done.
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MODE and WIN are passed so that this macro can use
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GO_IF_LEGITIMATE_ADDRESS.
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It is always safe for this macro to do nothing. It exists to recognize
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opportunities to optimize the output.
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For the PA, transform:
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memory(X + <large int>)
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into:
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if (<large int> & mask) >= 16
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Y = (<large int> & ~mask) + mask + 1 Round up.
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else
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Y = (<large int> & ~mask) Round down.
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Z = X + Y
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memory (Z + (<large int> - Y));
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This is for CSE to find several similar references, and only use one Z.
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X can either be a SYMBOL_REF or REG, but because combine can not
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perform a 4->2 combination we do nothing for SYMBOL_REF + D where
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D will not fit in 14 bits.
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MODE_FLOAT references allow displacements which fit in 5 bits, so use
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0x1f as the mask.
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MODE_INT references allow displacements which fit in 14 bits, so use
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0x3fff as the mask.
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This relies on the fact that most mode MODE_FLOAT references will use FP
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registers and most mode MODE_INT references will use integer registers.
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(In the rare case of an FP register used in an integer MODE, we depend
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on secondary reloads to clean things up.)
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It is also beneficial to handle (plus (mult (X) (Y)) (Z)) in a special
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manner if Y is 2, 4, or 8. (allows more shadd insns and shifted indexed
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adressing modes to be used).
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Put X and Z into registers. Then put the entire expression into
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a register. */
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rtx
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hppa_legitimize_address (x, oldx, mode)
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rtx x, oldx;
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enum machine_mode mode;
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{
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rtx orig = x;
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/* Strip off CONST. */
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if (GET_CODE (x) == CONST)
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x = XEXP (x, 0);
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if (GET_CODE (x) == PLUS
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&& GET_CODE (XEXP (x, 1)) == CONST_INT
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&& (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
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|| GET_CODE (XEXP (x, 0)) == REG))
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{
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rtx int_part, ptr_reg;
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int newoffset;
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int offset = INTVAL (XEXP (x, 1));
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int mask = GET_MODE_CLASS (mode) == MODE_FLOAT ? 0x1f : 0x3fff;
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/* Choose which way to round the offset. Round up if we
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are >= halfway to the next boundary. */
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if ((offset & mask) >= ((mask + 1) / 2))
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newoffset = (offset & ~ mask) + mask + 1;
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else
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newoffset = (offset & ~ mask);
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/* If the newoffset will not fit in 14 bits (ldo), then
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handling this would take 4 or 5 instructions (2 to load
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the SYMBOL_REF + 1 or 2 to load the newoffset + 1 to
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add the new offset and the SYMBOL_REF.) Combine can
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not handle 4->2 or 5->2 combinations, so do not create
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them. */
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if (! VAL_14_BITS_P (newoffset)
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&& GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
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{
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rtx const_part = gen_rtx (CONST, VOIDmode,
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gen_rtx (PLUS, SImode,
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XEXP (x, 0),
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GEN_INT (newoffset)));
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rtx tmp_reg
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= force_reg (SImode,
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gen_rtx (HIGH, SImode, const_part));
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ptr_reg
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= force_reg (SImode,
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gen_rtx (LO_SUM, SImode,
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tmp_reg, const_part));
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}
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else
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{
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if (! VAL_14_BITS_P (newoffset))
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int_part = force_reg (SImode, GEN_INT (newoffset));
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else
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int_part = GEN_INT (newoffset);
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ptr_reg = force_reg (SImode,
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gen_rtx (PLUS, SImode,
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force_reg (SImode, XEXP (x, 0)),
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int_part));
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}
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return plus_constant (ptr_reg, offset - newoffset);
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}
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if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == MULT
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&& GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
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&& shadd_constant_p (INTVAL (XEXP (XEXP (x, 0), 1))))
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{
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int val = INTVAL (XEXP (XEXP (x, 0), 1));
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rtx reg1, reg2;
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reg1 = force_reg (SImode, force_operand (XEXP (x, 1), 0));
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reg2 = force_reg (SImode,
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force_operand (XEXP (XEXP (x, 0), 0), 0));
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return force_reg (SImode,
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gen_rtx (PLUS, SImode,
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gen_rtx (MULT, SImode, reg2,
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GEN_INT (val)),
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reg1));
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}
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if (flag_pic)
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return legitimize_pic_address (x, mode, gen_reg_rtx (Pmode));
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return orig;
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}
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/* For the HPPA, REG and REG+CONST is cost 0
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and addresses involving symbolic constants are cost 2.
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