x86_64: PR target/100711: Splitters for pandn
This patch addresses PR target/100711 by introducing define_split patterns so that not/broadcast/pand may be simplified (by combine) to broadcast/pandn. This introduces two splitters one for optimizing pandn on TARGET_SSE for V4SI and V2DI, and another for vpandn on TARGET_AVX2 for V16QI, V8HI, V32QI, V16HI and V8SI. Each splitter has its own new testcase. I've also confirmed that not/broadcast/pandn is already getting simplified to broadcast/pand by the middle-end optimizers. 2021-11-30 Roger Sayle <roger@nextmovesoftware.com> Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog PR target/100711 * config/i386/sse.md (define_split): New splitters to simplify not;vec_duplicate;and as vec_duplicate;andn. gcc/testsuite/ChangeLog PR target/100711 * gcc.target/i386/pr100711-1.c: New test case. * gcc.target/i386/pr100711-2.c: New test case.
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@ -16323,6 +16323,38 @@
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]
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(const_string "<sseinsnmode>")))])
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;; PR target/100711: Split notl; vpbroadcastd; vpand as vpbroadcastd; vpandn
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(define_split
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[(set (match_operand:VI48_128 0 "register_operand")
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(and:VI48_128
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(vec_duplicate:VI48_128
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(not:<ssescalarmode>
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(match_operand:<ssescalarmode> 1 "register_operand")))
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(match_operand:VI48_128 2 "vector_operand")))]
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"TARGET_SSE"
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[(set (match_dup 3)
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(vec_duplicate:VI48_128 (match_dup 1)))
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(set (match_dup 0)
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(and:VI48_128 (not:VI48_128 (match_dup 3))
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(match_dup 2)))]
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"operands[3] = gen_reg_rtx (<MODE>mode);")
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;; PR target/100711: Split notl; vpbroadcastd; vpand as vpbroadcastd; vpandn
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(define_split
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[(set (match_operand:VI124_AVX2 0 "register_operand")
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(and:VI124_AVX2
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(vec_duplicate:VI124_AVX2
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(not:<ssescalarmode>
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(match_operand:<ssescalarmode> 1 "register_operand")))
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(match_operand:VI124_AVX2 2 "vector_operand")))]
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"TARGET_AVX2"
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[(set (match_dup 3)
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(vec_duplicate:VI124_AVX2 (match_dup 1)))
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(set (match_dup 0)
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(and:VI124_AVX2 (not:VI124_AVX2 (match_dup 3))
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(match_dup 2)))]
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"operands[3] = gen_reg_rtx (<MODE>mode);")
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(define_insn "*andnot<mode>3_mask"
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[(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v")
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(vec_merge:VI48_AVX512VL
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17
gcc/testsuite/gcc.target/i386/pr100711-1.c
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gcc/testsuite/gcc.target/i386/pr100711-1.c
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@ -0,0 +1,17 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -msse2" } */
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typedef int v4si __attribute__((vector_size (16)));
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typedef long long v2di __attribute__((vector_size (16)));
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v4si foo (int a, v4si b)
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{
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return (__extension__ (v4si) {~a, ~a, ~a, ~a}) & b;
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}
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v2di bar (long long a, v2di b)
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{
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return (__extension__ (v2di) {~a, ~a}) & b;
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}
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/* { dg-final { scan-assembler-times "pandn" 2 } } */
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47
gcc/testsuite/gcc.target/i386/pr100711-2.c
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47
gcc/testsuite/gcc.target/i386/pr100711-2.c
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@ -0,0 +1,47 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -mavx2" } */
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typedef char v16qi __attribute__ ((vector_size (16)));
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typedef short v8hi __attribute__ ((vector_size (16)));
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typedef int v4si __attribute__ ((vector_size (16)));
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typedef char v32qi __attribute__ ((vector_size (32)));
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typedef short v16hi __attribute__ ((vector_size (32)));
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typedef int v8si __attribute__ ((vector_size (32)));
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v16qi foo_v16qi (char a, v16qi b)
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{
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return (__extension__ (v16qi) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,
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~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a}) & b;
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}
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v8hi foo_v8hi (short a, v8hi b)
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{
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return (__extension__ (v8hi) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,}) & b;
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}
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v4si foo_v4si (int a, v4si b)
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{
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return (__extension__ (v4si) {~a, ~a, ~a, ~a}) & b;
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}
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v32qi foo_v32qi (char a, v32qi b)
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{
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return (__extension__ (v32qi) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,
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~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,
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~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,
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~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a}) & b;
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}
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v16hi foo_v16hi (short a, v16hi b)
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{
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return (__extension__ (v16hi) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,
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~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a}) & b;
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}
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v8si foo_v8si (int a, v8si b)
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{
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return (__extension__ (v8si) {~a, ~a, ~a, ~a, ~a, ~a, ~a, ~a,}) & b;
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}
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/* { dg-final { scan-assembler-times "vpandn" 6 } } */
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