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caller-save.c (init_caller_save): Base temporary register numbers on LAST_VIRTUAL_REGISTER + 1 rather than...

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gcc/
	* caller-save.c (init_caller_save): Base temporary register numbers
	on LAST_VIRTUAL_REGISTER + 1 rather than FIRST_PSEUDO_REGISTER.
	* cfgloopanal.c (init_set_costs): Likewise.
	* dojump.c (prefer_and_bit_test): Likewise.
	* expr.c (init_expr_target): Likewise.
	* ira.c (setup_prohibited_mode_move_regs): Likewise.
	* lower-subreg.c (init_lower_subreg): Likewise.
	* postreload.c (reload_cse_regs_1): Likewise.

From-SVN: r223688
This commit is contained in:
Richard Sandiford 2015-05-26 11:02:27 +00:00 committed by Richard Sandiford
parent 851ee5f43c
commit c3dc5e6654
8 changed files with 23 additions and 12 deletions
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11
gcc/ChangeLog
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@ -1,3 +1,14 @@
2015-05-26 Richard Sandiford <richard.sandiford@arm.com>
* caller-save.c (init_caller_save): Base temporary register numbers
on LAST_VIRTUAL_REGISTER + 1 rather than FIRST_PSEUDO_REGISTER.
* cfgloopanal.c (init_set_costs): Likewise.
* dojump.c (prefer_and_bit_test): Likewise.
* expr.c (init_expr_target): Likewise.
* ira.c (setup_prohibited_mode_move_regs): Likewise.
* lower-subreg.c (init_lower_subreg): Likewise.
* postreload.c (reload_cse_regs_1): Likewise.
2015-05-26 Richard Sandiford <richard.sandiford@arm.com>
* gensupport.h (compute_test_codes): Declare.

2
gcc/caller-save.c
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@ -286,7 +286,7 @@ init_caller_save (void)
To avoid lots of unnecessary RTL allocation, we construct all the RTL
once, then modify the memory and register operands in-place. */
test_reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
test_mem = gen_rtx_MEM (word_mode, address);
savepat = gen_rtx_SET (test_mem, test_reg);
restpat = gen_rtx_SET (test_reg, test_mem);

6
gcc/cfgloopanal.c
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@ -336,9 +336,9 @@ init_set_costs (void)
{
int speed;
rtx_insn *seq;
rtx reg1 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER);
rtx reg2 = gen_raw_REG (SImode, FIRST_PSEUDO_REGISTER + 1);
rtx addr = gen_raw_REG (Pmode, FIRST_PSEUDO_REGISTER + 2);
rtx reg1 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 1);
rtx reg2 = gen_raw_REG (SImode, LAST_VIRTUAL_REGISTER + 2);
rtx addr = gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 3);
rtx mem = validize_mem (gen_rtx_MEM (SImode, addr));
unsigned i;

2
gcc/dojump.c
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@ -198,7 +198,7 @@ prefer_and_bit_test (machine_mode mode, int bitnum)
{
/* Set up rtxes for the two variations. Use NULL as a placeholder
for the BITNUM-based constants. */
and_reg = gen_rtx_REG (mode, FIRST_PSEUDO_REGISTER);
and_reg = gen_rtx_REG (mode, LAST_VIRTUAL_REGISTER + 1);
and_test = gen_rtx_AND (mode, and_reg, NULL);
shift_test = gen_rtx_AND (mode, gen_rtx_ASHIFTRT (mode, and_reg, NULL),
const1_rtx);

4
gcc/expr.c
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@ -199,7 +199,7 @@ init_expr_target (void)
/* A scratch register we can modify in-place below to avoid
useless RTL allocations. */
reg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
insn = rtx_alloc (INSN);
pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
@ -249,7 +249,7 @@ init_expr_target (void)
}
}
mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, FIRST_PSEUDO_REGISTER));
mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))

4
gcc/ira.c
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@ -1767,8 +1767,8 @@ setup_prohibited_mode_move_regs (void)
if (ira_prohibited_mode_move_regs_initialized_p)
return;
ira_prohibited_mode_move_regs_initialized_p = true;
test_reg1 = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
test_reg2 = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
test_reg1 = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
test_reg2 = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 2);
move_pat = gen_rtx_SET (test_reg1, test_reg2);
move_insn = gen_rtx_INSN (VOIDmode, 0, 0, 0, move_pat, 0, -1, 0);
for (i = 0; i < NUM_MACHINE_MODES; i++)

4
gcc/lower-subreg.c
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@ -295,8 +295,8 @@ init_lower_subreg (void)
twice_word_mode = GET_MODE_2XWIDER_MODE (word_mode);
rtxes.target = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
rtxes.source = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER + 1);
rtxes.target = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
rtxes.source = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 2);
rtxes.set = gen_rtx_SET (rtxes.target, rtxes.source);
rtxes.zext = gen_rtx_ZERO_EXTEND (twice_word_mode, rtxes.source);
rtxes.shift = gen_rtx_ASHIFT (twice_word_mode, rtxes.source, const0_rtx);

2
gcc/postreload.c
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@ -234,7 +234,7 @@ reload_cse_regs_1 (void)
bool cfg_changed = false;
basic_block bb;
rtx_insn *insn;
rtx testreg = gen_rtx_REG (word_mode, FIRST_PSEUDO_REGISTER);
rtx testreg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
cselib_init (CSELIB_RECORD_MEMORY);
init_alias_analysis ();