toplev.c (target_options): Add value field.

* toplev.c (target_options): Add value field.
(set_target_switch): Handle target options with	values.
* doc/tm.texi: Document how fixed vs variable target
options work.
* config/alpha/alpha.h, config/arc/arc.h, config/avr/avr.h,
config/c4x/c4x.h, config/cris/aout.h, config/cris/cris.h,
config/d30v/d30v.h, config/dsp16xx/dsp16xx.h,
config/frv/frv.h, config/i386/i386.h, config/ia64/ia64.h,
config/m32r/m32r.h, config/m68hc11/m68hc11.h,
config/m68k/m68k.h, config/m88k/m88k.h, config/mcore/mcore.h,
config/mips/mips.h, config/mmix/mmix.h, config/pa/pa.h,
config/rs6000/rs6000.h, config/rs6000/sysv4.h,
config/s390/s390.h, config/sparc/sparc.h, config/v850/v850.h:
Add value initializer to target options.

From-SVN: r65756
This commit is contained in:
DJ Delorie 2003-04-17 19:18:58 -04:00 committed by DJ Delorie
parent 368018184c
commit c409ea0d30
27 changed files with 185 additions and 116 deletions

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@ -1,3 +1,20 @@
2003-04-17 DJ Delorie <dj@redhat.com>
* toplev.c (target_options): Add value field.
(set_target_switch): Handle target options with values.
* doc/tm.texi: Document how fixed vs variable target
options work.
* config/alpha/alpha.h, config/arc/arc.h, config/avr/avr.h,
config/c4x/c4x.h, config/cris/aout.h, config/cris/cris.h,
config/d30v/d30v.h, config/dsp16xx/dsp16xx.h,
config/frv/frv.h, config/i386/i386.h, config/ia64/ia64.h,
config/m32r/m32r.h, config/m68hc11/m68hc11.h,
config/m68k/m68k.h, config/m88k/m88k.h, config/mcore/mcore.h,
config/mips/mips.h, config/mmix/mmix.h, config/pa/pa.h,
config/rs6000/rs6000.h, config/rs6000/sysv4.h,
config/s390/s390.h, config/sparc/sparc.h, config/v850/v850.h:
Add value initializer to target options.
2003-04-07 Loren James Rittle <ljrittle@acm.org>
* cpppch.c (cpp_valid_state): Unconditionally initialize nl.

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@ -350,19 +350,19 @@ extern const char *alpha_tls_size_string; /* For -mtls-size= */
#define TARGET_OPTIONS \
{ \
{"cpu=", &alpha_cpu_string, \
N_("Use features of and schedule given CPU")}, \
N_("Use features of and schedule given CPU"), 0}, \
{"tune=", &alpha_tune_string, \
N_("Schedule given CPU")}, \
N_("Schedule given CPU"), 0}, \
{"fp-rounding-mode=", &alpha_fprm_string, \
N_("Control the generated fp rounding mode")}, \
N_("Control the generated fp rounding mode"), 0}, \
{"fp-trap-mode=", &alpha_fptm_string, \
N_("Control the IEEE trap mode")}, \
N_("Control the IEEE trap mode"), 0}, \
{"trap-precision=", &alpha_tp_string, \
N_("Control the precision given to fp exceptions")}, \
N_("Control the precision given to fp exceptions"), 0}, \
{"memory-latency=", &alpha_mlat_string, \
N_("Tune expected memory latency")}, \
N_("Tune expected memory latency"), 0}, \
{"tls-size=", &alpha_tls_size_string, \
N_("Specify bit size of immediate TLS offsets")}, \
N_("Specify bit size of immediate TLS offsets"), 0}, \
}
/* This macro defines names of additional specifications to put in the

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@ -138,11 +138,11 @@ extern const char *arc_cpu_string;
extern const char *arc_text_string,*arc_data_string,*arc_rodata_string;
#define TARGET_OPTIONS \
{ \
{ "cpu=", &arc_cpu_string }, \
{ "text=", &arc_text_string }, \
{ "data=", &arc_data_string }, \
{ "rodata=", &arc_rodata_string }, \
{ \
{ "cpu=", &arc_cpu_string, 0}, \
{ "text=", &arc_text_string, 0}, \
{ "data=", &arc_data_string, 0}, \
{ "rodata=", &arc_rodata_string, 0}, \
}
/* Which cpu we're compiling for. */

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@ -105,8 +105,8 @@ extern int avr_asm_only_p;
#define AVR_ENHANCED (avr_enhanced_p)
#define TARGET_OPTIONS { \
{ "init-stack=", &avr_init_stack, N_("Specify the initial stack address") }, \
{ "mcu=", &avr_mcu_name, N_("Specify the MCU name") } }
{ "init-stack=", &avr_init_stack, N_("Specify the initial stack address"), 0}, \
{ "mcu=", &avr_mcu_name, N_("Specify the MCU name"), 0} }
#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
/* This macro is a C statement to print on `stderr' a string

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@ -328,9 +328,9 @@ extern const char *c4x_rpts_cycles_string, *c4x_cpu_version_string;
#define TARGET_OPTIONS \
{ {"rpts=", &c4x_rpts_cycles_string, \
N_("Specify maximum number of iterations for RPTS") }, \
N_("Specify maximum number of iterations for RPTS"), 0}, \
{"cpu=", &c4x_cpu_version_string, \
N_("Select CPU to generate code for") } }
N_("Select CPU to generate code for"), 0} }
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro

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@ -112,7 +112,7 @@ Boston, MA 02111-1307, USA. */
#undef CRIS_SUBTARGET_LONG_OPTIONS
#define CRIS_SUBTARGET_LONG_OPTIONS \
{"elinux-stacksize=", &cris_elinux_stacksize_str, \
N_("For elinux, request a specified stack-size for this program")}, \
N_("For elinux, request a specified stack-size for this program"), 0}, \
#undef CRIS_SUBTARGET_VERSION
#define CRIS_SUBTARGET_VERSION " - a.out"

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@ -427,15 +427,15 @@ extern int target_flags;
#define TARGET_HAS_MUL_INSNS (cris_cpu_version >= CRIS_CPU_NG)
#define TARGET_OPTIONS \
{{"cpu=", &cris_cpu_str, ""}, \
{{"cpu=", &cris_cpu_str, "", 0}, \
{"arch=", &cris_cpu_str, \
N_("Generate code for the specified chip or CPU version")}, \
N_("Generate code for the specified chip or CPU version"), 0}, \
{"tune=", &cris_tune_str, \
N_("Tune alignment for the specified chip or CPU version")}, \
N_("Tune alignment for the specified chip or CPU version"), 0}, \
{"max-stackframe=", &cris_max_stackframe_str, \
N_("Warn when a stackframe is larger than the specified size")}, \
N_("Warn when a stackframe is larger than the specified size"), 0}, \
CRIS_SUBTARGET_LONG_OPTIONS \
{"ax-stackframe=", &cris_max_stackframe_str, ""}}
{"ax-stackframe=", &cris_max_stackframe_str, "", 0} }
#define CRIS_SUBTARGET_LONG_OPTIONS

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@ -146,10 +146,10 @@ extern int target_flags;
#define TARGET_OPTIONS \
{ \
{"branch-cost=", &d30v_branch_cost_string, \
N_("Change the branch costs within the compiler") }, \
N_("Change the branch costs within the compiler"), 0}, \
\
{"cond-exec=", &d30v_cond_exec_string, \
N_("Change the threshold for conversion to conditional execution") }, \
N_("Change the threshold for conversion to conditional execution"), 0}, \
}
#define TARGET_VERSION fprintf (stderr, " d30v")

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@ -269,15 +269,15 @@ extern int target_flags;
#define TARGET_OPTIONS \
{ \
{ "text=", &text_seg_name, \
N_("Specify alternate name for text section") }, \
N_("Specify alternate name for text section"), 0}, \
{ "data=", &data_seg_name, \
N_("Specify alternate name for data section") }, \
N_("Specify alternate name for data section"), 0}, \
{ "bss=", &bss_seg_name, \
N_("Specify alternate name for bss section") }, \
N_("Specify alternate name for bss section"), 0}, \
{ "const=", &const_seg_name, \
N_("Specify alternate name for constant section") }, \
N_("Specify alternate name for constant section"), 0}, \
{ "chip=", &chip_name, \
N_("Specify alternate name for dsp16xx chip") }, \
N_("Specify alternate name for dsp16xx chip"), 0}, \
}
/* Sometimes certain combinations of command options do not make sense

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@ -486,13 +486,13 @@ extern int target_flags;
"Specify the size of the short data section" } }
This declaration is optional. */
#define TARGET_OPTIONS \
{ \
{ "cpu=", &frv_cpu_string, "Set cpu type" }, \
{ "branch-cost=", &frv_branch_cost_string, "Internal debug switch" }, \
{ "cond-exec-insns=", &frv_condexec_insns_str, "Internal debug switch" }, \
{ "cond-exec-temps=", &frv_condexec_temps_str, "Internal debug switch" }, \
{ "sched-lookahead=", &frv_sched_lookahead_str,"Internal debug switch" }, \
#define TARGET_OPTIONS \
{ \
{ "cpu=", &frv_cpu_string, "Set cpu type", 0}, \
{ "branch-cost=", &frv_branch_cost_string, "Internal debug switch", 0}, \
{ "cond-exec-insns=", &frv_condexec_insns_str, "Internal debug switch", 0}, \
{ "cond-exec-temps=", &frv_condexec_temps_str, "Internal debug switch", 0}, \
{ "sched-lookahead=", &frv_sched_lookahead_str,"Internal debug switch", 0}, \
}
/* This macro is a C statement to print on `stderr' a string describing the

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@ -433,34 +433,34 @@ extern int x86_prefetch_sse;
by appending `-m' to the specified name. */
#define TARGET_OPTIONS \
{ { "tune=", &ix86_tune_string, \
N_("Schedule code for given CPU")}, \
N_("Schedule code for given CPU"), 0}, \
{ "fpmath=", &ix86_fpmath_string, \
N_("Generate floating point mathematics using given instruction set")},\
N_("Generate floating point mathematics using given instruction set"), 0},\
{ "arch=", &ix86_arch_string, \
N_("Generate code for given CPU")}, \
N_("Generate code for given CPU"), 0}, \
{ "regparm=", &ix86_regparm_string, \
N_("Number of registers used to pass integer arguments") }, \
N_("Number of registers used to pass integer arguments"), 0},\
{ "align-loops=", &ix86_align_loops_string, \
N_("Loop code aligned to this power of 2") }, \
N_("Loop code aligned to this power of 2"), 0}, \
{ "align-jumps=", &ix86_align_jumps_string, \
N_("Jump targets are aligned to this power of 2") }, \
N_("Jump targets are aligned to this power of 2"), 0}, \
{ "align-functions=", &ix86_align_funcs_string, \
N_("Function starts are aligned to this power of 2") }, \
N_("Function starts are aligned to this power of 2"), 0}, \
{ "preferred-stack-boundary=", \
&ix86_preferred_stack_boundary_string, \
N_("Attempt to keep stack aligned to this power of 2") }, \
N_("Attempt to keep stack aligned to this power of 2"), 0}, \
{ "branch-cost=", &ix86_branch_cost_string, \
N_("Branches are this expensive (1-5, arbitrary units)") }, \
N_("Branches are this expensive (1-5, arbitrary units)"), 0},\
{ "cmodel=", &ix86_cmodel_string, \
N_("Use given x86-64 code model") }, \
N_("Use given x86-64 code model"), 0}, \
{ "debug-arg", &ix86_debug_arg_string, \
"" /* Undocumented. */ }, \
"" /* Undocumented. */, 0}, \
{ "debug-addr", &ix86_debug_addr_string, \
"" /* Undocumented. */ }, \
"" /* Undocumented. */, 0}, \
{ "asm=", &ix86_asm_string, \
N_("Use given assembler dialect") }, \
N_("Use given assembler dialect"), 0}, \
{ "tls-dialect=", &ix86_tls_dialect_string, \
N_("Use given thread-local storage dialect") }, \
N_("Use given thread-local storage dialect"), 0}, \
SUBTARGET_OPTIONS \
}

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@ -238,11 +238,11 @@ extern const char *ia64_tune_string;
#define TARGET_OPTIONS \
{ \
{ "fixed-range=", &ia64_fixed_range_string, \
N_("Specify range of registers to make fixed")}, \
N_("Specify range of registers to make fixed"), 0}, \
{ "tls-size=", &ia64_tls_size_string, \
N_("Specify bit size of immediate TLS offsets")}, \
N_("Specify bit size of immediate TLS offsets"), 0}, \
{ "tune=", &ia64_tune_string, \
N_("Schedule code for given CPU")}, \
N_("Schedule code for given CPU"), 0}, \
}
/* Sometimes certain combinations of command options do not make sense on a

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@ -269,9 +269,9 @@ extern const char * m32r_sdata_string;
#define TARGET_OPTIONS \
{ \
{ "model=", & m32r_model_string, \
N_("Code size: small, medium or large") }, \
N_("Code size: small, medium or large"), 0}, \
{ "sdata=", & m32r_sdata_string, \
N_("Small data area: none, sdata, use") } \
N_("Small data area: none, sdata, use"), 0} \
SUBTARGET_OPTIONS \
}

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@ -218,9 +218,9 @@ extern short *reg_renumber; /* def in local_alloc.c */
by appending `-m' to the specified name. */
#define TARGET_OPTIONS \
{ { "reg-alloc=", &m68hc11_reg_alloc_order, \
N_("Specify the register allocation order")}, \
N_("Specify the register allocation order"), 0}, \
{ "soft-reg-count=", &m68hc11_soft_reg_count, \
N_("Indicate the number of soft registers available") }, \
N_("Indicate the number of soft registers available"), 0}, \
SUBTARGET_OPTIONS \
}

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@ -260,11 +260,11 @@ extern int target_flags;
by appending `-m' to the specified name. */
#define TARGET_OPTIONS \
{ { "align-loops=", &m68k_align_loops_string, \
N_("Loop code aligned to this power of 2") }, \
N_("Loop code aligned to this power of 2"), 0}, \
{ "align-jumps=", &m68k_align_jumps_string, \
N_("Jump targets are aligned to this power of 2") }, \
N_("Jump targets are aligned to this power of 2"), 0}, \
{ "align-functions=", &m68k_align_funcs_string, \
N_("Function starts are aligned to this power of 2") }, \
N_("Function starts are aligned to this power of 2"), 0}, \
SUBTARGET_OPTIONS \
}

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@ -249,8 +249,8 @@ extern int flag_pic; /* -fpic */
/* Macro to define table for command options with values. */
#define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \
{ "version-", &m88k_version } }
#define TARGET_OPTIONS { { "short-data-", &m88k_short_data, 0}, \
{ "version-", &m88k_version, 0} }
/* Do any checking or such that is needed after processing the -m switches. */

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@ -176,7 +176,7 @@ extern const char * mcore_stack_increment_string;
#define TARGET_OPTIONS \
{ \
{"stack-increment=", & mcore_stack_increment_string, \
N_("Maximum amount for a single stack increment operation")} \
N_("Maximum amount for a single stack increment operation"), 0} \
}
#ifndef CC1_SPEC

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@ -756,21 +756,21 @@ extern void sbss_section PARAMS ((void));
{ \
SUBTARGET_TARGET_OPTIONS \
{ "tune=", &mips_tune_string, \
N_("Specify CPU for scheduling purposes")}, \
N_("Specify CPU for scheduling purposes"), 0}, \
{ "arch=", &mips_arch_string, \
N_("Specify CPU for code generation purposes")}, \
N_("Specify CPU for code generation purposes"), 0}, \
{ "abi=", &mips_abi_string, \
N_("Specify an ABI")}, \
N_("Specify an ABI"), 0}, \
{ "ips", &mips_isa_string, \
N_("Specify a Standard MIPS ISA")}, \
N_("Specify a Standard MIPS ISA"), 0}, \
{ "entry", &mips_entry_string, \
N_("Use mips16 entry/exit psuedo ops")}, \
N_("Use mips16 entry/exit psuedo ops"), 0}, \
{ "no-mips16", &mips_no_mips16_string, \
N_("Don't use MIPS16 instructions")}, \
N_("Don't use MIPS16 instructions"), 0}, \
{ "no-flush-func", &mips_cache_flush_func, \
N_("Don't call any cache flush functions")}, \
N_("Don't call any cache flush functions"), 0}, \
{ "flush-func=", &mips_cache_flush_func, \
N_("Specify cache flush function")}, \
N_("Specify cache flush function"), 0}, \
}
/* This is meant to be redefined in the host dependent files. */

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@ -129,9 +129,9 @@ extern const char *mmix_cc1_ignored_option;
#define TARGET_OPTIONS \
{{"set-program-start=", &mmix_cc1_ignored_option, \
N_("Set start-address of the program") }, \
N_("Set start-address of the program"), 0}, \
{"set-data-start=", &mmix_cc1_ignored_option, \
N_("Set start-address of data")}}
N_("Set start-address of data"), 0} }
/* FIXME: There's no provision for profiling here. */
#define STARTFILE_SPEC \

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@ -307,9 +307,9 @@ extern int target_flags;
#define TARGET_OPTIONS \
{ \
{ "schedule=", &pa_cpu_string, \
N_("Specify CPU for scheduling purposes") }, \
N_("Specify CPU for scheduling purposes"), 0}, \
{ "arch=", &pa_arch_string, \
N_("Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later.") }\
N_("Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later."), 0}\
}
/* Specify the dialect of assembler to use. New mnemonics is dialect one

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@ -376,26 +376,26 @@ extern enum processor_type rs6000_cpu;
#define TARGET_OPTIONS \
{ \
{"cpu=", &rs6000_select[1].string, \
N_("Use features of and schedule code for given CPU") }, \
N_("Use features of and schedule code for given CPU"), 0}, \
{"tune=", &rs6000_select[2].string, \
N_("Schedule code for given CPU") }, \
{"debug=", &rs6000_debug_name, N_("Enable debug output") }, \
N_("Schedule code for given CPU"), 0}, \
{"debug=", &rs6000_debug_name, N_("Enable debug output"), 0}, \
{"traceback=", &rs6000_traceback_name, \
N_("Select full, part, or no traceback table") }, \
{"abi=", &rs6000_abi_string, N_("Specify ABI to use") }, \
N_("Select full, part, or no traceback table"), 0}, \
{"abi=", &rs6000_abi_string, N_("Specify ABI to use"), 0}, \
{"long-double-", &rs6000_long_double_size_string, \
N_("Specify size of long double (64 or 128 bits)") }, \
N_("Specify size of long double (64 or 128 bits)"), 0}, \
{"isel=", &rs6000_isel_string, \
N_("Specify yes/no if isel instructions should be generated") }, \
N_("Specify yes/no if isel instructions should be generated"), 0}, \
{"spe=", &rs6000_spe_string, \
N_("Specify yes/no if SPE SIMD instructions should be generated") },\
N_("Specify yes/no if SPE SIMD instructions should be generated"), 0},\
{"float-gprs=", &rs6000_float_gprs_string, \
N_("Specify yes/no if using floating point in the GPRs") }, \
{"vrsave=", &rs6000_altivec_vrsave_string, \
N_("Specify yes/no if VRSAVE instructions should be generated for AltiVec") }, \
N_("Specify yes/no if using floating point in the GPRs"), 0}, \
{"vrsave=", &rs6000_altivec_vrsave_string, \
N_("Specify yes/no if VRSAVE instructions should be generated for AltiVec"), 0}, \
{"longcall", &rs6000_longcall_switch, \
N_("Avoid all range limits on call instructions") }, \
{"no-longcall", &rs6000_longcall_switch, "" }, \
N_("Avoid all range limits on call instructions"), 0}, \
{"no-longcall", &rs6000_longcall_switch, "", 0}, \
SUBTARGET_OPTIONS \
}

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@ -82,9 +82,9 @@ extern const char *rs6000_sdata_name;
/* Override rs6000.h definition. */
#undef SUBTARGET_OPTIONS
#define SUBTARGET_OPTIONS \
{ "call-", &rs6000_abi_name, N_("Select ABI calling convention") }, \
{ "sdata=", &rs6000_sdata_name, N_("Select method for sdata handling") }
#define SUBTARGET_OPTIONS \
{ "call-", &rs6000_abi_name, N_("Select ABI calling convention"), 0}, \
{ "sdata=", &rs6000_sdata_name, N_("Select method for sdata handling"), 0}
/* Max # of bytes for variables to automatically be put into the .sdata
or .sdata2 sections. */

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@ -114,9 +114,9 @@ extern int target_flags;
#define TARGET_OPTIONS \
{ { "tune=", &s390_tune_string, \
N_("Schedule code for given CPU")}, \
N_("Schedule code for given CPU"), 0}, \
{ "arch=", &s390_arch_string, \
N_("Generate code for given CPU")}, \
N_("Generate code for given CPU"), 0}, \
}
/* Target version string. Overridden by the OS header. */

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@ -632,11 +632,11 @@ extern enum processor_type sparc_cpu;
#define TARGET_OPTIONS \
{ \
{ "cpu=", &sparc_select[1].string, \
N_("Use features of and schedule code for given CPU") }, \
N_("Use features of and schedule code for given CPU"), 0}, \
{ "tune=", &sparc_select[2].string, \
N_("Schedule code for given CPU") }, \
N_("Schedule code for given CPU"), 0}, \
{ "cmodel=", &sparc_cmodel_string, \
N_("Use given SPARC code model") }, \
N_("Use given SPARC code model"), 0}, \
SUBTARGET_OPTIONS \
}

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@ -220,14 +220,14 @@ extern struct small_memory_info small_memory[(int)SMALL_MEMORY_max];
#define TARGET_OPTIONS \
{ \
{ "tda=", &small_memory[ (int)SMALL_MEMORY_TDA ].value, \
N_("Set the max size of data eligible for the TDA area") }, \
{ "tda-", &small_memory[ (int)SMALL_MEMORY_TDA ].value, "" }, \
N_("Set the max size of data eligible for the TDA area"), 0}, \
{ "tda-", &small_memory[ (int)SMALL_MEMORY_TDA ].value, "", 0}, \
{ "sda=", &small_memory[ (int)SMALL_MEMORY_SDA ].value, \
N_("Set the max size of data eligible for the SDA area") }, \
{ "sda-", &small_memory[ (int)SMALL_MEMORY_SDA ].value, "" }, \
N_("Set the max size of data eligible for the SDA area"), 0}, \
{ "sda-", &small_memory[ (int)SMALL_MEMORY_SDA ].value, "", 0}, \
{ "zda=", &small_memory[ (int)SMALL_MEMORY_ZDA ].value, \
N_("Set the max size of data eligible for the ZDA area") }, \
{ "zda-", &small_memory[ (int)SMALL_MEMORY_ZDA ].value, "" }, \
N_("Set the max size of data eligible for the ZDA area"), 0}, \
{ "zda-", &small_memory[ (int)SMALL_MEMORY_ZDA ].value, "", 0}, \
}
/* Sometimes certain combinations of command options do not make

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@ -761,17 +761,26 @@ This macro is similar to @code{TARGET_SWITCHES} but defines names of command
options that have values. Its definition is an initializer with a
subgrouping for each command option.
Each subgrouping contains a string constant, that defines the fixed part
of the option name, the address of a variable, and a description string.
Non-empty description strings should be marked with @code{N_(@dots{})} for
@command{xgettext}. Please do not mark empty strings because the empty
string is reserved by GNU gettext. @code{gettext("")} returns the header entry
of the message catalog with meta information, not the empty string.
Each subgrouping contains a string constant, that defines the option
name, the address of a variable, a description string, and a value.
Non-empty description strings should be marked with @code{N_(@dots{})}
for @command{xgettext}. Please do not mark empty strings because the
empty string is reserved by GNU gettext. @code{gettext("")} returns the
header entry of the message catalog with meta information, not the empty
string.
The variable, type @code{char *}, is set to the variable part of the
given option if the fixed part matches. The actual option name is made
by appending @samp{-m} to the specified name. Again, each option should
also be documented in @file{invoke.texi}.
If the value listed in the table is @code{NULL}, then the variable, type
@code{char *}, is set to the variable part of the given option if the
fixed part matches. In other words, if the first part of the option
matches what's in the table, the variable will be set to point to the
rest of the option. This allows the user to specify a value for that
option. The actual option name is made by appending @samp{-m} to the
specified name. Again, each option should also be documented in
@file{invoke.texi}.
If the value listed in the table is non-@code{NULL}, then the option
must match the option in the table exactly (with @samp{-m}), and the
variable is set to point to the value listed in the table.
Here is an example which defines @option{-mshort-data-@var{number}}. If the
given option is @option{-mshort-data-512}, the variable @code{m88k_short_data}
@ -781,7 +790,38 @@ will be set to the string @code{"512"}.
extern char *m88k_short_data;
#define TARGET_OPTIONS \
@{ @{ "short-data-", &m88k_short_data, \
N_("Specify the size of the short data section") @} @}
N_("Specify the size of the short data section"), 0 @} @}
@end smallexample
Here is an variant of the above that allows the user to also specify
just @option{-mshort-data} where a default of @code{"64"} is used.
@smallexample
extern char *m88k_short_data;
#define TARGET_OPTIONS \
@{ @{ "short-data-", &m88k_short_data, \
N_("Specify the size of the short data section"), 0 @} \
@{ "short-data", &m88k_short_data, "", "64" @},
@}
@end smallexample
Here is an example which defines @option{-mno-alu}, @option{-malu1}, and
@option{-malu2} as a three-state switch, along with suitable macros for
checking the state of the option (documentation is elided for brevity).
@smallexample
[chip.c]
char *chip_alu = ""; /* Specify default here. */
[chip.h]
extern char *chip_alu;
#define TARGET_OPTIONS \
@{ @{ "no-alu", &chip_alu, "", "" @}, \
@{ "alu1", &chip_alu, "", "1" @}, \
@{ "alu2", &chip_alu, "", "2" @}, @}
#define TARGET_ALU (chip_alu[0] != '\0')
#define TARGET_ALU1 (chip_alu[0] == '1')
#define TARGET_ALU2 (chip_alu[0] == '2')
@end smallexample
@findex TARGET_VERSION

View File

@ -1437,6 +1437,7 @@ static const struct
const char *const prefix;
const char **const variable;
const char *const description;
const char *const value;
}
target_options[] = TARGET_OPTIONS;
#endif
@ -4685,10 +4686,21 @@ set_target_switch (name)
for (j = 0; j < ARRAY_SIZE (target_options); j++)
{
int len = strlen (target_options[j].prefix);
if (!strncmp (target_options[j].prefix, name, len))
if (target_options[j].value)
{
*target_options[j].variable = name + len;
valid_target_option = 1;
if (!strcmp (target_options[j].prefix, name))
{
*target_options[j].variable = target_options[j].value;
valid_target_option = 1;
}
}
else
{
if (!strncmp (target_options[j].prefix, name, len))
{
*target_options[j].variable = name + len;
valid_target_option = 1;
}
}
}
#endif