Add riscv -mstrict-align option.
gcc/ Backport from mainline 2017-11-04 Andrew Waterman <andrew@sifive.com> * config/riscv/riscv.c (riscv_option_override): Conditionally set TARGET_STRICT_ALIGN based upon -mtune argument. Backport from mainline 2017-05-04 Andrew Waterman <andrew@sifive.com> * config/riscv/riscv.opt (mstrict-align): New option. * config/riscv/riscv.h (STRICT_ALIGNMENT): Use it. Update comment. (SLOW_UNALIGNED_ACCESS): Define. (riscv_slow_unaligned_access): Declare. * config/riscv/riscv.c (riscv_tune_info): Add slow_unaligned_access field. (riscv_slow_unaligned_access): New variable. (rocket_tune_info): Set slow_unaligned_access to true. (optimize_size_tune_info): Set slow_unaligned_access to false. (riscv_cpu_info_table): Add entry for optimize_size_tune_info. (riscv_valid_lo_sum_p): Use TARGET_STRICT_ALIGN. (riscv_option_override): Set riscv_slow_unaligned_access. * doc/invoke.texi: Add -mstrict-align to RISC-V. From-SVN: r255221
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@ -1,5 +1,28 @@
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2017-11-28 Jim Wilson <jimw@sifive.com>
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Backport from mainline
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2017-11-04 Andrew Waterman <andrew@sifive.com>
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* config/riscv/riscv.c (riscv_option_override): Conditionally set
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TARGET_STRICT_ALIGN based upon -mtune argument.
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Backport from mainline
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2017-05-04 Andrew Waterman <andrew@sifive.com>
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* config/riscv/riscv.opt (mstrict-align): New option.
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* config/riscv/riscv.h (STRICT_ALIGNMENT): Use it. Update comment.
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(SLOW_UNALIGNED_ACCESS): Define.
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(riscv_slow_unaligned_access): Declare.
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* config/riscv/riscv.c (riscv_tune_info): Add slow_unaligned_access
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field.
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(riscv_slow_unaligned_access): New variable.
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(rocket_tune_info): Set slow_unaligned_access to true.
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(optimize_size_tune_info): Set slow_unaligned_access to false.
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(riscv_cpu_info_table): Add entry for optimize_size_tune_info.
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(riscv_valid_lo_sum_p): Use TARGET_STRICT_ALIGN.
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(riscv_option_override): Set riscv_slow_unaligned_access.
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* doc/invoke.texi: Add -mstrict-align to RISC-V.
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Backport from mainline
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2017-11-07 Michael Clark <michaeljclark@mac.com>
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@ -255,6 +255,7 @@ struct riscv_tune_info
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unsigned short issue_rate;
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unsigned short branch_cost;
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unsigned short memory_cost;
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bool slow_unaligned_access;
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};
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/* Information about one CPU we know about. */
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@ -268,6 +269,9 @@ struct riscv_cpu_info {
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/* Global variables for machine-dependent things. */
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/* Whether unaligned accesses execute very slowly. */
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bool riscv_slow_unaligned_access;
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/* Which tuning parameters to use. */
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static const struct riscv_tune_info *tune_info;
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@ -301,7 +305,8 @@ static const struct riscv_tune_info rocket_tune_info = {
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{COSTS_N_INSNS (6), COSTS_N_INSNS (6)}, /* int_div */
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1, /* issue_rate */
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3, /* branch_cost */
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5 /* memory_cost */
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5, /* memory_cost */
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true, /* slow_unaligned_access */
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};
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/* Costs to use when optimizing for size. */
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@ -313,12 +318,14 @@ static const struct riscv_tune_info optimize_size_tune_info = {
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{COSTS_N_INSNS (1), COSTS_N_INSNS (1)}, /* int_div */
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1, /* issue_rate */
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1, /* branch_cost */
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2 /* memory_cost */
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2, /* memory_cost */
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false, /* slow_unaligned_access */
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};
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/* A table describing all the processors GCC knows about. */
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static const struct riscv_cpu_info riscv_cpu_info_table[] = {
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{ "rocket", &rocket_tune_info },
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{ "size", &optimize_size_tune_info },
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};
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/* Return the riscv_cpu_info entry for the given name string. */
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@ -726,7 +733,8 @@ riscv_valid_lo_sum_p (enum riscv_symbol_type sym_type, enum machine_mode mode)
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/* We may need to split multiword moves, so make sure that each word
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can be accessed without inducing a carry. */
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if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
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&& GET_MODE_BITSIZE (mode) > GET_MODE_ALIGNMENT (mode))
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&& (!TARGET_STRICT_ALIGN
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|| GET_MODE_BITSIZE (mode) > GET_MODE_ALIGNMENT (mode)))
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return false;
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return true;
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@ -3789,6 +3797,16 @@ riscv_option_override (void)
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RISCV_TUNE_STRING_DEFAULT);
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tune_info = optimize_size ? &optimize_size_tune_info : cpu->tune_info;
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/* Use -mtune's setting for slow_unaligned_access, even when optimizing
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for size. For architectures that trap and emulate unaligned accesses,
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the performance cost is too great, even for -Os. Similarly, if
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-m[no-]strict-align is left unspecified, heed -mtune's advice. */
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riscv_slow_unaligned_access = (cpu->tune_info->slow_unaligned_access
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|| TARGET_STRICT_ALIGN);
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if ((target_flags_explicit & MASK_STRICT_ALIGN) == 0
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&& cpu->tune_info->slow_unaligned_access)
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target_flags |= MASK_STRICT_ALIGN;
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/* If the user hasn't specified a branch cost, use the processor's
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default. */
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if (riscv_branch_cost == 0)
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@ -126,10 +126,11 @@ along with GCC; see the file COPYING3. If not see
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/* There is no point aligning anything to a rounder boundary than this. */
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#define BIGGEST_ALIGNMENT 128
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/* The user-level ISA permits misaligned accesses, but they may execute
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extremely slowly and non-atomically. Some privileged architectures
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do not permit them at all. It is best to enforce strict alignment. */
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#define STRICT_ALIGNMENT 1
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/* The user-level ISA permits unaligned accesses, but they are not required
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of the privileged architecture. */
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#define STRICT_ALIGNMENT TARGET_STRICT_ALIGN
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#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) riscv_slow_unaligned_access
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/* Define this if you wish to imitate the way many other C compilers
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handle alignment of bitfields and the structures that contain
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@ -864,6 +865,7 @@ while (0)
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#ifndef USED_FOR_TARGET
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extern const enum reg_class riscv_regno_to_class[];
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extern bool riscv_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
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extern bool riscv_slow_unaligned_access;
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#endif
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#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
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@ -84,6 +84,10 @@ mcmodel=
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Target Report RejectNegative Joined Enum(code_model) Var(riscv_cmodel) Init(TARGET_DEFAULT_CMODEL)
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Specify the code model.
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mstrict-align
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Target Report Mask(STRICT_ALIGN) Save
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Do not generate unaligned memory accesses.
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Enum
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Name(code_model) Type(enum riscv_code_model)
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Known code models (for use with the -mcmodel= option):
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@ -975,6 +975,7 @@ See RS/6000 and PowerPC Options.
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-mtune=@var{processor-string} @gol
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-msmall-data-limit=@var{N-bytes} @gol
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-msave-restore -mno-save-restore @gol
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-mstrict-align -mno-strict-align @gol
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-mcmodel=@var{code-model} @gol
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-mexplicit-relocs -mno-explicit-relocs @gol}
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@ -20931,6 +20932,11 @@ Put global and static data smaller than @var{n} bytes into a special section
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@opindex msave-restore
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Use smaller but slower prologue and epilogue code.
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@item -mstrict-align
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@itemx -mno-strict-align
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@opindex mstrict-align
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Do not generate unaligned memory accesses.
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@item -mcmodel=@var{code-model}
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@opindex mcmodel
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Specify the code model.
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