diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 494e252fa78..a23d5044e6f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2008-07-21  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	PR target/36822
+	* recog.c (asm_operand_ok): Change the order of the extra
+	memory constraint checks.
+
 2008-07-20  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 
 	PR tree-opt/36879
diff --git a/gcc/recog.c b/gcc/recog.c
index 6d8b7eaec74..cd47155ad4e 100644
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -1686,16 +1686,14 @@ asm_operand_ok (rtx op, const char *constraint)
 		result = 1;
 	    }
 #ifdef EXTRA_CONSTRAINT_STR
+	  else if (EXTRA_MEMORY_CONSTRAINT (c, constraint))
+	    /* Every memory operand can be reloaded to fit.  */
+	    result = result || memory_operand (op, VOIDmode);
+	  else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint))
+	    /* Every address operand can be reloaded to fit.  */
+	    result = result || address_operand (op, VOIDmode);
 	  else if (EXTRA_CONSTRAINT_STR (op, c, constraint))
 	    result = 1;
-	  else if (EXTRA_MEMORY_CONSTRAINT (c, constraint)
-		   /* Every memory operand can be reloaded to fit.  */
-		   && memory_operand (op, VOIDmode))
-	    result = 1;
-	  else if (EXTRA_ADDRESS_CONSTRAINT (c, constraint)
-		   /* Every address operand can be reloaded to fit.  */
-		   && address_operand (op, VOIDmode))
-	    result = 1;
 #endif
 	  break;
 	}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2c2de04045d..bd32d6c68bc 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2008-07-17  Andreas Krebbel  <krebbel1@de.ibm.com>
+
+	PR target/36822
+	* gcc.target/s390/pr36822.c: New testcase.
+
 2008-07-21  Hans-Peter Nilsson  <hp@axis.com>
 
 	PR middle-end/36143
diff --git a/gcc/testsuite/gcc.target/s390/pr36822.c b/gcc/testsuite/gcc.target/s390/pr36822.c
new file mode 100644
index 00000000000..a427d2e1eb1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/pr36822.c
@@ -0,0 +1,16 @@
+/* This used to ICE on s390 due to bug in the definition of the 'R'
+   constraint which replaced the 'm' constraint (together with 'T')
+   while adding z10 support.  */
+
+/* { dg-do compile } */
+/* { dg-options "-O" } */
+
+int boo()
+{
+  struct {
+    unsigned char pad[4096];
+    unsigned long long bar;
+  } *foo;
+  asm volatile( "" : "=m" (*(unsigned long long*)(foo->bar))
+		: "a" (&foo->bar));
+}