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asan.c (asan_expand_mark_ifn): Take into account the alignment of the object to pick the size of stores on...

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* asan.c (asan_expand_mark_ifn): Take into account the alignment of
	the object to pick the size of stores on strict-alignment platforms.

	* config/sparc/sparc.md (*movsi_insn): Minor tweak.
	(*movdi_insn_sp32): Likewise.
	(*movdi_insn_sp64): Likewise.

From-SVN: r268792
This commit is contained in:
Eric Botcazou 2019-02-12 12:23:08 +00:00 committed by Eric Botcazou
parent baaf860b33
commit c4d5763224
3 changed files with 23 additions and 9 deletions
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9
gcc/ChangeLog
View File

@ -1,3 +1,12 @@
2019-02-12 Eric Botcazou <ebotcazou@adacore.com>
* asan.c (asan_expand_mark_ifn): Take into account the alignment of
the object to pick the size of stores on strict-alignment platforms.
* config/sparc/sparc.md (*movsi_insn): Minor tweak.
(*movdi_insn_sp32): Likewise.
(*movdi_insn_sp64): Likewise.
2019-02-12 Jan Hubicka <hubicka@ucw.cz>
PR lto/88777

11
gcc/asan.c
View File

@ -3218,7 +3218,10 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter)
/* Generate direct emission if size_in_bytes is small. */
if (size_in_bytes <= ASAN_PARAM_USE_AFTER_SCOPE_DIRECT_EMISSION_THRESHOLD)
{
unsigned HOST_WIDE_INT shadow_size = shadow_mem_size (size_in_bytes);
const unsigned HOST_WIDE_INT shadow_size
= shadow_mem_size (size_in_bytes);
const unsigned int shadow_align
= (get_pointer_alignment (base) / BITS_PER_UNIT) >> ASAN_SHADOW_SHIFT;
tree shadow = build_shadow_mem_access (iter, loc, base_addr,
shadow_ptr_types[0], true);
@ -3226,9 +3229,11 @@ asan_expand_mark_ifn (gimple_stmt_iterator *iter)
for (unsigned HOST_WIDE_INT offset = 0; offset < shadow_size;)
{
unsigned size = 1;
if (shadow_size - offset >= 4)
if (shadow_size - offset >= 4
&& (!STRICT_ALIGNMENT || shadow_align >= 4))
size = 4;
else if (shadow_size - offset >= 2)
else if (shadow_size - offset >= 2
&& (!STRICT_ALIGNMENT || shadow_align >= 2))
size = 2;
unsigned HOST_WIDE_INT last_chunk_size = 0;

12
gcc/config/sparc/sparc.md
View File

@ -1681,8 +1681,8 @@
})
(define_insn "*movsi_insn"
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,*f,*f, m,d,d")
(match_operand:SI 1 "input_operand" "rI,K,m,rJ,*f, r, f, m,*f,J,P"))]
[(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,?*f,?*f, m,d,d")
(match_operand:SI 1 "input_operand" "rI,K,m,rJ,*f, r, f, m,?*f,J,P"))]
"register_operand (operands[0], SImode)
|| register_or_zero_or_all_ones_operand (operands[1], SImode)"
"@
@ -1839,9 +1839,9 @@
(define_insn "*movdi_insn_sp32"
[(set (match_operand:DI 0 "nonimmediate_operand"
"=T,o,U,T,r,o,r,r,?*f,?T,?*f,?o,?*e,?*e, r,?*f,?*e,?T,*b,*b")
"=T,o,U,T,r,o,r,r,?*f, T,?*f, o,?*e,?*e, r,?*f,?*e, T,*b,*b")
(match_operand:DI 1 "input_operand"
" J,J,T,U,o,r,i,r, T,*f, o,*f, *e, *e,?*f, r, T,*e, J, P"))]
" J,J,T,U,o,r,i,r, T,?*f, o,?*f, *e, *e,?*f, r, T,?*e, J, P"))]
"TARGET_ARCH32
&& (register_operand (operands[0], DImode)
|| register_or_zero_operand (operands[1], DImode))"
@ -1875,8 +1875,8 @@ visl")
(set_attr "lra" "*,*,disabled,disabled,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*")])
(define_insn "*movdi_insn_sp64"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r, m, r,*e,?*e,?*e,?W,b,b")
(match_operand:DI 1 "input_operand" "rI,N,m,rJ,*e, r, *e, W,*e,J,P"))]
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r, m, r,*e,?*e,?*e, W,b,b")
(match_operand:DI 1 "input_operand" "rI,N,m,rJ,*e, r, *e, W,?*e,J,P"))]
"TARGET_ARCH64
&& (register_operand (operands[0], DImode)
|| register_or_zero_or_all_ones_operand (operands[1], DImode))"