From c54c7322513c602b6a0e108afc3146ce9cc2b8f8 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 5 May 2005 12:09:00 +0000 Subject: [PATCH] config.gcc (arm*-wince-pe*, [...]): Add arm/pe.opt to $extra_options. * config.gcc (arm*-wince-pe*, arm-*-pe*, strongarm-*-pe): Add arm/pe.opt to $extra_options. * config/arm/arm.h (target_flags, target_fpu_name, target_fpe_name) (target_float_abi_name, target_float_switch, target_abi_name) (ARM_FLAG_APCS_FRAME, ARM_FLAG_POKE, ARM_FLAG_FPE, ARM_FLAG_APCS_STACK) (ARM_FLAG_APCS_FLOAT, ARM_FLAG_APCS_REENT, ARM_FLAG_BIG_END) (ARM_FLAG_INTERWORK, ARM_FLAG_LITTLE_WORDS, ARM_FLAG_NO_SCHED_PRO) (ARM_FLAG_ABORT_NORETURN, ARM_FLAG_SINGLE_PIC_BASE) (ARM_FLAG_LONG_CALLS, ARM_FLAG_THUMB, THUMB_FLAG_BACKTRACE) (THUMB_FLAG_LEAF_BACKTRACE, THUMB_FLAG_CALLEE_SUPER_INTERWORKING) (THUMB_FLAG_CALLER_SUPER_INTERWORKING, CIRRUS_FIX_INVALID_INSNS) (TARGET_APCS_FRAME, TARGET_POKE_FUNCTION_NAME, TARGET_FPE) (TARGET_APCS_STACK, TARGET_APCS_FLOAT, TARGET_APCS_REENT) (TARGET_BIG_END, TARGET_INTERWORK, TARGET_LITTLE_WORDS) (TARGET_NO_SCHED_PRO, TARGET_ABORT_NORETURN, TARGET_SINGLE_PIC_BASE) (TARGET_LONG_CALLS, TARGET_THUMB, TARGET_CALLER_INTERWORKING) (TARGET_CIRRUS_FIX_INVALID_INSNS, SUBTARGET_SWITCHES, TARGET_SWITCHES) (TARGET_OPTIONS, arm_cpu_select, arm_select, structure_size_string) (arm_pic_register_string): Delete. (TARGET_BACKTRACE): Redefine using TARGET_TPCS_LEAF_FRAME and TARGET_TPCS_FRAME. (TARGET_DEFAULT, CONDITIONAL_REGISTER_USAGE): Update mask names. * config/arm/coff.h (TARGET_DEFAULT): Likewise. * config/arm/elf.h (TARGET_DEFAULT): Likewise. * config/arm/netbsd-elf.h (TARGET_DEFAULT): Likewise. * config/arm/netbsd.h (TARGET_DEFAULT): Likewise. * config/arm/semi.h (TARGET_DEFAULT): Likewise. * config/arm/uclinux-elf.h (TARGET_DEFAULT): Likewise. * config/arm/wince-pe.h (TARGET_DEFAULT): Likewise. * config/arm/pe.h (TARGET_DEFAULT): Likewise. (TARGET_FLAG_NOP_FUN, TARGET_NOP_FUN_DLLIMPORT): Delete. (SUBTARGET_SWITCHES): Delete. * config/arm/arm.c (target_float_switch): Delete. (arm_cpu_select): Moved from config/arm/arm.h. (target_fpu_name, target_fpe_name, target_float_abi_name) (target_abi_name, structure_size_string, arm_pic_register_string) (arm_select): Make static. (TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults. (arm_handle_option): New function. (arm_override_options): Update target_flags checks for new mask names. Remove target_float_switch code. (arm_expand_prologue, thumb_expand_prologue): Check !TARGET_SCHED_PROLOG instead of TARGET_NO_SCHED_PRO. * config/arm/arm.opt, config/arm/pe.opt: New files. From-SVN: r99265 --- gcc/ChangeLog | 47 +++++++ gcc/config.gcc | 3 + gcc/config/arm/arm.c | 118 +++++++++++++----- gcc/config/arm/arm.h | 229 +---------------------------------- gcc/config/arm/arm.opt | 151 +++++++++++++++++++++++ gcc/config/arm/coff.h | 2 +- gcc/config/arm/elf.h | 2 +- gcc/config/arm/netbsd-elf.h | 2 +- gcc/config/arm/netbsd.h | 4 +- gcc/config/arm/pe.h | 16 +-- gcc/config/arm/pe.opt | 24 ++++ gcc/config/arm/semi.h | 2 +- gcc/config/arm/uclinux-elf.h | 2 +- gcc/config/arm/wince-pe.h | 2 +- 14 files changed, 327 insertions(+), 277 deletions(-) create mode 100644 gcc/config/arm/arm.opt create mode 100644 gcc/config/arm/pe.opt diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f799bbb03e2..00f8a892fbe 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,50 @@ +2005-05-05 Richard Sandiford + + * config.gcc (arm*-wince-pe*, arm-*-pe*, strongarm-*-pe): Add + arm/pe.opt to $extra_options. + * config/arm/arm.h (target_flags, target_fpu_name, target_fpe_name) + (target_float_abi_name, target_float_switch, target_abi_name) + (ARM_FLAG_APCS_FRAME, ARM_FLAG_POKE, ARM_FLAG_FPE, ARM_FLAG_APCS_STACK) + (ARM_FLAG_APCS_FLOAT, ARM_FLAG_APCS_REENT, ARM_FLAG_BIG_END) + (ARM_FLAG_INTERWORK, ARM_FLAG_LITTLE_WORDS, ARM_FLAG_NO_SCHED_PRO) + (ARM_FLAG_ABORT_NORETURN, ARM_FLAG_SINGLE_PIC_BASE) + (ARM_FLAG_LONG_CALLS, ARM_FLAG_THUMB, THUMB_FLAG_BACKTRACE) + (THUMB_FLAG_LEAF_BACKTRACE, THUMB_FLAG_CALLEE_SUPER_INTERWORKING) + (THUMB_FLAG_CALLER_SUPER_INTERWORKING, CIRRUS_FIX_INVALID_INSNS) + (TARGET_APCS_FRAME, TARGET_POKE_FUNCTION_NAME, TARGET_FPE) + (TARGET_APCS_STACK, TARGET_APCS_FLOAT, TARGET_APCS_REENT) + (TARGET_BIG_END, TARGET_INTERWORK, TARGET_LITTLE_WORDS) + (TARGET_NO_SCHED_PRO, TARGET_ABORT_NORETURN, TARGET_SINGLE_PIC_BASE) + (TARGET_LONG_CALLS, TARGET_THUMB, TARGET_CALLER_INTERWORKING) + (TARGET_CIRRUS_FIX_INVALID_INSNS, SUBTARGET_SWITCHES, TARGET_SWITCHES) + (TARGET_OPTIONS, arm_cpu_select, arm_select, structure_size_string) + (arm_pic_register_string): Delete. + (TARGET_BACKTRACE): Redefine using TARGET_TPCS_LEAF_FRAME and + TARGET_TPCS_FRAME. + (TARGET_DEFAULT, CONDITIONAL_REGISTER_USAGE): Update mask names. + * config/arm/coff.h (TARGET_DEFAULT): Likewise. + * config/arm/elf.h (TARGET_DEFAULT): Likewise. + * config/arm/netbsd-elf.h (TARGET_DEFAULT): Likewise. + * config/arm/netbsd.h (TARGET_DEFAULT): Likewise. + * config/arm/semi.h (TARGET_DEFAULT): Likewise. + * config/arm/uclinux-elf.h (TARGET_DEFAULT): Likewise. + * config/arm/wince-pe.h (TARGET_DEFAULT): Likewise. + * config/arm/pe.h (TARGET_DEFAULT): Likewise. + (TARGET_FLAG_NOP_FUN, TARGET_NOP_FUN_DLLIMPORT): Delete. + (SUBTARGET_SWITCHES): Delete. + * config/arm/arm.c (target_float_switch): Delete. + (arm_cpu_select): Moved from config/arm/arm.h. + (target_fpu_name, target_fpe_name, target_float_abi_name) + (target_abi_name, structure_size_string, arm_pic_register_string) + (arm_select): Make static. + (TARGET_DEFAULT_TARGET_FLAGS, TARGET_HANDLE_OPTION): Override defaults. + (arm_handle_option): New function. + (arm_override_options): Update target_flags checks for new mask names. + Remove target_float_switch code. + (arm_expand_prologue, thumb_expand_prologue): Check + !TARGET_SCHED_PROLOG instead of TARGET_NO_SCHED_PRO. + * config/arm/arm.opt, config/arm/pe.opt: New files. + 2005-05-05 Nathan Sidwell * config/arc/arc.c (get_arc_condition_code): Use gcc_assert & diff --git a/gcc/config.gcc b/gcc/config.gcc index ac379cfb3fe..7a2960458cc 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -715,11 +715,13 @@ arm*-*-elf | ep9312-*-elf) arm*-wince-pe*) tm_file="arm/semi.h arm/aout.h arm/arm.h arm/coff.h dbxcoff.h arm/pe.h arm/wince-pe.h" tmake_file="arm/t-arm arm/t-wince-pe" + extra_options="${extra_options} arm/pe.opt" extra_objs="pe.o" ;; arm-*-pe*) tm_file="arm/semi.h arm/aout.h arm/arm.h arm/coff.h dbxcoff.h arm/pe.h" tmake_file="arm/t-arm arm/t-pe" + extra_options="${extra_options} arm/pe.opt" extra_objs="pe.o" ;; arm*-*-kaos*) @@ -2113,6 +2115,7 @@ strongarm-*-pe) out_file=arm/arm.c md_file=arm/arm.md extra_modes=arm/arm-modes.def + extra_options="${extra_options} arm/pe.opt" extra_objs=pe.o use_fixproto=yes ;; diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 6c0b896ec23..4a71420144a 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -181,6 +181,7 @@ static void arm_cxx_determine_class_data_visibility (tree); static bool arm_cxx_class_data_always_comdat (void); static bool arm_cxx_use_aeabi_atexit (void); static void arm_init_libfuncs (void); +static bool arm_handle_option (size_t, const char *, int); static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode); /* Initialize the GCC target structure. */ @@ -221,6 +222,11 @@ static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode); #undef TARGET_ASM_FUNCTION_EPILOGUE #define TARGET_ASM_FUNCTION_EPILOGUE arm_output_function_epilogue +#undef TARGET_DEFAULT_TARGET_FLAGS +#define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG) +#undef TARGET_HANDLE_OPTION +#define TARGET_HANDLE_OPTION arm_handle_option + #undef TARGET_COMP_TYPE_ATTRIBUTES #define TARGET_COMP_TYPE_ATTRIBUTES arm_comp_type_attributes @@ -368,22 +374,19 @@ enum float_abi_type arm_float_abi; enum arm_abi_type arm_abi; /* Set by the -mfpu=... option. */ -const char * target_fpu_name = NULL; +static const char * target_fpu_name = NULL; /* Set by the -mfpe=... option. */ -const char * target_fpe_name = NULL; +static const char * target_fpe_name = NULL; /* Set by the -mfloat-abi=... option. */ -const char * target_float_abi_name = NULL; - -/* Set by the legacy -mhard-float and -msoft-float options. */ -const char * target_float_switch = NULL; +static const char * target_float_abi_name = NULL; /* Set by the -mabi=... option. */ -const char * target_abi_name = NULL; +static const char * target_abi_name = NULL; /* Used to parse -mstructure_size_boundary command line option. */ -const char * structure_size_string = NULL; +static const char * structure_size_string = NULL; int arm_structure_size_boundary = DEFAULT_STRUCTURE_SIZE_BOUNDARY; /* Used for Thumb call_via trampolines. */ @@ -494,7 +497,7 @@ int arm_cpp_interwork = 0; enum machine_mode output_memory_reference_mode; /* The register number to be used for the PIC offset register. */ -const char * arm_pic_register_string = NULL; +static const char * arm_pic_register_string = NULL; int arm_pic_register = INVALID_REGNUM; /* Set to 1 when a return insn is output, this means that the epilogue @@ -574,11 +577,18 @@ static const struct processors all_architectures[] = {NULL, arm_none, NULL, 0 , NULL} }; +struct arm_cpu_select +{ + const char * string; + const char * name; + const struct processors * processors; +}; + /* This is a magic structure. The 'string' field is magically filled in with a pointer to the value specified by the user on the command line assuming that the user has specified such a value. */ -struct arm_cpu_select arm_select[] = +static struct arm_cpu_select arm_select[] = { /* string name processors */ { NULL, "-mcpu=", all_cores }, @@ -779,6 +789,63 @@ arm_init_libfuncs (void) set_optab_libfunc (umod_optab, SImode, NULL); } +/* Implement TARGET_HANDLE_OPTION. */ + +static bool +arm_handle_option (size_t code, const char *arg, int value ATTRIBUTE_UNUSED) +{ + switch (code) + { + case OPT_mabi_: + target_abi_name = arg; + return true; + + case OPT_march_: + arm_select[1].string = arg; + return true; + + case OPT_mcpu_: + arm_select[0].string = arg; + return true; + + case OPT_mfloat_abi_: + target_float_abi_name = arg; + return true; + + case OPT_mfp_: + case OPT_mfpe_: + target_fpe_name = arg; + return true; + + case OPT_mfpu_: + target_fpu_name = arg; + return true; + + case OPT_mhard_float: + target_float_abi_name = "hard"; + return true; + + case OPT_mpic_register_: + arm_pic_register_string = arg; + return true; + + case OPT_msoft_float: + target_float_abi_name = "soft"; + return true; + + case OPT_mstructure_size_boundary_: + structure_size_string = arg; + return true; + + case OPT_mtune_: + arm_select[2].string = arg; + return true; + + default: + return true; + } +} + /* Fix up any incompatible options that the user has specified. This has now turned into a maze. */ void @@ -938,25 +1005,24 @@ arm_override_options (void) if (TARGET_INTERWORK && !(insn_flags & FL_THUMB)) { warning (0, "target CPU does not support interworking" ); - target_flags &= ~ARM_FLAG_INTERWORK; + target_flags &= ~MASK_INTERWORK; } if (TARGET_THUMB && !(insn_flags & FL_THUMB)) { warning (0, "target CPU does not support THUMB instructions"); - target_flags &= ~ARM_FLAG_THUMB; + target_flags &= ~MASK_THUMB; } if (TARGET_APCS_FRAME && TARGET_THUMB) { /* warning (0, "ignoring -mapcs-frame because -mthumb was used"); */ - target_flags &= ~ARM_FLAG_APCS_FRAME; + target_flags &= ~MASK_APCS_FRAME; } /* TARGET_BACKTRACE calls leaf_function_p, which causes a crash if done from here where no function is being compiled currently. */ - if ((target_flags & (THUMB_FLAG_LEAF_BACKTRACE | THUMB_FLAG_BACKTRACE)) - && TARGET_ARM) + if ((TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) && TARGET_ARM) warning (0, "enabling backtrace support is only meaningful when compiling for the Thumb"); if (TARGET_ARM && TARGET_CALLEE_INTERWORKING) @@ -968,11 +1034,11 @@ arm_override_options (void) if (TARGET_APCS_STACK && !TARGET_APCS_FRAME) { warning (0, "-mapcs-stack-check incompatible with -mno-apcs-frame"); - target_flags |= ARM_FLAG_APCS_FRAME; + target_flags |= MASK_APCS_FRAME; } if (TARGET_POKE_FUNCTION_NAME) - target_flags |= ARM_FLAG_APCS_FRAME; + target_flags |= MASK_APCS_FRAME; if (TARGET_APCS_REENT && flag_pic) error ("-fpic and -mapcs-reent are incompatible"); @@ -985,7 +1051,7 @@ arm_override_options (void) if (TARGET_ARM && write_symbols != NO_DEBUG && !TARGET_APCS_FRAME - && (TARGET_DEFAULT & ARM_FLAG_APCS_FRAME)) + && (TARGET_DEFAULT & MASK_APCS_FRAME)) warning (0, "-g with -mno-apcs-frame may not give sensible debugging"); /* If stack checking is disabled, we can use r10 as the PIC register, @@ -1022,7 +1088,7 @@ arm_override_options (void) arm_cpp_interwork = 1; if (arm_arch5) - target_flags &= ~ARM_FLAG_INTERWORK; + target_flags &= ~MASK_INTERWORK; if (target_abi_name) { @@ -1114,14 +1180,6 @@ arm_override_options (void) error ("invalid floating point abi: -mfloat-abi=%s", target_float_abi_name); } - else if (target_float_switch) - { - /* This is a bit of a hack to avoid needing target flags for these. */ - if (target_float_switch[0] == 'h') - arm_float_abi = ARM_FLOAT_ABI_HARD; - else - arm_float_abi = ARM_FLOAT_ABI_SOFT; - } else arm_float_abi = TARGET_DEFAULT_FLOAT_ABI; @@ -10350,7 +10408,7 @@ arm_expand_prologue (void) /* If we are profiling, make sure no instructions are scheduled before the call to mcount. Similarly if the user has requested no scheduling in the prolog. */ - if (current_function_profile || TARGET_NO_SCHED_PRO) + if (current_function_profile || !TARGET_SCHED_PROLOG) emit_insn (gen_blockage ()); /* If the link register is being kept alive, with the return address in it, @@ -13171,7 +13229,7 @@ thumb_expand_prologue (void) hard_frame_pointer_rtx)); } - if (current_function_profile || TARGET_NO_SCHED_PRO) + if (current_function_profile || !TARGET_SCHED_PROLOG) emit_insn (gen_blockage ()); cfun->machine->lr_save_eliminated = !thumb_force_lr_save (); @@ -13220,7 +13278,7 @@ thumb_expand_epilogue (void) the stack adjustment will not be deleted. */ emit_insn (gen_prologue_use (stack_pointer_rtx)); - if (current_function_profile || TARGET_NO_SCHED_PRO) + if (current_function_profile || !TARGET_SCHED_PROLOG) emit_insn (gen_blockage ()); /* Emit a clobber for each insn that will be restored in the epilogue, diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 2fcf63f5fd8..1e5a972b40f 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -117,18 +117,6 @@ extern arm_cc arm_current_cc; extern int arm_target_label; extern int arm_ccfsm_state; extern GTY(()) rtx arm_target_insn; -/* Run-time compilation parameters selecting different hardware subsets. */ -extern int target_flags; -/* The floating point mode. */ -extern const char *target_fpu_name; -/* For backwards compatibility. */ -extern const char *target_fpe_name; -/* Whether to use floating point hardware. */ -extern const char *target_float_abi_name; -/* For -m{soft,hard}-float. */ -extern const char *target_float_switch; -/* Which ABI to use. */ -extern const char *target_abi_name; /* Define the information needed to generate branch insns. This is stored from the compare operation. */ extern GTY(()) rtx arm_compare_op0; @@ -184,89 +172,6 @@ extern GTY(()) rtx aof_pic_label; #define TARGET_VERSION fputs (" (ARM/generic)", stderr); #endif -/* Nonzero if the function prologue (and epilogue) should obey - the ARM Procedure Call Standard. */ -#define ARM_FLAG_APCS_FRAME (1 << 0) - -/* Nonzero if the function prologue should output the function name to enable - the post mortem debugger to print a backtrace (very useful on RISCOS, - unused on RISCiX). Specifying this flag also enables - -fno-omit-frame-pointer. - XXX Must still be implemented in the prologue. */ -#define ARM_FLAG_POKE (1 << 1) - -/* Nonzero if floating point instructions are emulated by the FPE, in which - case instruction scheduling becomes very uninteresting. */ -#define ARM_FLAG_FPE (1 << 2) - -/* FLAG 0x0008 now spare (used to be apcs-32 selection). */ - -/* Nonzero if stack checking should be performed on entry to each function - which allocates temporary variables on the stack. */ -#define ARM_FLAG_APCS_STACK (1 << 4) - -/* Nonzero if floating point parameters should be passed to functions in - floating point registers. */ -#define ARM_FLAG_APCS_FLOAT (1 << 5) - -/* Nonzero if re-entrant, position independent code should be generated. - This is equivalent to -fpic. */ -#define ARM_FLAG_APCS_REENT (1 << 6) - - /* FLAG 0x0080 now spare (used to be alignment traps). */ - /* FLAG (1 << 8) is now spare (used to be soft-float). */ - -/* Nonzero if we should compile with BYTES_BIG_ENDIAN set to 1. */ -#define ARM_FLAG_BIG_END (1 << 9) - -/* Nonzero if we should compile for Thumb interworking. */ -#define ARM_FLAG_INTERWORK (1 << 10) - -/* Nonzero if we should have little-endian words even when compiling for - big-endian (for backwards compatibility with older versions of GCC). */ -#define ARM_FLAG_LITTLE_WORDS (1 << 11) - -/* Nonzero if we need to protect the prolog from scheduling */ -#define ARM_FLAG_NO_SCHED_PRO (1 << 12) - -/* Nonzero if a call to abort should be generated if a noreturn - function tries to return. */ -#define ARM_FLAG_ABORT_NORETURN (1 << 13) - -/* Nonzero if function prologues should not load the PIC register. */ -#define ARM_FLAG_SINGLE_PIC_BASE (1 << 14) - -/* Nonzero if all call instructions should be indirect. */ -#define ARM_FLAG_LONG_CALLS (1 << 15) - -/* Nonzero means that the target ISA is the THUMB, not the ARM. */ -#define ARM_FLAG_THUMB (1 << 16) - -/* Set if a TPCS style stack frame should be generated, for non-leaf - functions, even if they do not need one. */ -#define THUMB_FLAG_BACKTRACE (1 << 17) - -/* Set if a TPCS style stack frame should be generated, for leaf - functions, even if they do not need one. */ -#define THUMB_FLAG_LEAF_BACKTRACE (1 << 18) - -/* Set if externally visible functions should assume that they - might be called in ARM mode, from a non-thumb aware code. */ -#define THUMB_FLAG_CALLEE_SUPER_INTERWORKING (1 << 19) - -/* Set if calls via function pointers should assume that their - destination is non-Thumb aware. */ -#define THUMB_FLAG_CALLER_SUPER_INTERWORKING (1 << 20) - -/* Fix invalid Cirrus instruction combinations by inserting NOPs. */ -#define CIRRUS_FIX_INVALID_INSNS (1 << 21) - -#define TARGET_APCS_FRAME (target_flags & ARM_FLAG_APCS_FRAME) -#define TARGET_POKE_FUNCTION_NAME (target_flags & ARM_FLAG_POKE) -#define TARGET_FPE (target_flags & ARM_FLAG_FPE) -#define TARGET_APCS_STACK (target_flags & ARM_FLAG_APCS_STACK) -#define TARGET_APCS_FLOAT (target_flags & ARM_FLAG_APCS_FLOAT) -#define TARGET_APCS_REENT (target_flags & ARM_FLAG_APCS_REENT) #define TARGET_SOFT_FLOAT (arm_float_abi == ARM_FLOAT_ABI_SOFT) /* Use hardware floating point instructions. */ #define TARGET_HARD_FLOAT (arm_float_abi != ARM_FLOAT_ABI_SOFT) @@ -278,22 +183,11 @@ extern GTY(()) rtx aof_pic_label; #define TARGET_IWMMXT (arm_arch_iwmmxt) #define TARGET_REALLY_IWMMXT (TARGET_IWMMXT && TARGET_ARM) #define TARGET_IWMMXT_ABI (TARGET_ARM && arm_abi == ARM_ABI_IWMMXT) -#define TARGET_BIG_END (target_flags & ARM_FLAG_BIG_END) -#define TARGET_INTERWORK (target_flags & ARM_FLAG_INTERWORK) -#define TARGET_LITTLE_WORDS (target_flags & ARM_FLAG_LITTLE_WORDS) -#define TARGET_NO_SCHED_PRO (target_flags & ARM_FLAG_NO_SCHED_PRO) -#define TARGET_ABORT_NORETURN (target_flags & ARM_FLAG_ABORT_NORETURN) -#define TARGET_SINGLE_PIC_BASE (target_flags & ARM_FLAG_SINGLE_PIC_BASE) -#define TARGET_LONG_CALLS (target_flags & ARM_FLAG_LONG_CALLS) -#define TARGET_THUMB (target_flags & ARM_FLAG_THUMB) #define TARGET_ARM (! TARGET_THUMB) #define TARGET_EITHER 1 /* (TARGET_ARM | TARGET_THUMB) */ -#define TARGET_CALLEE_INTERWORKING (target_flags & THUMB_FLAG_CALLEE_SUPER_INTERWORKING) -#define TARGET_CALLER_INTERWORKING (target_flags & THUMB_FLAG_CALLER_SUPER_INTERWORKING) -#define TARGET_BACKTRACE (leaf_function_p () \ - ? (target_flags & THUMB_FLAG_LEAF_BACKTRACE) \ - : (target_flags & THUMB_FLAG_BACKTRACE)) -#define TARGET_CIRRUS_FIX_INVALID_INSNS (target_flags & CIRRUS_FIX_INVALID_INSNS) +#define TARGET_BACKTRACE (leaf_function_p () \ + ? TARGET_TPCS_LEAF_FRAME \ + : TARGET_TPCS_FRAME) #define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN) #define TARGET_AAPCS_BASED \ (arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS) @@ -306,100 +200,6 @@ extern GTY(()) rtx aof_pic_label; #define TARGET_BPABI false #endif -/* SUBTARGET_SWITCHES is used to add flags on a per-config basis. */ -#ifndef SUBTARGET_SWITCHES -#define SUBTARGET_SWITCHES -#endif - -#define TARGET_SWITCHES \ -{ \ - {"apcs", ARM_FLAG_APCS_FRAME, "" }, \ - {"apcs-frame", ARM_FLAG_APCS_FRAME, \ - N_("Generate APCS conformant stack frames") }, \ - {"no-apcs-frame", -ARM_FLAG_APCS_FRAME, "" }, \ - {"poke-function-name", ARM_FLAG_POKE, \ - N_("Store function names in object code") }, \ - {"no-poke-function-name", -ARM_FLAG_POKE, "" }, \ - {"fpe", ARM_FLAG_FPE, "" }, \ - {"apcs-stack-check", ARM_FLAG_APCS_STACK, "" }, \ - {"no-apcs-stack-check", -ARM_FLAG_APCS_STACK, "" }, \ - {"apcs-float", ARM_FLAG_APCS_FLOAT, \ - N_("Pass FP arguments in FP registers") }, \ - {"no-apcs-float", -ARM_FLAG_APCS_FLOAT, "" }, \ - {"apcs-reentrant", ARM_FLAG_APCS_REENT, \ - N_("Generate re-entrant, PIC code") }, \ - {"no-apcs-reentrant", -ARM_FLAG_APCS_REENT, "" }, \ - {"big-endian", ARM_FLAG_BIG_END, \ - N_("Assume target CPU is configured as big endian") }, \ - {"little-endian", -ARM_FLAG_BIG_END, \ - N_("Assume target CPU is configured as little endian") }, \ - {"words-little-endian", ARM_FLAG_LITTLE_WORDS, \ - N_("Assume big endian bytes, little endian words") }, \ - {"thumb-interwork", ARM_FLAG_INTERWORK, \ - N_("Support calls between Thumb and ARM instruction sets") }, \ - {"no-thumb-interwork", -ARM_FLAG_INTERWORK, "" }, \ - {"abort-on-noreturn", ARM_FLAG_ABORT_NORETURN, \ - N_("Generate a call to abort if a noreturn function returns")}, \ - {"no-abort-on-noreturn", -ARM_FLAG_ABORT_NORETURN, "" }, \ - {"no-sched-prolog", ARM_FLAG_NO_SCHED_PRO, \ - N_("Do not move instructions into a function's prologue") }, \ - {"sched-prolog", -ARM_FLAG_NO_SCHED_PRO, "" }, \ - {"single-pic-base", ARM_FLAG_SINGLE_PIC_BASE, \ - N_("Do not load the PIC register in function prologues") }, \ - {"no-single-pic-base", -ARM_FLAG_SINGLE_PIC_BASE, "" }, \ - {"long-calls", ARM_FLAG_LONG_CALLS, \ - N_("Generate call insns as indirect calls, if necessary") }, \ - {"no-long-calls", -ARM_FLAG_LONG_CALLS, "" }, \ - {"thumb", ARM_FLAG_THUMB, \ - N_("Compile for the Thumb not the ARM") }, \ - {"no-thumb", -ARM_FLAG_THUMB, "" }, \ - {"arm", -ARM_FLAG_THUMB, "" }, \ - {"tpcs-frame", THUMB_FLAG_BACKTRACE, \ - N_("Thumb: Generate (non-leaf) stack frames even if not needed") }, \ - {"no-tpcs-frame", -THUMB_FLAG_BACKTRACE, "" }, \ - {"tpcs-leaf-frame", THUMB_FLAG_LEAF_BACKTRACE, \ - N_("Thumb: Generate (leaf) stack frames even if not needed") }, \ - {"no-tpcs-leaf-frame", -THUMB_FLAG_LEAF_BACKTRACE, "" }, \ - {"callee-super-interworking", THUMB_FLAG_CALLEE_SUPER_INTERWORKING, \ - N_("Thumb: Assume non-static functions may be called from ARM code") }, \ - {"no-callee-super-interworking", -THUMB_FLAG_CALLEE_SUPER_INTERWORKING, \ - "" }, \ - {"caller-super-interworking", THUMB_FLAG_CALLER_SUPER_INTERWORKING, \ - N_("Thumb: Assume function pointers may go to non-Thumb aware code") }, \ - {"no-caller-super-interworking", -THUMB_FLAG_CALLER_SUPER_INTERWORKING, \ - "" }, \ - {"cirrus-fix-invalid-insns", CIRRUS_FIX_INVALID_INSNS, \ - N_("Cirrus: Place NOPs to avoid invalid instruction combinations") }, \ - {"no-cirrus-fix-invalid-insns", -CIRRUS_FIX_INVALID_INSNS, \ - N_("Cirrus: Do not break up invalid instruction combinations with NOPs") },\ - SUBTARGET_SWITCHES \ - {"", TARGET_DEFAULT, "" } \ -} - -#define TARGET_OPTIONS \ -{ \ - {"cpu=", & arm_select[0].string, \ - N_("Specify the name of the target CPU"), 0}, \ - {"arch=", & arm_select[1].string, \ - N_("Specify the name of the target architecture"), 0}, \ - {"tune=", & arm_select[2].string, "", 0}, \ - {"fpe=", & target_fpe_name, "", 0}, \ - {"fp=", & target_fpe_name, "", 0}, \ - {"fpu=", & target_fpu_name, \ - N_("Specify the name of the target floating point hardware/format"), 0}, \ - {"float-abi=", & target_float_abi_name, \ - N_("Specify if floating point hardware should be used"), 0}, \ - {"structure-size-boundary=", & structure_size_string, \ - N_("Specify the minimum bit alignment of structures"), 0}, \ - {"pic-register=", & arm_pic_register_string, \ - N_("Specify the register to be used for PIC addressing"), 0}, \ - {"abi=", &target_abi_name, N_("Specify an ABI"), 0}, \ - {"soft-float", &target_float_switch, \ - N_("Alias for -mfloat-abi=soft"), "s"}, \ - {"hard-float", &target_float_switch, \ - N_("Alias for -mfloat-abi=hard"), "h"} \ -} - /* Support for a compile-time default CPU, et cetera. The rules are: --with-arch is ignored if -march or -mcpu are specified. --with-cpu is ignored if -march or -mcpu are specified, and is overridden @@ -419,18 +219,6 @@ extern GTY(()) rtx aof_pic_label; {"fpu", "%{!mfpu=*:-mfpu=%(VALUE)}"}, \ {"abi", "%{!mabi=*:-mabi=%(VALUE)}"}, -struct arm_cpu_select -{ - const char * string; - const char * name; - const struct processors * processors; -}; - -/* This is a magic array. If the user specifies a command line switch - which matches one of the entries in TARGET_OPTIONS then the corresponding - string pointer will be set to the value specified by the user. */ -extern struct arm_cpu_select arm_select[]; - /* Which floating point model to use. */ enum arm_fp_model { @@ -550,7 +338,7 @@ extern int arm_tune_wbuf; extern int arm_cpp_interwork; #ifndef TARGET_DEFAULT -#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME) +#define TARGET_DEFAULT (MASK_APCS_FRAME) #endif /* The frame pointer register used in gcc has nothing to do with debugging; @@ -698,9 +486,6 @@ extern int arm_structure_size_boundary; #define DEFAULT_STRUCTURE_SIZE_BOUNDARY 32 #endif -/* Used when parsing command line option -mstructure_size_boundary. */ -extern const char * structure_size_string; - /* Nonzero if move instructions will actually fail to work when given unaligned data. */ #define STRICT_ALIGNMENT 1 @@ -927,8 +712,7 @@ extern const char * structure_size_string; is an easy way of ensuring that it remains valid for all \ calls. */ \ if (TARGET_APCS_FRAME || TARGET_CALLER_INTERWORKING \ - || (target_flags & (THUMB_FLAG_LEAF_BACKTRACE \ - | THUMB_FLAG_BACKTRACE))) \ + || TARGET_TPCS_FRAME || TARGET_TPCS_LEAF_FRAME) \ { \ fixed_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \ call_used_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1; \ @@ -2401,9 +2185,6 @@ do { \ using sb (r9) all the time. */ extern int arm_pic_register; -/* Used when parsing command line option -mpic-register=. */ -extern const char * arm_pic_register_string; - /* The register number of the register used to address a table of static data addresses in memory. */ #define PIC_OFFSET_TABLE_REGNUM arm_pic_register diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt new file mode 100644 index 00000000000..28bec490e38 --- /dev/null +++ b/gcc/config/arm/arm.opt @@ -0,0 +1,151 @@ +; Options for the ARM port of the compiler. + +; Copyright (C) 2005 Free Software Foundation, Inc. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 2, or (at your option) any later +; version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or +; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +; for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING. If not, write to the Free +; Software Foundation, 59 Temple Place - Suite 330, Boston, MA +; 02111-1307, USA. + +mabi= +Target RejectNegative Joined +Specify an ABI + +mabort-on-noreturn +Target Report Mask(ABORT_NORETURN) +Generate a call to abort if a noreturn function returns + +mapcs +Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented + +mapcs-float +Target Report Mask(APCS_FLOAT) +Pass FP arguments in FP registers + +mapcs-frame +Target Report Mask(APCS_FRAME) +Generate APCS conformant stack frames + +mapcs-reentrant +Target Report Mask(APCS_REENT) +Generate re-entrant, PIC code + +mapcs-stack-check +Target Report Mask(APCS_STACK) Undocumented + +march= +Target RejectNegative Joined +Specify the name of the target architecture + +marm +Target RejectNegative InverseMask(THUMB) Undocumented + +mbig-endian +Target Report RejectNegative Mask(BIG_END) +Assume target CPU is configured as big endian + +mcallee-super-interworking +Target Report Mask(CALLEE_INTERWORKING) +Thumb: Assume non-static functions may be called from ARM code + +mcaller-super-interworking +Target Report Mask(CALLER_INTERWORKING) +Thumb: Assume function pointers may go to non-Thumb aware code + +mcirrus-fix-invalid-insns +Target Report Mask(CIRRUS_FIX_INVALID_INSNS) +Cirrus: Place NOPs to avoid invalid instruction combinations + +mcpu= +Target RejectNegative Joined +Specify the name of the target CPU + +mfloat-abi= +Target RejectNegative Joined +Specify if floating point hardware should be used + +mfp= +Target RejectNegative Joined Undocumented + +;; Now ignored. +mfpe +Target RejectNegative Mask(FPE) Undocumented + +mfpe= +Target RejectNegative Joined Undocumented + +mfpu= +Target RejectNegative Joined +Specify the name of the target floating point hardware/format + +mhard-float +Target RejectNegative +Alias for -mfloat-abi=hard + +mlittle-endian +Target Report RejectNegative InverseMask(BIG_END) +Assume target CPU is configured as little endian + +mlong-calls +Target Report Mask(LONG_CALLS) +Generate call insns as indirect calls, if necessary + +mpic-register= +Target RejectNegative Joined +Specify the register to be used for PIC addressing + +mpoke-function-name +Target Report Mask(POKE_FUNCTION_NAME) +Store function names in object code + +msched-prolog +Target Report Mask(SCHED_PROLOG) +Permit scheduling of a function's prologue sequence + +msingle-pic-base +Target Report Mask(SINGLE_PIC_BASE) +Do not load the PIC register in function prologues + +msoft-float +Target RejectNegative +Alias for -mfloat-abi=soft + +mstructure-size-boundary= +Target RejectNegative Joined +Specify the minimum bit alignment of structures + +mthumb +Target Report Mask(THUMB) +Compile for the Thumb not the ARM + +mthumb-interwork +Target Report Mask(INTERWORK) +Support calls between Thumb and ARM instruction sets + +mtpcs-frame +Target Report Mask(TPCS_FRAME) +Thumb: Generate (non-leaf) stack frames even if not needed + +mtpcs-leaf-frame +Target Report Mask(TPCS_LEAF_FRAME) +Thumb: Generate (leaf) stack frames even if not needed + +mtune= +Target RejectNegative Joined +Tune code for the given processor + +mwords-little-endian +Target Report RejectNegative Mask(LITTLE_WORDS) +Assume big endian bytes, little endian words diff --git a/gcc/config/arm/coff.h b/gcc/config/arm/coff.h index 5ad7fb68e2f..7a910987ec8 100644 --- a/gcc/config/arm/coff.h +++ b/gcc/config/arm/coff.h @@ -34,7 +34,7 @@ #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT #undef TARGET_DEFAULT -#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME) +#define TARGET_DEFAULT (MASK_APCS_FRAME) #ifndef MULTILIB_DEFAULTS #define MULTILIB_DEFAULTS \ diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h index 9a48a9b30e2..56f8422ee50 100644 --- a/gcc/config/arm/elf.h +++ b/gcc/config/arm/elf.h @@ -108,7 +108,7 @@ #endif #ifndef TARGET_DEFAULT -#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME) +#define TARGET_DEFAULT (MASK_APCS_FRAME) #endif #ifndef MULTILIB_DEFAULTS diff --git a/gcc/config/arm/netbsd-elf.h b/gcc/config/arm/netbsd-elf.h index 602619f282a..a33079b64f5 100644 --- a/gcc/config/arm/netbsd-elf.h +++ b/gcc/config/arm/netbsd-elf.h @@ -35,7 +35,7 @@ /* Default it to use ATPCS with soft-VFP. */ #undef TARGET_DEFAULT #define TARGET_DEFAULT \ - (ARM_FLAG_APCS_FRAME \ + (MASK_APCS_FRAME \ | TARGET_ENDIAN_DEFAULT) #undef ARM_DEFAULT_ABI diff --git a/gcc/config/arm/netbsd.h b/gcc/config/arm/netbsd.h index 59a7b8043f8..1d67c75130e 100644 --- a/gcc/config/arm/netbsd.h +++ b/gcc/config/arm/netbsd.h @@ -36,7 +36,7 @@ #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6 #undef TARGET_DEFAULT -#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME) +#define TARGET_DEFAULT (MASK_APCS_FRAME) /* Some defines for CPP. arm32 is the NetBSD port name, so we always define arm32 and __arm32__. */ @@ -58,7 +58,7 @@ %(cpp_cpu_arch) %(cpp_float) %(cpp_endian) %(netbsd_cpp_spec) \ " -/* Because TARGET_DEFAULT sets ARM_FLAG_SOFT_FLOAT */ +/* Because TARGET_DEFAULT sets MASK_SOFT_FLOAT */ #undef CPP_FLOAT_DEFAULT_SPEC #define CPP_FLOAT_DEFAULT_SPEC "-D__SOFTFP__" diff --git a/gcc/config/arm/pe.h b/gcc/config/arm/pe.h index d47489574a1..465789ff34b 100644 --- a/gcc/config/arm/pe.h +++ b/gcc/config/arm/pe.h @@ -45,22 +45,8 @@ #undef SUBTARGET_CPP_SPEC #define SUBTARGET_CPP_SPEC "-D__pe__" - -/* Experimental addition for pr 7885. - Ignore dllimport for functions. */ -#define TARGET_FLAG_NOP_FUN (1 << 24) - -#undef TARGET_NOP_FUN_DLLIMPORT -#define TARGET_NOP_FUN_DLLIMPORT (target_flags & TARGET_FLAG_NOP_FUN) - -#undef SUBTARGET_SWITCHES -#define SUBTARGET_SWITCHES \ -{ "nop-fun-dllimport", TARGET_FLAG_NOP_FUN, \ - N_("Ignore dllimport attribute for functions") }, \ -{ "no-nop-fun-dllimport", - TARGET_FLAG_NOP_FUN, "" }, - #undef TARGET_DEFAULT -#define TARGET_DEFAULT (TARGET_FLAG_NOP_FUN) +#define TARGET_DEFAULT (MASK_NOP_FUN_DLLIMPORT) #undef MULTILIB_DEFAULTS #define MULTILIB_DEFAULTS \ diff --git a/gcc/config/arm/pe.opt b/gcc/config/arm/pe.opt new file mode 100644 index 00000000000..05ec5941e3b --- /dev/null +++ b/gcc/config/arm/pe.opt @@ -0,0 +1,24 @@ +; PE-specific options for the ARM port + +; Copyright (C) 2005 Free Software Foundation, Inc. +; +; This file is part of GCC. +; +; GCC is free software; you can redistribute it and/or modify it under +; the terms of the GNU General Public License as published by the Free +; Software Foundation; either version 2, or (at your option) any later +; version. +; +; GCC is distributed in the hope that it will be useful, but WITHOUT ANY +; WARRANTY; without even the implied warranty of MERCHANTABILITY or +; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +; for more details. +; +; You should have received a copy of the GNU General Public License +; along with GCC; see the file COPYING. If not, write to the Free +; Software Foundation, 59 Temple Place - Suite 330, Boston, MA +; 02111-1307, USA. + +mnop-fun-dllimport +Target Report Mask(NOP_FUN_DLLIMPORT) +Ignore dllimport attribute for functions diff --git a/gcc/config/arm/semi.h b/gcc/config/arm/semi.h index d12ef4bacc1..4c73f0a9b7c 100644 --- a/gcc/config/arm/semi.h +++ b/gcc/config/arm/semi.h @@ -43,7 +43,7 @@ #endif #ifndef TARGET_DEFAULT -#define TARGET_DEFAULT (ARM_FLAG_APCS_FRAME) +#define TARGET_DEFAULT (MASK_APCS_FRAME) #endif #ifndef SUBTARGET_EXTRA_SPECS diff --git a/gcc/config/arm/uclinux-elf.h b/gcc/config/arm/uclinux-elf.h index 4bfb64b8678..fbeb756e367 100644 --- a/gcc/config/arm/uclinux-elf.h +++ b/gcc/config/arm/uclinux-elf.h @@ -27,4 +27,4 @@ #define TARGET_VERSION fputs (" (ARM/ELF ucLinux)", stderr); #undef TARGET_DEFAULT -#define TARGET_DEFAULT (ARM_FLAG_SINGLE_PIC_BASE) +#define TARGET_DEFAULT (MASK_SINGLE_PIC_BASE) diff --git a/gcc/config/arm/wince-pe.h b/gcc/config/arm/wince-pe.h index 121848b44c9..9f17d7380ba 100644 --- a/gcc/config/arm/wince-pe.h +++ b/gcc/config/arm/wince-pe.h @@ -20,7 +20,7 @@ Boston, MA 02111-1307, USA. */ #undef TARGET_DEFAULT -#define TARGET_DEFAULT (TARGET_FLAG_NOP_FUN) +#define TARGET_DEFAULT (MASK_NOP_FUN_DLLIMPORT) #undef MULTILIB_DEFAULTS #define MULTILIB_DEFAULTS \