Warning removal.
* config/sh/sh.c (print_operand_address): Cast INTVAL to int. (shl_and_kind): Cast wide constant. (gen_far_branch): Define as static, as in declaration. (barrier_align): Compute cache-line length as unsigned. Add parentheses in initial credit computation. (rounded_frame_size): Add parentheses. (permanent_obstack): Remove declaration. Include ggc.h for declaration of ggc_add_root_rtx(). (get_free_reg): Removed declaration of unused variable reg. (legitimize_pic_address): Mark mode argument as unused. From-SVN: r42837
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@ -1,3 +1,17 @@
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2001-06-03 Alexandre Oliva <aoliva@redhat.com>
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Warning removal.
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* config/sh/sh.c (print_operand_address): Cast INTVAL to int.
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(shl_and_kind): Cast wide constant.
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(gen_far_branch): Define as static, as in declaration.
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(barrier_align): Compute cache-line length as unsigned. Add
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parentheses in initial credit computation.
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(rounded_frame_size): Add parentheses.
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(permanent_obstack): Remove declaration. Include ggc.h for
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declaration of ggc_add_root_rtx().
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(get_free_reg): Removed declaration of unused variable reg.
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(legitimize_pic_address): Mark mode argument as unused.
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2001-06-03 Igor Shevlyakov <igor@windriver.com>
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* config/sh/sh.c (output_branch): Support for insn with lenght
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@ -170,7 +170,7 @@ print_operand_address (stream, x)
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switch (GET_CODE (index))
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{
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case CONST_INT:
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fprintf (stream, "@(%d,%s)", INTVAL (index),
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fprintf (stream, "@(%d,%s)", (int) INTVAL (index),
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reg_names[true_regnum (base)]);
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break;
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@ -1450,7 +1450,7 @@ shl_and_kind (left_rtx, mask_rtx, attrp)
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}
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}
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/* Try to use a scratch register to hold the AND operand. */
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can_ext = ((mask << left) & 0xe0000000) == 0;
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can_ext = ((mask << left) & ((unsigned HOST_WIDE_INT)3 << 30)) == 0;
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for (i = 0; i <= 2; i++)
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{
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if (i > right)
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@ -2735,7 +2735,7 @@ struct far_branch
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static void gen_far_branch PARAMS ((struct far_branch *));
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enum mdep_reorg_phase_e mdep_reorg_phase;
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void
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static void
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gen_far_branch (bp)
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struct far_branch *bp;
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{
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@ -2839,7 +2839,7 @@ barrier_align (barrier_or_label)
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the table to the minimum for proper code alignment. */
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return ((TARGET_SMALLCODE
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|| (XVECLEN (pat, 1) * GET_MODE_SIZE (GET_MODE (pat))
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<= 1 << (CACHE_LOG - 2)))
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<= (unsigned)1 << (CACHE_LOG - 2)))
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? 1 : CACHE_LOG);
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}
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@ -2871,7 +2871,7 @@ barrier_align (barrier_or_label)
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investigation. Skip to the insn before it. */
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prev = prev_real_insn (prev);
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for (slot = 2, credit = 1 << (CACHE_LOG - 2) + 2;
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for (slot = 2, credit = (1 << (CACHE_LOG - 2)) + 2;
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credit >= 0 && prev && GET_CODE (prev) == INSN;
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prev = prev_real_insn (prev))
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{
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@ -3951,7 +3951,7 @@ rounded_frame_size (pushed)
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HOST_WIDE_INT size = get_frame_size ();
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HOST_WIDE_INT align = STACK_BOUNDARY / BITS_PER_UNIT;
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return (size + pushed + align - 1 & -align) - pushed;
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return ((size + pushed + align - 1) & -align) - pushed;
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}
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void
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@ -5047,7 +5047,7 @@ reg_unused_after (reg, insn)
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return 1;
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}
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extern struct obstack permanent_obstack;
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#include "ggc.h"
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rtx
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get_fpscr_rtx ()
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@ -5215,8 +5215,6 @@ static rtx
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get_free_reg (regs_live)
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HARD_REG_SET regs_live;
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{
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rtx reg;
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if (! TEST_HARD_REG_BIT (regs_live, 1))
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return gen_rtx_REG (Pmode, 1);
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@ -5238,8 +5236,10 @@ fpscr_set_from_mem (mode, regs_live)
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enum attr_fp_mode fp_mode = mode;
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rtx addr_reg = get_free_reg (regs_live);
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emit_insn ((fp_mode == (TARGET_FPU_SINGLE ? FP_MODE_SINGLE : FP_MODE_DOUBLE)
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? gen_fpu_switch1 : gen_fpu_switch0) (addr_reg));
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if (fp_mode == (enum attr_fp_mode) NORMAL_MODE (FP_MODE))
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emit_insn (gen_fpu_switch1 (addr_reg));
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else
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emit_insn (gen_fpu_switch0 (addr_reg));
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}
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/* Is the given character a logical line separator for the assembler? */
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@ -5361,7 +5361,7 @@ nonpic_symbol_mentioned_p (x)
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rtx
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legitimize_pic_address (orig, mode, reg)
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rtx orig;
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enum machine_mode mode;
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enum machine_mode mode ATTRIBUTE_UNUSED;
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rtx reg;
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{
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if (GET_CODE (orig) == LABEL_REF
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