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Warning removal.

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* config/sh/sh.c (print_operand_address): Cast INTVAL to int.
(shl_and_kind): Cast wide constant.
(gen_far_branch): Define as static, as in declaration.
(barrier_align): Compute cache-line length as unsigned.  Add
parentheses in initial credit computation.
(rounded_frame_size): Add parentheses.
(permanent_obstack): Remove declaration.  Include ggc.h for
declaration of ggc_add_root_rtx().
(get_free_reg): Removed declaration of unused variable reg.
(legitimize_pic_address): Mark mode argument as unused.

From-SVN: r42837
This commit is contained in:
Alexandre Oliva 2001-06-03 22:50:27 +00:00 committed by Alexandre Oliva
parent 667c49250f
commit c5b9ef021f
2 changed files with 26 additions and 12 deletions
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14
gcc/ChangeLog
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@ -1,3 +1,17 @@
2001-06-03 Alexandre Oliva <aoliva@redhat.com>
Warning removal.
* config/sh/sh.c (print_operand_address): Cast INTVAL to int.
(shl_and_kind): Cast wide constant.
(gen_far_branch): Define as static, as in declaration.
(barrier_align): Compute cache-line length as unsigned. Add
parentheses in initial credit computation.
(rounded_frame_size): Add parentheses.
(permanent_obstack): Remove declaration. Include ggc.h for
declaration of ggc_add_root_rtx().
(get_free_reg): Removed declaration of unused variable reg.
(legitimize_pic_address): Mark mode argument as unused.
2001-06-03 Igor Shevlyakov <igor@windriver.com> 2001-06-03 Igor Shevlyakov <igor@windriver.com>
* config/sh/sh.c (output_branch): Support for insn with lenght * config/sh/sh.c (output_branch): Support for insn with lenght

24
gcc/config/sh/sh.c
View File

@ -170,7 +170,7 @@ print_operand_address (stream, x)
switch (GET_CODE (index)) switch (GET_CODE (index))
{ {
case CONST_INT: case CONST_INT:
fprintf (stream, "@(%d,%s)", INTVAL (index), fprintf (stream, "@(%d,%s)", (int) INTVAL (index),
reg_names[true_regnum (base)]); reg_names[true_regnum (base)]);
break; break;
@ -1450,7 +1450,7 @@ shl_and_kind (left_rtx, mask_rtx, attrp)
} }
} }
/* Try to use a scratch register to hold the AND operand. */ /* Try to use a scratch register to hold the AND operand. */
can_ext = ((mask << left) & 0xe0000000) == 0; can_ext = ((mask << left) & ((unsigned HOST_WIDE_INT)3 << 30)) == 0;
for (i = 0; i <= 2; i++) for (i = 0; i <= 2; i++)
{ {
if (i > right) if (i > right)
@ -2735,7 +2735,7 @@ struct far_branch
static void gen_far_branch PARAMS ((struct far_branch *)); static void gen_far_branch PARAMS ((struct far_branch *));
enum mdep_reorg_phase_e mdep_reorg_phase; enum mdep_reorg_phase_e mdep_reorg_phase;
void static void
gen_far_branch (bp) gen_far_branch (bp)
struct far_branch *bp; struct far_branch *bp;
{ {
@ -2839,7 +2839,7 @@ barrier_align (barrier_or_label)
the table to the minimum for proper code alignment. */ the table to the minimum for proper code alignment. */
return ((TARGET_SMALLCODE return ((TARGET_SMALLCODE
|| (XVECLEN (pat, 1) * GET_MODE_SIZE (GET_MODE (pat)) || (XVECLEN (pat, 1) * GET_MODE_SIZE (GET_MODE (pat))
<= 1 << (CACHE_LOG - 2))) <= (unsigned)1 << (CACHE_LOG - 2)))
? 1 : CACHE_LOG); ? 1 : CACHE_LOG);
} }
@ -2871,7 +2871,7 @@ barrier_align (barrier_or_label)
investigation. Skip to the insn before it. */ investigation. Skip to the insn before it. */
prev = prev_real_insn (prev); prev = prev_real_insn (prev);
for (slot = 2, credit = 1 << (CACHE_LOG - 2) + 2; for (slot = 2, credit = (1 << (CACHE_LOG - 2)) + 2;
credit >= 0 && prev && GET_CODE (prev) == INSN; credit >= 0 && prev && GET_CODE (prev) == INSN;
prev = prev_real_insn (prev)) prev = prev_real_insn (prev))
{ {
@ -3951,7 +3951,7 @@ rounded_frame_size (pushed)
HOST_WIDE_INT size = get_frame_size (); HOST_WIDE_INT size = get_frame_size ();
HOST_WIDE_INT align = STACK_BOUNDARY / BITS_PER_UNIT; HOST_WIDE_INT align = STACK_BOUNDARY / BITS_PER_UNIT;
return (size + pushed + align - 1 & -align) - pushed; return ((size + pushed + align - 1) & -align) - pushed;
} }
void void
@ -5047,7 +5047,7 @@ reg_unused_after (reg, insn)
return 1; return 1;
} }
extern struct obstack permanent_obstack; #include "ggc.h"
rtx rtx
get_fpscr_rtx () get_fpscr_rtx ()
@ -5215,8 +5215,6 @@ static rtx
get_free_reg (regs_live) get_free_reg (regs_live)
HARD_REG_SET regs_live; HARD_REG_SET regs_live;
{ {
rtx reg;
if (! TEST_HARD_REG_BIT (regs_live, 1)) if (! TEST_HARD_REG_BIT (regs_live, 1))
return gen_rtx_REG (Pmode, 1); return gen_rtx_REG (Pmode, 1);
@ -5238,8 +5236,10 @@ fpscr_set_from_mem (mode, regs_live)
enum attr_fp_mode fp_mode = mode; enum attr_fp_mode fp_mode = mode;
rtx addr_reg = get_free_reg (regs_live); rtx addr_reg = get_free_reg (regs_live);
emit_insn ((fp_mode == (TARGET_FPU_SINGLE ? FP_MODE_SINGLE : FP_MODE_DOUBLE) if (fp_mode == (enum attr_fp_mode) NORMAL_MODE (FP_MODE))
? gen_fpu_switch1 : gen_fpu_switch0) (addr_reg)); emit_insn (gen_fpu_switch1 (addr_reg));
else
emit_insn (gen_fpu_switch0 (addr_reg));
} }
/* Is the given character a logical line separator for the assembler? */ /* Is the given character a logical line separator for the assembler? */
@ -5361,7 +5361,7 @@ nonpic_symbol_mentioned_p (x)
rtx rtx
legitimize_pic_address (orig, mode, reg) legitimize_pic_address (orig, mode, reg)
rtx orig; rtx orig;
enum machine_mode mode; enum machine_mode mode ATTRIBUTE_UNUSED;
rtx reg; rtx reg;
{ {
if (GET_CODE (orig) == LABEL_REF if (GET_CODE (orig) == LABEL_REF