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Merge in gcc2-ss-010999 

From-SVN: r29150
This commit is contained in:
Jeff Law 1999-09-06 23:49:18 -06:00
parent ad85216ece
commit c5c7673583
203 changed files with 5932 additions and 4973 deletions
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7
gcc/ChangeLog
View File

@ -1,3 +1,8 @@
Mon Sep 6 22:44:47 1999 Jeffrey A Law (law@cygnus.com)
* Merge from gcc2 snapshot Jan 9, 1999. See FSFChangeLog for
details.
Mon Sep 6 22:31:28 1999 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* c-aux-info.c (concat): Don't define.
@ -126,6 +131,7 @@ Mon Sep 6 14:30:13 1999 Bernd Schmidt <bernds@cygnus.co.uk>
(ix86_mark_machine_status): New function.
(override_options): Set mark_machine_status.
>>>>>>> 1.4290
Mon Sep 6 15:26:23 1999 Bernd Schmidt <bernds@cygnus.co.uk>
* tree.c (copy_node): Copy node contents also if doing GC.
@ -136,6 +142,7 @@ Mon Sep 6 08:42:06 1999 Alexandre Oliva <oliva@dcc.unicamp.br>
Mon Sep 6 02:42:36 1999 Jeffrey A Law (law@cygnus.com)
>>>>>>> 1.4287
* collect2.c (scan_libraries): Fix thinko.
* cse.c (delete_trivially_dead_insns): Do not skip the last

949
gcc/FSFChangeLog
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File diff suppressed because it is too large Load Diff

31
gcc/Makefile.in
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@ -689,7 +689,7 @@ CCCP=@cpp_main@
STAGESTUFF = *$(objext) insn-flags.h insn-config.h insn-codes.h \
insn-output.c insn-recog.c insn-emit.c insn-extract.c insn-peep.c \
insn-attr.h insn-attrtab.c insn-opinit.c tree-check.h \
s-flags s-config s-codes s-mlib s-under\
s-flags s-config s-codes s-mlib s-unders s-genrtl \
s-output s-recog s-emit s-extract s-peep s-check \
s-attr s-attrtab s-opinit s-crt s-crtS s-crt0 \
genemit$(build_exeext) genoutput$(build_exeext) genrecog$(build_exeext) \
@ -786,6 +786,16 @@ REGS_H = regs.h varray.h machmode.h machmode.def
.SUFFIXES:
.SUFFIXES: .c .o
$(srcdir)/version.c: $(VERSION_DEP)
(cd $(srcdir); cvs log -h `basename $?`) >tmp-ver
tag=`sed '1,/^sym/d;s/ *gcc-//;s/:.*$$//;q' tmp-ver`; \
ver=`echo $${tag} | sed 's/-.*//' | sed 's/_/./g'`; \
date=`echo $${tag} | sed 's/.*-//'`; \
if [ $${date} != RELEASE ]; then ver="testgcc-$${ver} $${date} experimental"; fi; \
echo "char *version_string = \"$${ver}\";" >tmp-version.c
rm -f tmp-ver
$(srcdir)/move-if-change tmp-version.c $(srcdir)/version.c
Makefile: $(srcdir)/Makefile.in config.status $(srcdir)/version.c \
$(xmake_file) $(tmake_file) $(LANG_MAKEFILES)
$(SHELL) $(srcdir)/configure.frag $(srcdir) "$(SUBDIRS)" \
@ -818,7 +828,7 @@ cstamp-h: config.in config.status
# Really, really stupid make features, such as SUN's KEEP_STATE, may force
# a target to build even if it is up-to-date. So we must verify that
# config.status does not exist before failing.
config.status: configure version.c
config.status: $(srcdir)/configure version.c
@if [ ! -f config.status ] ; then \
echo You must configure gcc. Look at the INSTALL file for details.; \
false; \
@ -1449,7 +1459,7 @@ prefix.o: prefix.c $(CONFIG_H) system.h Makefile prefix.h
-DPREFIX=\"$(prefix)\" \
-c `echo $(srcdir)/prefix.c | sed 's,^\./,,'`
convert.o: convert.c $(CONFIG_H) $(TREE_H) flags.h convert.h toplev.h
convert.o: convert.c $(CONFIG_H) system.h $(TREE_H) flags.h convert.h toplev.h
tree.o : tree.c $(CONFIG_H) system.h $(TREE_H) flags.h function.h toplev.h \
ggc.h
@ -1521,11 +1531,9 @@ emit-rtl.o : emit-rtl.c $(CONFIG_H) system.h $(RTL_H) $(TREE_H) flags.h \
function.h $(REGS_H) insn-config.h $(RECOG_H) real.h ggc.h \
$(EXPR_H) $(srcdir)/../include/obstack.h hard-reg-set.h bitmap.h toplev.h
real.o : real.c $(CONFIG_H) system.h $(TREE_H) toplev.h
integrate.o : integrate.c $(CONFIG_H) system.h $(RTL_H) $(TREE_H) flags.h \
integrate.h insn-flags.h insn-config.h $(EXPR_H) real.h $(REGS_H) \
intl.h function.h output.h $(RECOG_H) except.h toplev.h
jump.o : jump.c $(CONFIG_H) system.h $(RTL_H) flags.h hard-reg-set.h $(REGS_H) \
insn-config.h insn-flags.h $(RECOG_H) $(EXPR_H) real.h except.h function.h \
toplev.h insn-attr.h
@ -1567,7 +1575,6 @@ bitmap.o : bitmap.c $(CONFIG_H) system.h $(RTL_H) flags.h $(BASIC_BLOCK_H) \
global.o : global.c $(CONFIG_H) system.h $(RTL_H) flags.h reload.h function.h \
$(BASIC_BLOCK_H) $(REGS_H) hard-reg-set.h insn-config.h output.h toplev.h
varray.o : varray.c $(CONFIG_H) system.h varray.h $(RTL_H) $(TREE_H) bitmap.h
reload.o : reload.c $(CONFIG_H) system.h $(RTL_H) flags.h output.h $(EXPR_H) \
reload.h $(RECOG_H) hard-reg-set.h insn-config.h insn-codes.h $(REGS_H) \
function.h real.h toplev.h
@ -1757,11 +1764,11 @@ genrtl.c genrtl.h : s-genrtl
@true # force gnu make to recheck modification times.
s-genrtl: gengenrtl $(srcdir)/move-if-change $(RTL_BASE_H)
./gengenrtl tmp-genrtl.h tmp-genrtl.c
./gengenrtl -h >tmp-genrtl.h
$(srcdir)/move-if-change tmp-genrtl.h genrtl.h
./gengenrtl >tmp-genrtl.c
$(srcdir)/move-if-change tmp-genrtl.c genrtl.c
touch s-genrtl
#
# Compile the programs that generate insn-* from the machine description.
# They are compiled with $(HOST_CC), and associated libraries,
@ -1862,7 +1869,6 @@ gengenrtl : gengenrtl.o $(HOST_LIBDEPS)
gengenrtl.o : gengenrtl.c $(RTL_BASE_H) system.h
$(HOST_CC) -c $(HOST_CFLAGS) $(HOST_CPPFLAGS) $(INCLUDES) $(srcdir)/gengenrtl.c
#
# Compile the libraries to be used by gen*.
# If we are not cross-building, gen* use the same .o's that cc1 will use,
@ -1970,7 +1976,7 @@ cpp$(exeext): $(CCCP)$(exeext)
CCCP_OBJS = cccp.o cexp.o intl.o prefix.o version.o @extra_cpp_objs@ mbchar.o
cccp$(exeext): $(CCCP_OBJS) $(LIBDEPS)
$(CC) $(ALL_CFLAGS) $(LDFLAGS) -o $@ $(CCCP_OBJS) $(LIBS)
cexp.o: $(srcdir)/cexp.c $(CONFIG_H) system.h
cexp.o: $(srcdir)/cexp.c $(CONFIG_H) system.h mbchar.h
$(CC) $(ALL_CFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) -c $(srcdir)/cexp.c
$(srcdir)/cexp.c: $(srcdir)/cexp.y
cd $(srcdir); $(BISON) -o cexp.c cexp.y
@ -2162,6 +2168,7 @@ fixinc.sh: $(FIXINCSRCDIR)/mkfixinc.sh $(FIXINCSRCDIR)/fixincl.c \
# Build fixed copies of system files.
stmp-fixinc: fixinc.sh gsyslimits.h
rm -rf include; mkdir include
-chmod a+rx include
TARGET_MACHINE=$(target); srcdir=`cd $(srcdir); pwd`; \
INSTALL_ASSERT_H=$(INSTALL_ASSERT_H); SHELL=$(SHELL) ;\
export TARGET_MACHINE srcdir INSTALL_ASSERT_H SHELL ; \
@ -2251,7 +2258,7 @@ fixhdr.ready: fix-header
# if it has already been run on the files in `include'.
stmp-fixproto: fixhdr.ready fixproto stmp-headers
@echo "Various warnings and error messages from fixproto are normal"
-if [ -d include ] ; then true; else mkdir include; fi
-if [ -d include ] ; then true; else mkdir include; chmod a+rx include; fi
-if [ -f include/fixed ] ; then true; \
else \
: This line works around a 'make' bug in BSDI 1.1.; \
@ -2621,7 +2628,7 @@ install-libgcc: libgcc.a installdirs
install-multilib: stmp-multilib installdirs
for i in `$(GCC_FOR_TARGET) --print-multi-lib`; do \
dir=`echo $$i | sed -e 's/;.*$$//'`; \
if [ -d $(libsubdir)/$${dir} ]; then true; else mkdir $(libsubdir)/$${dir}; fi; \
if [ -d $(libsubdir)/$${dir} ]; then true; else mkdir $(libsubdir)/$${dir}; chmod a+rx $(libsubdir)/$${dir}; fi; \
for f in libgcc.a $(EXTRA_MULTILIB_PARTS); do \
rm -f $(libsubdir)/$${dir}/$${f}; \
$(INSTALL_DATA) $${dir}/$${f} $(libsubdir)/$${dir}/$${f}; \

1
gcc/bitmap.c
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@ -29,7 +29,6 @@ Boston, MA 02111-1307, USA. */
/* Obstack to allocate bitmap elements from. */
static struct obstack bitmap_obstack;
static int bitmap_obstack_init = FALSE;
#ifndef INLINE
#ifndef __GNUC__

1
gcc/c-convert.c
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@ -25,6 +25,7 @@ Boston, MA 02111-1307, USA. */
but what kind of conversions it does will depend on the language. */
#include "config.h"
#include "system.h"
#include "tree.h"
#include "flags.h"
#include "convert.h"

10
gcc/c-decl.c
View File

@ -1925,6 +1925,10 @@ duplicate_decls (newdecl, olddecl, different_binding_level)
if (DECL_SECTION_NAME (newdecl) == NULL_TREE)
DECL_SECTION_NAME (newdecl) = DECL_SECTION_NAME (olddecl);
/* Copy the assembler name.
Currently, it can only be defined in the prototype. */
DECL_ASSEMBLER_NAME (newdecl) = DECL_ASSEMBLER_NAME (olddecl);
if (TREE_CODE (newdecl) == FUNCTION_DECL)
{
DECL_STATIC_CONSTRUCTOR(newdecl) |= DECL_STATIC_CONSTRUCTOR(olddecl);
@ -3740,6 +3744,7 @@ finish_decl (decl, init, asmspec_tree)
{
DECL_BUILT_IN (decl) = 0;
DECL_RTL (decl) = 0;
DECL_ASSEMBLER_NAME (decl) = get_identifier (asmspec);
}
/* Output the assembler code and/or RTL code for variables and functions,
@ -7005,7 +7010,8 @@ finish_function (nested)
static_ctors = perm_tree_cons (NULL_TREE, fndecl, static_ctors);
else
#endif
assemble_constructor (IDENTIFIER_POINTER (DECL_NAME (fndecl)));
assemble_constructor (IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (fndecl)));
}
if (DECL_STATIC_DESTRUCTOR (fndecl))
{
@ -7014,7 +7020,7 @@ finish_function (nested)
static_dtors = perm_tree_cons (NULL_TREE, fndecl, static_dtors);
else
#endif
assemble_destructor (IDENTIFIER_POINTER (DECL_NAME (fndecl)));
assemble_destructor (IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (fndecl)));
}
if (! nested)

4
gcc/c-gperf.h
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@ -1,5 +1,5 @@
/* C code produced by gperf version 2.7 */
/* Command-line: gperf -L C -F , 0, 0 -p -j1 -i 1 -g -o -t -G -N is_reserved_word -k1,3,$ ../../../egcs/gcc/c-parse.gperf */
/* C code produced by gperf version 2.7.1 (19981006 egcs) */
/* Command-line: gperf -L C -F , 0, 0 -p -j1 -i 1 -g -o -t -G -N is_reserved_word -k1,3,$ /home/law/egcs/egcs/gcc/c-parse.gperf */
/* Command-line: gperf -L KR-C -F ', 0, 0' -p -j1 -i 1 -g -o -t -N is_reserved_word -k1,3,$ c-parse.gperf */
struct resword { const char *name; short token; enum rid rid; };

2
gcc/c-iterate.c
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@ -1,5 +1,5 @@
/* Build expressions with type checking for C compiler.
Copyright (C) 1987, 88, 89, 92, 93, 96, 1997, 1998 Free Software Foundation, Inc.
Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.

14
gcc/c-lex.c
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@ -45,6 +45,9 @@ Boston, MA 02111-1307, USA. */
#include "mbchar.h"
#include <locale.h>
#endif /* MULTIBYTE_CHARS */
#ifndef GET_ENVIRONMENT
#define GET_ENVIRONMENT(ENV_VALUE,ENV_NAME) ((ENV_VALUE) = getenv (ENV_NAME))
#endif
#if USE_CPPLIB
#include "cpplib.h"
@ -279,7 +282,7 @@ init_lex ()
#ifdef MULTIBYTE_CHARS
/* Change to the native locale for multibyte conversions. */
setlocale (LC_CTYPE, "");
literal_codeset = getenv ("LANG");
GET_ENVIRONMENT (literal_codeset, "LANG");
#endif
maxtoken = 40;
@ -1529,7 +1532,7 @@ yylex ()
#define TOTAL_PARTS ((HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR) * 2)
unsigned int parts[TOTAL_PARTS];
enum anon1 { NOT_FLOAT, AFTER_POINT, TOO_MANY_POINTS, AFTER_EXPON }
enum anon1 { NOT_FLOAT, AFTER_POINT, TOO_MANY_POINTS, AFTER_EXPON}
floatflag = NOT_FLOAT;
for (count = 0; count < TOTAL_PARTS; count++)
@ -1970,7 +1973,7 @@ yylex ()
int max_chars;
#ifdef MULTIBYTE_CHARS
int longest_char = local_mb_cur_max ();
local_mbtowc (NULL_PTR, NULL_PTR, 0);
(void) local_mbtowc (NULL_PTR, NULL_PTR, 0);
#endif
max_chars = TYPE_PRECISION (integer_type_node) / width;
@ -2091,7 +2094,7 @@ yylex ()
}
if (c != '\'')
error ("malformatted character constant");
error ("malformed character constant");
else if (chars_seen == 0)
error ("empty character constant");
else if (num_chars > max_chars)
@ -2139,9 +2142,8 @@ yylex ()
: TYPE_PRECISION (char_type_node);
#ifdef MULTIBYTE_CHARS
int longest_char = local_mb_cur_max ();
local_mbtowc (NULL_PTR, NULL_PTR, 0);
(void) local_mbtowc (NULL_PTR, NULL_PTR, 0);
#endif
c = token_getch ();
p = token_buffer + 1;

307
gcc/c-parse.c
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@ -1,71 +1,71 @@
/* A Bison parser, made from c-parse.y
by GNU Bison version 1.27
by GNU Bison version 1.25
*/
#define YYBISON 1 /* Identify Bison output. */
#define IDENTIFIER 257
#define TYPENAME 258
#define SCSPEC 259
#define TYPESPEC 260
#define TYPE_QUAL 261
#define CONSTANT 262
#define STRING 263
#define ELLIPSIS 264
#define SIZEOF 265
#define ENUM 266
#define STRUCT 267
#define UNION 268
#define IF 269
#define ELSE 270
#define WHILE 271
#define DO 272
#define FOR 273
#define SWITCH 274
#define CASE 275
#define DEFAULT 276
#define BREAK 277
#define CONTINUE 278
#define RETURN 279
#define GOTO 280
#define ASM_KEYWORD 281
#define TYPEOF 282
#define ALIGNOF 283
#define ATTRIBUTE 284
#define EXTENSION 285
#define LABEL 286
#define REALPART 287
#define IMAGPART 288
#define VA_ARG 289
#define END_OF_LINE 290
#define ASSIGN 291
#define OROR 292
#define ANDAND 293
#define EQCOMPARE 294
#define ARITHCOMPARE 295
#define LSHIFT 296
#define RSHIFT 297
#define UNARY 298
#define PLUSPLUS 299
#define MINUSMINUS 300
#define HYPERUNARY 301
#define POINTSAT 302
#define INTERFACE 303
#define IMPLEMENTATION 304
#define END 305
#define SELECTOR 306
#define DEFS 307
#define ENCODE 308
#define CLASSNAME 309
#define PUBLIC 310
#define PRIVATE 311
#define PROTECTED 312
#define PROTOCOL 313
#define OBJECTNAME 314
#define CLASS 315
#define ALIAS 316
#define OBJC_STRING 317
#define IDENTIFIER 258
#define TYPENAME 259
#define SCSPEC 260
#define TYPESPEC 261
#define TYPE_QUAL 262
#define CONSTANT 263
#define STRING 264
#define ELLIPSIS 265
#define SIZEOF 266
#define ENUM 267
#define STRUCT 268
#define UNION 269
#define IF 270
#define ELSE 271
#define WHILE 272
#define DO 273
#define FOR 274
#define SWITCH 275
#define CASE 276
#define DEFAULT 277
#define BREAK 278
#define CONTINUE 279
#define RETURN 280
#define GOTO 281
#define ASM_KEYWORD 282
#define TYPEOF 283
#define ALIGNOF 284
#define ATTRIBUTE 285
#define EXTENSION 286
#define LABEL 287
#define REALPART 288
#define IMAGPART 289
#define VA_ARG 290
#define END_OF_LINE 291
#define ASSIGN 292
#define OROR 293
#define ANDAND 294
#define EQCOMPARE 295
#define ARITHCOMPARE 296
#define LSHIFT 297
#define RSHIFT 298
#define UNARY 299
#define PLUSPLUS 300
#define MINUSMINUS 301
#define HYPERUNARY 302
#define POINTSAT 303
#define INTERFACE 304
#define IMPLEMENTATION 305
#define END 306
#define SELECTOR 307
#define DEFS 308
#define ENCODE 309
#define CLASSNAME 310
#define PUBLIC 311
#define PRIVATE 312
#define PROTECTED 313
#define PROTOCOL 314
#define OBJECTNAME 315
#define CLASS 316
#define ALIAS 317
#define OBJC_STRING 318
#line 33 "c-parse.y"
@ -151,7 +151,7 @@ c_parse_init ()
#define YYFLAG -32768
#define YYNTBASE 86
#define YYTRANSLATE(x) ((unsigned)(x) <= 317 ? yytranslate[x] : 244)
#define YYTRANSLATE(x) ((unsigned)(x) <= 318 ? yytranslate[x] : 244)
static const char yytranslate[] = { 0,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
@ -179,13 +179,13 @@ static const char yytranslate[] = { 0,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
2, 2, 2, 2, 2, 1, 3, 4, 5, 6,
7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
27, 28, 29, 30, 31, 32, 33, 34, 35, 36,
37, 41, 42, 46, 47, 48, 49, 55, 56, 57,
58, 59, 63, 64, 65, 66, 67, 68, 69, 70,
71, 72, 73, 74, 75, 76, 77
2, 2, 2, 2, 2, 1, 2, 3, 4, 5,
6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
36, 37, 41, 42, 46, 47, 48, 49, 55, 56,
57, 58, 59, 63, 64, 65, 66, 67, 68, 69,
70, 71, 72, 73, 74, 75, 76, 77
};
#if YYDEBUG != 0
@ -1256,8 +1256,7 @@ static const short yycheck[] = { 38,
53, 54
};
/* -*-C-*- Note some compilers choke on comments on `#line' lines. */
#line 3 "/usr/lib/bison.simple"
/* This file comes from bison-1.27. */
#line 3 "/usr/cygnus/TBD-TBD/share/bison.simple"
/* Skeleton output parser for bison,
Copyright (C) 1984, 1989, 1990 Free Software Foundation, Inc.
@ -1274,67 +1273,47 @@ static const short yycheck[] = { 38,
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
/* As a special exception, when this file is copied by Bison into a
Bison output file, you may use that output file without restriction.
This special exception was added by the Free Software Foundation
in version 1.24 of Bison. */
#ifndef alloca
#ifdef __GNUC__
#define alloca __builtin_alloca
#else /* not GNU C. */
#if (!defined (__STDC__) && defined (sparc)) || defined (__sparc__) || defined (__sparc) || defined (__sgi)
#include <alloca.h>
#else /* not sparc */
#if defined (MSDOS) && !defined (__TURBOC__)
#include <malloc.h>
#else /* not MSDOS, or __TURBOC__ */
#if defined(_AIX)
#include <malloc.h>
#pragma alloca
#else /* not MSDOS, __TURBOC__, or _AIX */
#ifdef __hpux
#ifdef __cplusplus
extern "C" {
void *alloca (unsigned int);
};
#else /* not __cplusplus */
void *alloca ();
#endif /* not __cplusplus */
#endif /* __hpux */
#endif /* not _AIX */
#endif /* not MSDOS, or __TURBOC__ */
#endif /* not sparc. */
#endif /* not GNU C. */
#endif /* alloca not defined. */
/* This is the parser code that is written into each bison parser
when the %semantic_parser declaration is not specified in the grammar.
It was written by Richard Stallman by simplifying the hairy parser
used when %semantic_parser is specified. */
#ifndef YYSTACK_USE_ALLOCA
#ifdef alloca
#define YYSTACK_USE_ALLOCA
#else /* alloca not defined */
#ifdef __GNUC__
#define YYSTACK_USE_ALLOCA
#define alloca __builtin_alloca
#else /* not GNU C. */
#if (!defined (__STDC__) && defined (sparc)) || defined (__sparc__) || defined (__sparc) || defined (__sgi) || (defined (__sun) && defined (__i386))
#define YYSTACK_USE_ALLOCA
#include <alloca.h>
#else /* not sparc */
/* We think this test detects Watcom and Microsoft C. */
/* This used to test MSDOS, but that is a bad idea
since that symbol is in the user namespace. */
#if (defined (_MSDOS) || defined (_MSDOS_)) && !defined (__TURBOC__)
#if 0 /* No need for malloc.h, which pollutes the namespace;
instead, just don't use alloca. */
#include <malloc.h>
#endif
#else /* not MSDOS, or __TURBOC__ */
#if defined(_AIX)
/* I don't know what this was needed for, but it pollutes the namespace.
So I turned it off. rms, 2 May 1997. */
/* #include <malloc.h> */
#pragma alloca
#define YYSTACK_USE_ALLOCA
#else /* not MSDOS, or __TURBOC__, or _AIX */
#if 0
#ifdef __hpux /* haible@ilog.fr says this works for HPUX 9.05 and up,
and on HPUX 10. Eventually we can turn this on. */
#define YYSTACK_USE_ALLOCA
#define alloca __builtin_alloca
#endif /* __hpux */
#endif
#endif /* not _AIX */
#endif /* not MSDOS, or __TURBOC__ */
#endif /* not sparc */
#endif /* not GNU C */
#endif /* alloca not defined */
#endif /* YYSTACK_USE_ALLOCA not defined */
#ifdef YYSTACK_USE_ALLOCA
#define YYSTACK_ALLOC alloca
#else
#define YYSTACK_ALLOC malloc
#endif
/* Note: there must be only one dollar sign in this file.
It is replaced by the list of actions, each action
as one case of the switch. */
@ -1343,8 +1322,8 @@ static const short yycheck[] = { 38,
#define yyclearin (yychar = YYEMPTY)
#define YYEMPTY -2
#define YYEOF 0
#define YYACCEPT goto yyacceptlab
#define YYABORT goto yyabortlab
#define YYACCEPT return(0)
#define YYABORT return(1)
#define YYERROR goto yyerrlab1
/* Like YYERROR except do call yyerror.
This remains here temporarily to ease the
@ -1425,12 +1404,12 @@ int yydebug; /* nonzero means print parse trace */
#ifndef YYMAXDEPTH
#define YYMAXDEPTH 10000
#endif
/* Define __yy_memcpy. Note that the size argument
should be passed with type unsigned int, because that is what the non-GCC
definitions require. With GCC, __builtin_memcpy takes an arg
of type size_t, but it can handle unsigned int. */
/* Prevent warning if -Wstrict-prototypes. */
#ifdef __GNUC__
int yyparse (void);
#endif
#if __GNUC__ > 1 /* GNU C and GNU C++ define this. */
#define __yy_memcpy(TO,FROM,COUNT) __builtin_memcpy(TO,FROM,COUNT)
#else /* not GNU C or C++ */
@ -1442,7 +1421,7 @@ static void
__yy_memcpy (to, from, count)
char *to;
char *from;
unsigned int count;
int count;
{
register char *f = from;
register char *t = to;
@ -1457,10 +1436,10 @@ __yy_memcpy (to, from, count)
/* This is the most reliable way to avoid incompatibilities
in available built-in functions on various systems. */
static void
__yy_memcpy (char *to, char *from, unsigned int count)
__yy_memcpy (char *to, char *from, int count)
{
register char *t = to;
register char *f = from;
register char *t = to;
register int i = count;
while (i-- > 0)
@ -1470,7 +1449,7 @@ __yy_memcpy (char *to, char *from, unsigned int count)
#endif
#endif
#line 216 "/usr/lib/bison.simple"
#line 196 "/usr/cygnus/TBD-TBD/share/bison.simple"
/* The user can define YYPARSE_PARAM as the name of an argument to be passed
into yyparse. The argument should have type void *.
@ -1491,15 +1470,6 @@ __yy_memcpy (char *to, char *from, unsigned int count)
#define YYPARSE_PARAM_DECL
#endif /* not YYPARSE_PARAM */
/* Prevent warning if -Wstrict-prototypes. */
#ifdef __GNUC__
#ifdef YYPARSE_PARAM
int yyparse (void *);
#else
int yyparse (void);
#endif
#endif
int
yyparse(YYPARSE_PARAM_ARG)
YYPARSE_PARAM_DECL
@ -1528,7 +1498,6 @@ yyparse(YYPARSE_PARAM_ARG)
#endif
int yystacksize = YYINITDEPTH;
int yyfree_stacks = 0;
#ifdef YYPURE
int yychar;
@ -1613,32 +1582,18 @@ yynewstate:
if (yystacksize >= YYMAXDEPTH)
{
yyerror("parser stack overflow");
if (yyfree_stacks)
{
free (yyss);
free (yyvs);
#ifdef YYLSP_NEEDED
free (yyls);
#endif
}
return 2;
}
yystacksize *= 2;
if (yystacksize > YYMAXDEPTH)
yystacksize = YYMAXDEPTH;
#ifndef YYSTACK_USE_ALLOCA
yyfree_stacks = 1;
#endif
yyss = (short *) YYSTACK_ALLOC (yystacksize * sizeof (*yyssp));
__yy_memcpy ((char *)yyss, (char *)yyss1,
size * (unsigned int) sizeof (*yyssp));
yyvs = (YYSTYPE *) YYSTACK_ALLOC (yystacksize * sizeof (*yyvsp));
__yy_memcpy ((char *)yyvs, (char *)yyvs1,
size * (unsigned int) sizeof (*yyvsp));
yyss = (short *) alloca (yystacksize * sizeof (*yyssp));
__yy_memcpy ((char *)yyss, (char *)yyss1, size * sizeof (*yyssp));
yyvs = (YYSTYPE *) alloca (yystacksize * sizeof (*yyvsp));
__yy_memcpy ((char *)yyvs, (char *)yyvs1, size * sizeof (*yyvsp));
#ifdef YYLSP_NEEDED
yyls = (YYLTYPE *) YYSTACK_ALLOC (yystacksize * sizeof (*yylsp));
__yy_memcpy ((char *)yyls, (char *)yyls1,
size * (unsigned int) sizeof (*yylsp));
yyls = (YYLTYPE *) alloca (yystacksize * sizeof (*yylsp));
__yy_memcpy ((char *)yyls, (char *)yyls1, size * sizeof (*yylsp));
#endif
#endif /* no yyoverflow */
@ -3868,7 +3823,7 @@ case 407:
break;}
}
/* the action file gets copied in in place of this dollarsign */
#line 542 "/usr/lib/bison.simple"
#line 498 "/usr/cygnus/TBD-TBD/share/bison.simple"
yyvsp -= yylen;
yyssp -= yylen;
@ -4063,30 +4018,6 @@ yyerrhandle:
yystate = yyn;
goto yynewstate;
yyacceptlab:
/* YYACCEPT comes here. */
if (yyfree_stacks)
{
free (yyss);
free (yyvs);
#ifdef YYLSP_NEEDED
free (yyls);
#endif
}
return 0;
yyabortlab:
/* YYABORT comes here. */
if (yyfree_stacks)
{
free (yyss);
free (yyvs);
#ifdef YYLSP_NEEDED
free (yyls);
#endif
}
return 1;
}
#line 2254 "c-parse.y"

122
gcc/c-parse.h
View File

@ -1,66 +1,66 @@
typedef union {long itype; tree ttype; enum tree_code code;
char *filename; int lineno; int ends_in_label; } YYSTYPE;
#define IDENTIFIER 257
#define TYPENAME 258
#define SCSPEC 259
#define TYPESPEC 260
#define TYPE_QUAL 261
#define CONSTANT 262
#define STRING 263
#define ELLIPSIS 264
#define SIZEOF 265
#define ENUM 266
#define STRUCT 267
#define UNION 268
#define IF 269
#define ELSE 270
#define WHILE 271
#define DO 272
#define FOR 273
#define SWITCH 274
#define CASE 275
#define DEFAULT 276
#define BREAK 277
#define CONTINUE 278
#define RETURN 279
#define GOTO 280
#define ASM_KEYWORD 281
#define TYPEOF 282
#define ALIGNOF 283
#define ATTRIBUTE 284
#define EXTENSION 285
#define LABEL 286
#define REALPART 287
#define IMAGPART 288
#define VA_ARG 289
#define END_OF_LINE 290
#define ASSIGN 291
#define OROR 292
#define ANDAND 293
#define EQCOMPARE 294
#define ARITHCOMPARE 295
#define LSHIFT 296
#define RSHIFT 297
#define UNARY 298
#define PLUSPLUS 299
#define MINUSMINUS 300
#define HYPERUNARY 301
#define POINTSAT 302
#define INTERFACE 303
#define IMPLEMENTATION 304
#define END 305
#define SELECTOR 306
#define DEFS 307
#define ENCODE 308
#define CLASSNAME 309
#define PUBLIC 310
#define PRIVATE 311
#define PROTECTED 312
#define PROTOCOL 313
#define OBJECTNAME 314
#define CLASS 315
#define ALIAS 316
#define OBJC_STRING 317
#define IDENTIFIER 258
#define TYPENAME 259
#define SCSPEC 260
#define TYPESPEC 261
#define TYPE_QUAL 262
#define CONSTANT 263
#define STRING 264
#define ELLIPSIS 265
#define SIZEOF 266
#define ENUM 267
#define STRUCT 268
#define UNION 269
#define IF 270
#define ELSE 271
#define WHILE 272
#define DO 273
#define FOR 274
#define SWITCH 275
#define CASE 276
#define DEFAULT 277
#define BREAK 278
#define CONTINUE 279
#define RETURN 280
#define GOTO 281
#define ASM_KEYWORD 282
#define TYPEOF 283
#define ALIGNOF 284
#define ATTRIBUTE 285
#define EXTENSION 286
#define LABEL 287
#define REALPART 288
#define IMAGPART 289
#define VA_ARG 290
#define END_OF_LINE 291
#define ASSIGN 292
#define OROR 293
#define ANDAND 294
#define EQCOMPARE 295
#define ARITHCOMPARE 296
#define LSHIFT 297
#define RSHIFT 298
#define UNARY 299
#define PLUSPLUS 300
#define MINUSMINUS 301
#define HYPERUNARY 302
#define POINTSAT 303
#define INTERFACE 304
#define IMPLEMENTATION 305
#define END 306
#define SELECTOR 307
#define DEFS 308
#define ENCODE 309
#define CLASSNAME 310
#define PUBLIC 311
#define PRIVATE 312
#define PROTECTED 313
#define PROTOCOL 314
#define OBJECTNAME 315
#define CLASS 316
#define ALIAS 317
#define OBJC_STRING 318
extern YYSTYPE yylval;

1
gcc/c-parse.in
View File

@ -38,7 +38,6 @@ end ifc
#include "config.h"
#include "system.h"
#include <setjmp.h>
#include "tree.h"
#include "input.h"
#include "c-lex.h"

26
gcc/c-typeck.c
View File

@ -3155,8 +3155,10 @@ lvalue_or_else (ref, msgid)
const char *msgid;
{
int win = lvalue_p (ref);
if (! win)
error (msgid);
return win;
}
@ -3802,8 +3804,7 @@ build_modify_expr (lhs, modifycode, rhs)
/* Handle (a, b) used as an "lvalue". */
case COMPOUND_EXPR:
pedantic_lvalue_warning (COMPOUND_EXPR);
newrhs = build_modify_expr (TREE_OPERAND (lhs, 1),
modifycode, rhs);
newrhs = build_modify_expr (TREE_OPERAND (lhs, 1), modifycode, rhs);
if (TREE_CODE (newrhs) == ERROR_MARK)
return error_mark_node;
return build (COMPOUND_EXPR, lhstype,
@ -6560,7 +6561,26 @@ c_expand_asm_operands (string, outputs, inputs, clobbers, vol, filename, line)
/* Record the contents of OUTPUTS before it is modified. */
for (i = 0, tail = outputs; tail; tail = TREE_CHAIN (tail), i++)
o[i] = TREE_VALUE (tail);
{
tree output = TREE_VALUE (tail);
/* We can remove conversions that just change the type, not the mode. */
STRIP_NOPS (output);
o[i] = output;
/* Allow conversions as LHS here. build_modify_expr as called below
will do the right thing with them. */
while (TREE_CODE (output) == NOP_EXPR
|| TREE_CODE (output) == CONVERT_EXPR
|| TREE_CODE (output) == FLOAT_EXPR
|| TREE_CODE (output) == FIX_TRUNC_EXPR
|| TREE_CODE (output) == FIX_FLOOR_EXPR
|| TREE_CODE (output) == FIX_ROUND_EXPR
|| TREE_CODE (output) == FIX_CEIL_EXPR)
output = TREE_OPERAND (output, 1);
lvalue_or_else (o[i], "invalid lvalue in asm statement");
}
/* Perform default conversions on array and function inputs. */
/* Don't do this for other types--

2
gcc/caller-save.c
View File

@ -1,5 +1,5 @@
/* Save and restore call-clobbered registers which are live across a call.
Copyright (C) 1989, 1992, 94-95, 97, 98, 1999 Free Software Foundation, Inc.
Copyright (C) 1989, 92, 94, 95, 97, 1998 Free Software Foundation, Inc.
This file is part of GNU CC.

41
gcc/calls.c
View File

@ -2433,8 +2433,9 @@ expand_call (exp, target, ignore)
preserve_temp_slots (target);
}
emit_group_store (target, valreg, bytes,
TYPE_ALIGN (TREE_TYPE (exp)) / BITS_PER_UNIT);
if (! rtx_equal_p (target, valreg))
emit_group_store (target, valreg, bytes,
TYPE_ALIGN (TREE_TYPE (exp)) / BITS_PER_UNIT);
}
else if (target && GET_MODE (target) == TYPE_MODE (TREE_TYPE (exp))
&& GET_MODE (target) == GET_MODE (valreg))
@ -2901,9 +2902,13 @@ emit_library_call VPROTO((rtx orgfun, int no_queue, enum machine_mode outmode,
= mode_for_size (argvec[argnum].size.constant * BITS_PER_UNIT,
MODE_INT, 1);
rtx stack_area
= gen_rtx_MEM (save_mode,
memory_address (save_mode,
plus_constant (argblock, argvec[argnum].offset.constant)));
= gen_rtx_MEM
(save_mode,
memory_address
(save_mode,
plus_constant (argblock,
argvec[argnum].offset.constant)));
argvec[argnum].save_area = gen_reg_rtx (save_mode);
emit_move_insn (argvec[argnum].save_area, stack_area);
}
@ -3024,8 +3029,10 @@ emit_library_call VPROTO((rtx orgfun, int no_queue, enum machine_mode outmode,
enum machine_mode save_mode = GET_MODE (argvec[count].save_area);
rtx stack_area
= gen_rtx_MEM (save_mode,
memory_address (save_mode,
plus_constant (argblock, argvec[count].offset.constant)));
memory_address
(save_mode,
plus_constant (argblock,
argvec[count].offset.constant)));
emit_move_insn (stack_area, argvec[count].save_area);
}
@ -3464,11 +3471,14 @@ emit_library_call_value VPROTO((rtx orgfun, rtx value, int no_queue,
= mode_for_size (argvec[argnum].size.constant * BITS_PER_UNIT,
MODE_INT, 1);
rtx stack_area
= gen_rtx_MEM (save_mode,
memory_address (save_mode,
plus_constant (argblock,
argvec[argnum].offset.constant)));
= gen_rtx_MEM
(save_mode,
memory_address
(save_mode,
plus_constant (argblock,
argvec[argnum].offset.constant)));
argvec[argnum].save_area = gen_reg_rtx (save_mode);
emit_move_insn (argvec[argnum].save_area, stack_area);
}
#endif
@ -3613,8 +3623,10 @@ emit_library_call_value VPROTO((rtx orgfun, rtx value, int no_queue,
enum machine_mode save_mode = GET_MODE (argvec[count].save_area);
rtx stack_area
= gen_rtx_MEM (save_mode,
memory_address (save_mode, plus_constant (argblock,
argvec[count].offset.constant)));
memory_address
(save_mode,
plus_constant (argblock,
argvec[count].offset.constant)));
emit_move_insn (stack_area, argvec[count].save_area);
}
@ -3840,8 +3852,7 @@ store_one_arg (arg, argblock, may_be_alloca, variable_size,
if (arg->value == arg->stack)
{
/* If the value is already in the stack slot, we are done moving
data. */
/* If the value is already in the stack slot, we are done. */
if (current_function_check_memory_usage && GET_CODE (arg->stack) == MEM)
{
emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3,

509
gcc/cccp.c
View File

File diff suppressed because it is too large Load Diff

6
gcc/cexp.c
View File

@ -336,7 +336,7 @@ static const short yycheck[] = { 4,
26, 27, 23, 24, 25, 26, 27, 0, 9
};
/* -*-C-*- Note some compilers choke on comments on `#line' lines. */
#line 3 "/tmp/sky/share/bison.simple"
#line 3 "/usr/cygnus/TBD-TBD/share/bison.simple"
/* Skeleton output parser for bison,
Copyright (C) 1984, 1989, 1990 Free Software Foundation, Inc.
@ -529,7 +529,7 @@ __yy_memcpy (char *to, char *from, int count)
#endif
#endif
#line 196 "/tmp/sky/share/bison.simple"
#line 196 "/usr/cygnus/TBD-TBD/share/bison.simple"
/* The user can define YYPARSE_PARAM as the name of an argument to be passed
into yyparse. The argument should have type void *.
@ -1110,7 +1110,7 @@ case 40:
break;}
}
/* the action file gets copied in in place of this dollarsign */
#line 498 "/tmp/sky/share/bison.simple"
#line 498 "/usr/cygnus/TBD-TBD/share/bison.simple"
yyvsp -= yylen;
yyssp -= yylen;

179
gcc/combine.c
View File

@ -76,7 +76,7 @@ Boston, MA 02111-1307, USA. */
#include "config.h"
#include "system.h"
#include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
#include "rtl.h"
#include "flags.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -1812,17 +1812,17 @@ try_combine (i3, i2, i1)
? gen_rtx_SET (VOIDmode, i1dest, i1src) : PATTERN (i1));
if (added_sets_2)
{
/* If there is no I1, use I2's body as is. We used to also not do
the subst call below if I2 was substituted into I3,
but that could lose a simplification. */
if (i1 == 0)
XVECEXP (newpat, 0, --total_sets) = i2pat;
else
/* See comment where i2pat is assigned. */
XVECEXP (newpat, 0, --total_sets)
= subst (i2pat, i1dest, i1src, 0, 0);
}
{
/* If there is no I1, use I2's body as is. We used to also not do
the subst call below if I2 was substituted into I3,
but that could lose a simplification. */
if (i1 == 0)
XVECEXP (newpat, 0, --total_sets) = i2pat;
else
/* See comment where i2pat is assigned. */
XVECEXP (newpat, 0, --total_sets)
= subst (i2pat, i1dest, i1src, 0, 0);
}
}
/* We come here when we are replacing a destination in I2 with the
@ -1906,14 +1906,14 @@ try_combine (i3, i2, i1)
|| (REG_N_SETS (REGNO (i2dest)) == 1 && ! added_sets_2
&& ! REG_USERVAR_P (i2dest))))
ni2dest = gen_rtx_REG (GET_MODE (SET_DEST (newpat)),
REGNO (i2dest));
REGNO (i2dest));
m_split = split_insns
(gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, newpat,
gen_rtx_CLOBBER (VOIDmode,
ni2dest))),
i3);
m_split = split_insns (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2, newpat,
gen_rtx_CLOBBER (VOIDmode,
ni2dest))),
i3);
}
if (m_split && GET_CODE (m_split) == SEQUENCE
@ -4604,7 +4604,10 @@ simplify_set (x)
low-order bits. */
if (GET_MODE_CLASS (mode) == MODE_INT)
src = force_to_mode (src, mode, GET_MODE_MASK (mode), NULL_RTX, 0);
{
src = force_to_mode (src, mode, GET_MODE_MASK (mode), NULL_RTX, 0);
SUBST (SET_SRC (x), src);
}
/* If we are setting CC0 or if the source is a COMPARE, look for the use of
the comparison result and try to simplify it unless we already have used
@ -4852,6 +4855,68 @@ simplify_set (x)
src = SET_SRC (x);
}
#ifdef HAVE_conditional_arithmetic
/* If we have conditional arithmetic and the operand of a SET is
a conditional expression, replace this with an IF_THEN_ELSE.
We can either have a conditional expression or a MULT of that expression
with a constant. */
if ((GET_RTX_CLASS (GET_CODE (src)) == '1'
|| GET_RTX_CLASS (GET_CODE (src)) == '2'
|| GET_RTX_CLASS (GET_CODE (src)) == 'c')
&& (GET_RTX_CLASS (GET_CODE (XEXP (src, 0))) == '<'
|| (GET_CODE (XEXP (src, 0)) == MULT
&& GET_RTX_CLASS (GET_CODE (XEXP (XEXP (src, 0), 0))) == '<'
&& GET_CODE (XEXP (XEXP (src, 0), 1)) == CONST_INT)))
{
rtx cond = XEXP (src, 0);
rtx true_val = const1_rtx;
rtx false_arm, true_arm;
if (GET_CODE (cond) == MULT)
{
true_val = XEXP (cond, 1);
cond = XEXP (cond, 0);
}
if (GET_RTX_CLASS (GET_CODE (src)) == '1')
{
true_arm = gen_unary (GET_CODE (src), GET_MODE (src),
GET_MODE (XEXP (src, 0)), true_val);
false_arm = gen_unary (GET_CODE (src), GET_MODE (src),
GET_MODE (XEXP (src, 0)), const0_rtx);
}
else
{
true_arm = gen_binary (GET_CODE (src), GET_MODE (src),
true_val, XEXP (src, 1));
false_arm = gen_binary (GET_CODE (src), GET_MODE (src),
const0_rtx, XEXP (src, 1));
}
/* Canonicalize if true_arm is the simpler one. */
if (GET_RTX_CLASS (GET_CODE (true_arm)) == 'o'
&& GET_RTX_CLASS (GET_CODE (false_arm)) != 'o'
&& reversible_comparison_p (cond))
{
rtx temp = true_arm;
true_arm = false_arm;
false_arm = temp;
cond = gen_rtx_combine (reverse_condition (GET_CODE (cond)),
GET_MODE (cond), XEXP (cond, 0),
XEXP (cond, 1));
}
src = gen_rtx_combine (IF_THEN_ELSE, GET_MODE (src),
gen_rtx_combine (GET_CODE (cond), VOIDmode,
XEXP (cond, 0),
XEXP (cond, 1)),
true_arm, false_arm);
SUBST (SET_SRC (x), src);
}
#endif
/* If either SRC or DEST is a CLOBBER of (const_int 0), make this
whole thing fail. */
if (GET_CODE (src) == CLOBBER && XEXP (src, 0) == const0_rtx)
@ -5419,8 +5484,9 @@ expand_field_assignment (x)
+ (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
{
x = gen_rtx_SET (VOIDmode, SUBREG_REG (SET_DEST (x)),
gen_lowpart_for_combine (GET_MODE (SUBREG_REG (SET_DEST (x))),
SET_SRC (x)));
gen_lowpart_for_combine
(GET_MODE (SUBREG_REG (SET_DEST (x))),
SET_SRC (x)));
continue;
}
else
@ -5458,22 +5524,22 @@ expand_field_assignment (x)
/* Now compute the equivalent expression. Make a copy of INNER
for the SET_DEST in case it is a MEM into which we will substitute;
we don't want shared RTL in that case. */
x = gen_rtx_SET (VOIDmode, copy_rtx (inner),
gen_binary (IOR, compute_mode,
gen_binary (AND, compute_mode,
gen_unary (NOT, compute_mode,
compute_mode,
gen_binary (ASHIFT,
compute_mode,
mask, pos)),
inner),
gen_binary (ASHIFT, compute_mode,
gen_binary (AND, compute_mode,
gen_lowpart_for_combine
(compute_mode,
SET_SRC (x)),
mask),
pos)));
x = gen_rtx_SET
(VOIDmode, copy_rtx (inner),
gen_binary (IOR, compute_mode,
gen_binary (AND, compute_mode,
gen_unary (NOT, compute_mode,
compute_mode,
gen_binary (ASHIFT,
compute_mode,
mask, pos)),
inner),
gen_binary (ASHIFT, compute_mode,
gen_binary (AND, compute_mode,
gen_lowpart_for_combine
(compute_mode, SET_SRC (x)),
mask),
pos)));
}
return x;
@ -5614,7 +5680,8 @@ make_extraction (mode, inner, pos, pos_rtx, len,
if (tmode != inner_mode)
new = gen_rtx_SUBREG (tmode, inner,
(WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (inner_mode) > UNITS_PER_WORD
&& (GET_MODE_SIZE (inner_mode)
> UNITS_PER_WORD)
? (((GET_MODE_SIZE (inner_mode)
- GET_MODE_SIZE (tmode))
/ UNITS_PER_WORD)
@ -5654,12 +5721,12 @@ make_extraction (mode, inner, pos, pos_rtx, len,
&& ! in_compare && ! spans_byte && unsignedp)
return 0;
/* Unless we are allowed to span bytes, reject this if we would be
spanning bytes or if the position is not a constant and the length
is not 1. In all other cases, we would only be going outside
out object in cases when an original shift would have been
/* Unless we are allowed to span bytes or INNER is not MEM, reject this if
we would be spanning bytes or if the position is not a constant and the
length is not 1. In all other cases, we would only be going outside
our object in cases when an original shift would have been
undefined. */
if (! spans_byte
if (! spans_byte && GET_CODE (inner) == MEM
&& ((pos_rtx == 0 && pos + len > GET_MODE_BITSIZE (is_mode))
|| (pos_rtx != 0 && len != 1)))
return 0;
@ -9129,7 +9196,8 @@ recog_for_combine (pnewpat, insn, pnotes)
{
rtx newpat = gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (GET_CODE (pat) == PARALLEL
? XVECLEN (pat, 0) + num_clobbers_to_add
? (XVECLEN (pat, 0)
+ num_clobbers_to_add)
: num_clobbers_to_add + 1));
if (GET_CODE (pat) == PARALLEL)
@ -9230,6 +9298,7 @@ gen_lowpart_for_combine (mode, x)
if (WORDS_BIG_ENDIAN)
offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
- MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
if (BYTES_BIG_ENDIAN)
{
/* Adjust the address so that the address-after-the-data is
@ -10208,12 +10277,17 @@ simplify_comparison (code, pop0, pop1)
represents the low part, permute the SUBREG and the AND and
try again. */
if (GET_CODE (XEXP (op0, 0)) == SUBREG
&& ((mode_width
>= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (XEXP (op0, 0)))))
&& (0
#ifdef WORD_REGISTER_OPERATIONS
|| subreg_lowpart_p (XEXP (op0, 0))
|| ((mode_width
> (GET_MODE_BITSIZE
(GET_MODE (SUBREG_REG (XEXP (op0, 0))))))
&& mode_width <= BITS_PER_WORD)
#endif
)
|| ((mode_width
<= (GET_MODE_BITSIZE
(GET_MODE (SUBREG_REG (XEXP (op0, 0))))))
&& subreg_lowpart_p (XEXP (op0, 0))))
#ifndef WORD_REGISTER_OPERATIONS
/* It is unsafe to commute the AND into the SUBREG if the SUBREG
is paradoxical and WORD_REGISTER_OPERATIONS is not defined.
@ -11700,8 +11774,7 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1)
if (! find_regno_note (tem, REG_UNUSED,
REGNO (XEXP (note, 0))))
REG_NOTES (tem)
= gen_rtx_EXPR_LIST (REG_UNUSED,
XEXP (note, 0),
= gen_rtx_EXPR_LIST (REG_UNUSED, XEXP (note, 0),
REG_NOTES (tem));
}
else
@ -11863,8 +11936,8 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1)
&& ! reg_bitfield_target_p (piece,
PATTERN (place)))
REG_NOTES (place)
= gen_rtx_EXPR_LIST (REG_DEAD,
piece, REG_NOTES (place));
= gen_rtx_EXPR_LIST (REG_DEAD, piece,
REG_NOTES (place));
}
place = 0;

5
gcc/config/1750a/1750a.c
View File

@ -21,8 +21,7 @@ Boston, MA 02111-1307, USA. */
#define __datalbl
#include "config.h"
#include <stdio.h>
#include <string.h>
#include "system.h"
#include "rtl.h"
#include "tree.h"
#include "function.h"
@ -118,7 +117,7 @@ function_arg (cum, mode, type, named)
else
size = GET_MODE_SIZE (mode);
if (cum + size < 12)
return gen_rtx (REG, mode, cum);
return gen_rtx_REG (mode, cum);
else
return (rtx) 0;
}

8
gcc/config/1750a/1750a.h
View File

@ -474,14 +474,14 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx(REG,TYPE_MODE(VALTYPE),0)
gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
/* 1750 note: no libcalls yet */
#define LIBCALL_VALUE(MODE) printf("LIBCALL_VALUE called!\n"), \
gen_rtx(REG,MODE,0)
gen_rtx_REG (MODE, 0)
/* 1 if N is a possible register number for a function value. */
@ -696,8 +696,8 @@ enum reg_class { NO_REGS, R2, R0_1, INDEX_REGS, BASE_REGS, ALL_REGS, LIM_REG_CLA
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) printf("INITIALIZE_TRAMPO called\n")
/* { \
emit_move_insn (gen_rtx (MEM, QImode, plus_constant (TRAMP, 1)), CXT); \
emit_move_insn (gen_rtx (MEM, QImode, plus_constant (TRAMP, 6)), FNADDR); \
emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 1)), CXT); \
emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 6)), FNADDR); \
} */

27
gcc/config/1750a/1750a.md
View File

@ -1,6 +1,6 @@
;;- Machine description for GNU compiler
;;- MIL-STD-1750A version.
;; Copyright (C) 1994, 1995, 1996, 1997 Free Software Foundation, Inc.
;; Copyright (C) 1994, 95, 96, 97, 98, 1999 Free Software Foundation, Inc.
;; Contributed by O.M.Kellogg, DASA (oliver.kellogg@space.otn.dasa.de).
;; This file is part of GNU CC.
@ -767,9 +767,9 @@
(neg:TQF (match_operand:TQF 1 "register_operand" "r")))]
""
"
emit_insn(gen_rtx(SET,VOIDmode,operands[0],CONST0_RTX(TQFmode)));
emit_insn(gen_rtx(SET,VOIDmode,operands[0],
gen_rtx(MINUS,TQFmode,operands[0],operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0], CONST0_RTX (TQFmode)));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_MINUS (TQFmode, operands[0], operands[1])));
DONE;
")
@ -954,7 +954,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2]));
operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2]));
}")
(define_insn ""
@ -981,7 +981,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2]));
operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2]));
}")
(define_insn ""
@ -1012,7 +1012,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2]));
operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2]));
}")
(define_insn ""
@ -1038,7 +1038,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2]));
operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2]));
}")
(define_insn ""
@ -1375,17 +1375,6 @@
""
"ANYCALL %0")
; (define_insn "return"
; [(return)]
; ""
; "*
; {
; rtx oprnd = GEN_INT (get_frame_size());
; output_asm_insn(\"ret.m %0\",&oprnd);
; return \"\;\";
; } ")
(define_insn "indirect_jump"
[(set (pc) (match_operand:QI 0 "address_operand" "p"))]
""

11
gcc/config/a29k/a29k.c
View File

@ -1,5 +1,5 @@
/* Subroutines used for code generation on AMD Am29000.
Copyright (C) 1987, 88, 90-94, 1995, 1997, 1999 Free Software
Copyright (C) 1987, 88, 90-95, 1997, 1998, 1999 Free Software
Foundation, Inc.
Contributed by Richard Kenner (kenner@nyu.edu)
@ -21,7 +21,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -854,9 +854,10 @@ a29k_clobbers_to (insn, op)
for (i = R_LR (2); i < high_regno; i++)
CALL_INSN_FUNCTION_USAGE (insn)
= gen_rtx (EXPR_LIST, VOIDmode,
gen_rtx (CLOBBER, VOIDmode, gen_rtx (REG, SImode, i)),
CALL_INSN_FUNCTION_USAGE (insn));
= gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_CLOBBER (VOIDmode,
gen_rtx (REG, SImode, i)),
CALL_INSN_FUNCTION_USAGE (insn));
}
/* These routines are used in finding insns to fill delay slots in the

20
gcc/config/a29k/a29k.h
View File

@ -746,12 +746,12 @@ extern struct rtx_def *a29k_get_reloaded_address ();
On 29k the value is found in gr96. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), R_GR (96))
gen_rtx_REG (TYPE_MODE (VALTYPE), R_GR (96))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, R_GR (96))
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, R_GR (96))
/* 1 if N is a possible register number for a function value
as seen by the caller.
@ -846,7 +846,7 @@ extern struct rtx_def *a29k_get_reloaded_address ();
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \
? gen_rtx(REG, (MODE), R_LR (2) + (CUM)) : 0)
? gen_rtx_REG ((MODE), R_LR (2) + (CUM)) : 0)
/* Define where a function finds its arguments.
This is different from FUNCTION_ARG because of register windows.
@ -856,8 +856,8 @@ extern struct rtx_def *a29k_get_reloaded_address ();
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
((CUM) < 16 && (NAMED) && ! MUST_PASS_IN_STACK (MODE, TYPE) \
? gen_rtx (REG, MODE, \
incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \
? gen_rtx_REG (MODE, \
incoming_reg (CUM, A29K_ARG_SIZE (MODE, TYPE, NAMED))) \
: 0)
/* This indicates that an argument is to be passed with an invisible reference
@ -911,7 +911,7 @@ extern struct rtx_def *a29k_get_reloaded_address ();
if (! (NO_RTL) && first_reg_offset != 16) \
move_block_from_reg \
(R_AR (0) + first_reg_offset, \
gen_rtx (MEM, BLKmode, virtual_incoming_args_rtx), \
gen_rtx_MEM (BLKmode, virtual_incoming_args_rtx), \
16 - first_reg_offset, (16 - first_reg_offset) * UNITS_PER_WORD); \
PRETEND_SIZE = (16 - first_reg_offset) * UNITS_PER_WORD; \
} \
@ -1043,25 +1043,25 @@ extern char *a29k_function_name;
rtx _val = force_reg (SImode, VALUE); \
\
_addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 3)); \
emit_move_insn (gen_rtx (MEM, QImode, _addr), \
emit_move_insn (gen_rtx_MEM (QImode, _addr), \
gen_lowpart (QImode, _val)); \
\
_temp = expand_shift (RSHIFT_EXPR, SImode, _val, \
build_int_2 (8, 0), 0, 1); \
_addr = memory_address (QImode, plus_constant (TRAMP, (CONST) + 1)); \
emit_move_insn (gen_rtx (MEM, QImode, _addr), \
emit_move_insn (gen_rtx_MEM (QImode, _addr), \
gen_lowpart (QImode, _temp)); \
\
_temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \
build_int_2 (8, 0), _temp, 1); \
_addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 3)); \
emit_move_insn (gen_rtx (MEM, QImode, _addr), \
emit_move_insn (gen_rtx_MEM (QImode, _addr), \
gen_lowpart (QImode, _temp)); \
\
_temp = expand_shift (RSHIFT_EXPR, SImode, _temp, \
build_int_2 (8, 0), _temp, 1); \
_addr = memory_address (QImode, plus_constant (TRAMP, (CONSTH) + 1)); \
emit_move_insn (gen_rtx (MEM, QImode, _addr), \
emit_move_insn (gen_rtx_MEM (QImode, _addr), \
gen_lowpart (QImode, _temp)); \
}

129
gcc/config/a29k/a29k.md
View File

@ -1,5 +1,5 @@
;;- Machine description for AMD Am29000 for GNU C compiler
;; Copyright (C) 1991, 1992, 1994 Free Software Foundation, Inc.
;; Copyright (C) 1991, 1992, 1994, 1998, 1999 Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;; This file is part of GNU CC.
@ -145,8 +145,8 @@
later be inlined into another function. */
if (! TARGET_SMALL_MEMORY
&& GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF)
operands[0] = gen_rtx (MEM, SImode,
force_reg (Pmode, XEXP (operands[0], 0)));
operands[0] = gen_rtx_MEM (SImode,
force_reg (Pmode, XEXP (operands[0], 0)));
}")
(define_expand "call_value"
@ -178,9 +178,8 @@
later be inlined into another function. */
if (! TARGET_SMALL_MEMORY
&& GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF)
operands[1] = gen_rtx (MEM, SImode,
force_reg (Pmode, XEXP (operands[1], 0)));
operands[1] = gen_rtx_MEM (SImode,
force_reg (Pmode, XEXP (operands[1], 0)));
}")
(define_insn ""
@ -644,9 +643,9 @@
if (size != 8 || (pos != 8 && pos != 16))
FAIL;
operands[3] = gen_rtx (ASHIFT, PSImode,
force_reg (PSImode, GEN_INT (pos / 8)),
GEN_INT (3));
operands[3] = gen_rtx_ASHIFT (PSImode,
force_reg (PSImode, GEN_INT (pos / 8)),
GEN_INT (3));
}")
@ -967,9 +966,9 @@
if ((size != 8 && size != 16) || pos % size != 0)
FAIL;
operands[2] = gen_rtx (ASHIFT, PSImode,
force_reg (PSImode, GEN_INT (pos / 8)),
GEN_INT (3));
operands[2] = gen_rtx_ASHIFT (PSImode,
force_reg (PSImode, GEN_INT (pos / 8)),
GEN_INT (3));
}")
;; LOAD (also used by move insn).
@ -1056,20 +1055,20 @@
/* CR gets set to the number of registers minus one. */
operands[2] = GEN_INT(count - 1);
operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 2));
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 2));
from = memory_address (SImode, XEXP (operands[1], 0));
XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode,
gen_rtx (REG, SImode, regno),
gen_rtx (MEM, SImode, from));
XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode,
gen_rtx_REG (SImode, regno),
gen_rtx_MEM (SImode, from));
operands[4] = gen_reg_rtx (PSImode);
XVECEXP (operands[3], 0, 1) = gen_rtx (USE, VOIDmode, operands[4]);
XVECEXP (operands[3], 0, 2) = gen_rtx (CLOBBER, VOIDmode, operands[4]);
XVECEXP (operands[3], 0, 1) = gen_rtx_USE (VOIDmode, operands[4]);
XVECEXP (operands[3], 0, 2) = gen_rtx_CLOBBER (VOIDmode, operands[4]);
for (i = 1; i < count; i++)
XVECEXP (operands[3], 0, i + 2)
= gen_rtx (SET, VOIDmode, gen_rtx (REG, SImode, regno + i),
gen_rtx (MEM, SImode, plus_constant (from, i * 4)));
= gen_rtx_SET (VOIDmode, gen_rtx (REG, SImode, regno + i),
gen_rtx_MEM (SImode, plus_constant (from, i * 4)));
}")
;; Indicate that CR is used and is then clobbered.
@ -1378,20 +1377,20 @@
/* CR gets set to the number of registers minus one. */
operands[2] = GEN_INT(count - 1);
operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 2));
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 2));
from = memory_address (SImode, XEXP (operands[0], 0));
XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode,
gen_rtx (MEM, SImode, from),
gen_rtx (REG, SImode, regno));
XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode,
gen_rtx_MEM (SImode, from),
gen_rtx_REG (SImode, regno));
operands[4] = gen_reg_rtx (PSImode);
XVECEXP (operands[3], 0, 1) = gen_rtx (USE, VOIDmode, operands[4]);
XVECEXP (operands[3], 0, 2) = gen_rtx (CLOBBER, VOIDmode, operands[4]);
XVECEXP (operands[3], 0, 1) = gen_rtx_USE (VOIDmode, operands[4]);
XVECEXP (operands[3], 0, 2) = gen_rtx_CLOBBER (VOIDmode, operands[4]);
for (i = 1; i < count; i++)
XVECEXP (operands[3], 0, i + 2)
= gen_rtx (SET, VOIDmode,
gen_rtx (MEM, SImode, plus_constant (from, i * 4)),
gen_rtx (REG, SImode, regno + i));
= gen_rtx_SET (VOIDmode,
gen_rtx_MEM (SImode, plus_constant (from, i * 4)),
gen_rtx_REG (SImode, regno + i));
}")
(define_expand "store_multiple_bug"
@ -1417,19 +1416,19 @@
count = INTVAL (operands[2]);
regno = REGNO (operands[1]);
operands[3] = gen_rtx (PARALLEL, VOIDmode, rtvec_alloc (count + 1));
operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count + 1));
from = memory_address (SImode, XEXP (operands[0], 0));
XVECEXP (operands[3], 0, 0) = gen_rtx (SET, VOIDmode,
gen_rtx (MEM, SImode, from),
gen_rtx (REG, SImode, regno));
XVECEXP (operands[3], 0, 0) = gen_rtx_SET (VOIDmode,
gen_rtx_MEM (SImode, from),
gen_rtx_REG (SImode, regno));
XVECEXP (operands[3], 0, 1)
= gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, PSImode));
= gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (PSImode));
for (i = 1; i < count; i++)
XVECEXP (operands[3], 0, i + 1)
= gen_rtx (SET, VOIDmode,
gen_rtx (MEM, SImode, plus_constant (from, i * 4)),
gen_rtx (REG, SImode, regno + i));
= gen_rtx_SET (VOIDmode,
gen_rtx_MEM (SImode, plus_constant (from, i * 4)),
gen_rtx_REG (SImode, regno + i));
}")
(define_insn ""
@ -1811,7 +1810,7 @@
"
{ rtx seq = gen_loadhi (gen_lowpart (SImode, operands[0]),
a29k_get_reloaded_address (operands[1]),
gen_rtx (REG, SImode, R_TAV),
gen_rtx_REG (SImode, R_TAV),
operands[2]);
a29k_set_memflags (seq, operands[1]);
@ -1828,7 +1827,7 @@
{ rtx (*fcn) () = TARGET_BYTE_WRITES ? gen_storehihww : gen_storehinhww;
rtx seq = (*fcn) (a29k_get_reloaded_address (operands[0]),
gen_lowpart (SImode, operands[1]),
gen_rtx (REG, SImode, R_TAV), operands[2]);
gen_rtx_REG (SImode, R_TAV), operands[2]);
a29k_set_memflags (seq, operands[0]);
emit_insn (seq);
@ -1941,7 +1940,7 @@
"
{ rtx seq = gen_loadqi (gen_lowpart (SImode, operands[0]),
a29k_get_reloaded_address (operands[1]),
gen_rtx (REG, SImode, R_TAV),
gen_rtx_REG (SImode, R_TAV),
operands[2]);
a29k_set_memflags (seq, operands[1]);
@ -1958,7 +1957,7 @@
{ rtx (*fcn) () = TARGET_BYTE_WRITES ? gen_storeqihww : gen_storeqinhww;
rtx seq = (*fcn) (a29k_get_reloaded_address (operands[0]),
gen_lowpart (SImode, operands[1]),
gen_rtx (REG, SImode, R_TAV), operands[2]);
gen_rtx_REG (SImode, R_TAV), operands[2]);
a29k_set_memflags (seq, operands[0]);
emit_insn (seq);
@ -2173,25 +2172,25 @@
if (REGNO (operands[0]) >= REGNO (operands[1]) + 1
&& REGNO (operands[0]) <= REGNO (operands[1]) + 3)
{
operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]) + 3);
operands[4] = gen_rtx (REG, SImode, REGNO (operands[1]) + 3);
operands[5] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2);
operands[6] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2);
operands[7] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[8] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
operands[9] = gen_rtx (REG, SImode, REGNO (operands[0]));
operands[10] = gen_rtx (REG, SImode, REGNO (operands[1]));
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]) + 3);
operands[4] = gen_rtx_REG (SImode, REGNO (operands[1]) + 3);
operands[5] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2);
operands[6] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2);
operands[7] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
operands[8] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
operands[9] = gen_rtx_REG (SImode, REGNO (operands[0]));
operands[10] = gen_rtx_REG (SImode, REGNO (operands[1]));
}
else
{
operands[3] = gen_rtx (REG, SImode, REGNO (operands[0]));
operands[4] = gen_rtx (REG, SImode, REGNO (operands[1]));
operands[5] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[6] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
operands[7] = gen_rtx (REG, SImode, REGNO (operands[0]) + 2);
operands[8] = gen_rtx (REG, SImode, REGNO (operands[1]) + 2);
operands[9] = gen_rtx (REG, SImode, REGNO (operands[0]) + 3);
operands[10] = gen_rtx (REG, SImode, REGNO (operands[1]) + 3);
operands[3] = gen_rtx_REG (SImode, REGNO (operands[0]));
operands[4] = gen_rtx_REG (SImode, REGNO (operands[1]));
operands[5] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
operands[6] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
operands[7] = gen_rtx_REG (SImode, REGNO (operands[0]) + 2);
operands[8] = gen_rtx_REG (SImode, REGNO (operands[1]) + 2);
operands[9] = gen_rtx_REG (SImode, REGNO (operands[0]) + 3);
operands[10] = gen_rtx_REG (SImode, REGNO (operands[1]) + 3);
}
}")
@ -2553,9 +2552,9 @@
{
operands[1] = gen_reg_rtx (SImode);
if (a29k_compare_fp_p)
operands[2] = gen_rtx (GT, SImode, a29k_compare_op1, a29k_compare_op0);
operands[2] = gen_rtx_GT (SImode, a29k_compare_op1, a29k_compare_op0);
else
operands[2] = gen_rtx (LT, SImode, a29k_compare_op0, a29k_compare_op1);
operands[2] = gen_rtx_LT (SImode, a29k_compare_op0, a29k_compare_op1);
}")
;; Similarly for "le".
@ -2570,9 +2569,9 @@
{
operands[1] = gen_reg_rtx (SImode);
if (a29k_compare_fp_p)
operands[2] = gen_rtx (GE, SImode, a29k_compare_op1, a29k_compare_op0);
operands[2] = gen_rtx_GE (SImode, a29k_compare_op1, a29k_compare_op0);
else
operands[2] = gen_rtx (LE, SImode, a29k_compare_op0, a29k_compare_op1);
operands[2] = gen_rtx_LE (SImode, a29k_compare_op0, a29k_compare_op1);
}")
(define_expand "bltu"
@ -2708,9 +2707,9 @@
"
{
if (a29k_compare_fp_p)
operands[1] = gen_rtx (GT, SImode, a29k_compare_op1, a29k_compare_op0);
operands[1] = gen_rtx_GT (SImode, a29k_compare_op1, a29k_compare_op0);
else
operands[1] = gen_rtx (LT, SImode, a29k_compare_op0, a29k_compare_op1);
operands[1] = gen_rtx_LT (SImode, a29k_compare_op0, a29k_compare_op1);
}")
;; Similarly for "le"
@ -2721,9 +2720,9 @@
"
{
if (a29k_compare_fp_p)
operands[1] = gen_rtx (GE, SImode, a29k_compare_op1, a29k_compare_op0);
operands[1] = gen_rtx_GE (SImode, a29k_compare_op1, a29k_compare_op0);
else
operands[1] = gen_rtx (LE, SImode, a29k_compare_op0, a29k_compare_op1);
operands[1] = gen_rtx_LE (SImode, a29k_compare_op0, a29k_compare_op1);
}")
(define_expand "sltu"

12
gcc/config/alpha/alpha.c
View File

@ -412,7 +412,7 @@ sext_add_operand (op, mode)
return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'I')
|| CONST_OK_FOR_LETTER_P (INTVAL (op), 'O'));
return register_operand (op, mode);
return reg_not_elim_operand (op, mode);
}
/* Return 1 if OP is the constant 4 or 8. */
@ -3052,9 +3052,9 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs)
/* Store function address and CXT. */
addr = memory_address (mode, plus_constant (tramp, fnofs));
emit_move_insn (gen_rtx (MEM, mode, addr), fnaddr);
emit_move_insn (gen_rtx_MEM (mode, addr), fnaddr);
addr = memory_address (mode, plus_constant (tramp, cxtofs));
emit_move_insn (gen_rtx (MEM, mode, addr), cxt);
emit_move_insn (gen_rtx_MEM (mode, addr), cxt);
/* This has been disabled since the hint only has a 32k range, and in
no existing OS is the stack within 32k of the text segment. */
@ -3070,15 +3070,15 @@ alpha_initialize_trampoline (tramp, fnaddr, cxt, fnofs, cxtofs, jmpofs)
/* Merge in the hint. */
addr = memory_address (SImode, plus_constant (tramp, jmpofs));
temp1 = force_reg (SImode, gen_rtx (MEM, SImode, addr));
temp1 = force_reg (SImode, gen_rtx_MEM (SImode, addr));
temp1 = expand_and (temp1, GEN_INT (0xffffc000), NULL_RTX);
temp1 = expand_binop (SImode, ior_optab, temp1, temp, temp1, 1,
OPTAB_WIDEN);
emit_move_insn (gen_rtx (MEM, SImode, addr), temp1);
emit_move_insn (gen_rtx_MEM (SImode, addr), temp1);
}
#ifdef TRANSFER_FROM_TRAMPOLINE
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__enable_execute_stack"),
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"),
0, VOIDmode, 1, addr, Pmode);
#endif

29
gcc/config/alpha/alpha.h
View File

@ -1009,25 +1009,25 @@ extern int alpha_memory_latency;
On Alpha the value is found in $0 for integer functions and
$f0 for floating-point functions. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
&& TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
|| POINTER_TYPE_P (VALTYPE)) \
&& TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
|| POINTER_TYPE_P (VALTYPE)) \
? word_mode : TYPE_MODE (VALTYPE), \
((TARGET_FPREGS \
&& (TREE_CODE (VALTYPE) == REAL_TYPE \
&& (TREE_CODE (VALTYPE) == REAL_TYPE \
|| TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \
? 32 : 0))
? 32 : 0))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) \
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG (MODE, \
(TARGET_FPREGS \
&& (GET_MODE_CLASS (MODE) == MODE_FLOAT \
(TARGET_FPREGS \
&& (GET_MODE_CLASS (MODE) == MODE_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
? 32 : 0))
? 32 : 0))
/* The definition of this macro implies that there are cases where
a scalar value cannot be returned in registers.
@ -1105,11 +1105,12 @@ extern int alpha_memory_latency;
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
? gen_rtx(REG, (MODE), \
(CUM) + 16 + ((TARGET_FPREGS \
&& (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
* 32)) \
? gen_rtx_REG ((MODE), \
(CUM) + 16 \
+ ((TARGET_FPREGS \
&& (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
* 32)) \
: 0)
/* Specify the padding direction of arguments.

93
gcc/config/alpha/alpha.md
View File

@ -491,7 +491,7 @@
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(sign_extend:DI
(plus:SI (match_operand:SI 1 "register_operand" "")
(plus:SI (match_operand:SI 1 "reg_not_elim_operand" "")
(match_operand:SI 2 "const_int_operand" ""))))
(clobber (match_operand:SI 3 "reg_not_elim_operand" ""))]
"! sext_add_operand (operands[2], SImode) && INTVAL (operands[2]) > 0
@ -626,7 +626,7 @@
[(match_operand 2 "" "")
(match_operand 3 "" "")])
(match_operand:SI 4 "const48_operand" ""))
(match_operand:SI 5 "add_operand" ""))))
(match_operand:SI 5 "sext_add_operand" ""))))
(clobber (match_operand:DI 6 "reg_not_elim_operand" ""))]
""
[(set (match_dup 6) (match_dup 7))
@ -650,95 +650,6 @@
s%2addq %1,%3,%0
s%2subq %1,%n3,%0")
;; These variants of the above insns can occur if the third operand
;; is the frame pointer. This is a kludge, but there doesn't
;; seem to be a way around it. Only recognize them while reloading.
(define_insn ""
[(set (match_operand:DI 0 "some_operand" "=&r")
(plus:DI (plus:DI (match_operand:DI 1 "some_operand" "r")
(match_operand:DI 2 "some_operand" "r"))
(match_operand:DI 3 "some_operand" "rIOKL")))]
"reload_in_progress"
"#")
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(plus:DI (plus:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "register_operand" ""))
(match_operand:DI 3 "add_operand" "")))]
"reload_completed"
[(set (match_dup 0) (plus:DI (match_dup 1) (match_dup 2)))
(set (match_dup 0) (plus:DI (match_dup 0) (match_dup 3)))]
"")
(define_insn ""
[(set (match_operand:SI 0 "some_operand" "=&r")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "some_operand" "rJ")
(match_operand:SI 2 "const48_operand" "I"))
(match_operand:SI 3 "some_operand" "r"))
(match_operand:SI 4 "some_operand" "rIOKL")))]
"reload_in_progress"
"#")
(define_split
[(set (match_operand:SI 0 "register_operand" "r")
(plus:SI (plus:SI (mult:SI (match_operand:SI 1 "reg_or_0_operand" "")
(match_operand:SI 2 "const48_operand" ""))
(match_operand:SI 3 "register_operand" ""))
(match_operand:SI 4 "add_operand" "rIOKL")))]
"reload_completed"
[(set (match_dup 0)
(plus:SI (mult:SI (match_dup 1) (match_dup 2)) (match_dup 3)))
(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))]
"")
(define_insn ""
[(set (match_operand:DI 0 "some_operand" "=&r")
(sign_extend:DI
(plus:SI (plus:SI
(mult:SI (match_operand:SI 1 "some_operand" "rJ")
(match_operand:SI 2 "const48_operand" "I"))
(match_operand:SI 3 "some_operand" "r"))
(match_operand:SI 4 "some_operand" "rIOKL"))))]
"reload_in_progress"
"#")
(define_split
[(set (match_operand:DI 0 "register_operand" "")
(sign_extend:DI
(plus:SI (plus:SI
(mult:SI (match_operand:SI 1 "reg_or_0_operand" "")
(match_operand:SI 2 "const48_operand" ""))
(match_operand:SI 3 "register_operand" ""))
(match_operand:SI 4 "add_operand" ""))))]
"reload_completed"
[(set (match_dup 5)
(plus:SI (mult:SI (match_dup 1) (match_dup 2)) (match_dup 3)))
(set (match_dup 0) (sign_extend:DI (plus:SI (match_dup 5) (match_dup 4))))]
"operands[5] = gen_lowpart (SImode, operands[0]);")
(define_insn ""
[(set (match_operand:DI 0 "some_operand" "=&r")
(plus:DI (plus:DI (mult:DI (match_operand:DI 1 "some_operand" "rJ")
(match_operand:DI 2 "const48_operand" "I"))
(match_operand:DI 3 "some_operand" "r"))
(match_operand:DI 4 "some_operand" "rIOKL")))]
"reload_in_progress"
"#")
(define_split
[(set (match_operand:DI 0 "register_operand" "=")
(plus:DI (plus:DI (mult:DI (match_operand:DI 1 "reg_or_0_operand" "")
(match_operand:DI 2 "const48_operand" ""))
(match_operand:DI 3 "register_operand" ""))
(match_operand:DI 4 "add_operand" "")))]
"reload_completed"
[(set (match_dup 0)
(plus:DI (mult:DI (match_dup 1) (match_dup 2)) (match_dup 3)))
(set (match_dup 0) (plus:DI (match_dup 0) (match_dup 4)))]
"")
(define_insn "negsi2"
[(set (match_operand:SI 0 "register_operand" "=r")
(neg:SI (match_operand:SI 1 "reg_or_8bit_operand" "rI")))]

16
gcc/config/alpha/vms.h
View File

@ -143,7 +143,7 @@ Boston, MA 02111-1307, USA. */
Thus 6 or more means all following args should go on the stack. */
enum avms_arg_type {I64, FF, FD, FG, FS, FT};
typedef struct {char num_args; enum avms_arg_type atypes[6];} avms_arg_info;
typedef struct {int num_args; enum avms_arg_type atypes[6];} avms_arg_info;
#undef CUMULATIVE_ARGS
#define CUMULATIVE_ARGS avms_arg_info
@ -185,12 +185,12 @@ extern struct rtx_def *alpha_arg_info_reg_val ();
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
((MODE) == VOIDmode ? alpha_arg_info_reg_val (CUM) \
: ((CUM.num_args) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
? gen_rtx(REG, (MODE), \
((CUM).num_args + 16 \
+ ((TARGET_FPREGS \
&& (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
* 32))) \
? gen_rtx_REG ((MODE), \
((CUM).num_args + 16 \
+ ((TARGET_FPREGS \
&& (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
|| GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
* 32))) \
: 0))
#undef FUNCTION_ARG_ADVANCE
@ -242,7 +242,7 @@ extern struct rtx_def *alpha_arg_info_reg_val ();
{ \
if (! (NO_RTL)) \
{ \
emit_move_insn (gen_rtx (REG, DImode, 1), \
emit_move_insn (gen_rtx_REG (DImode, 1), \
virtual_incoming_args_rtx); \
emit_insn (gen_arg_home ()); \
} \

2
gcc/config/alpha/x-alpha
View File

@ -1,2 +1,2 @@
CLIB=-lmld
CLIB=-lmld -lexc
EXTRA_HEADERS = $(srcdir)/config/alpha/va_list.h

12
gcc/config/alpha/xm-alpha.h
View File

@ -1,5 +1,5 @@
/* Configuration for GNU C-compiler for DEC Alpha.
Copyright (C) 1990, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
Copyright (C) 1990, 92, 93, 94, 95, 1998 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
This file is part of GNU CC.
@ -61,16 +61,6 @@ extern void *alloca ();
#define ONLY_INT_FIELDS
#endif
/* Declare some functions needed for this machine. We don't want to
include these in the sources since other machines might define them
differently. */
extern void *malloc (), *realloc (), *calloc ();
#ifndef inhibit_libc
#include "string.h"
#endif
/* OSF/1 is POSIX.1 compliant. */
#define POSIX

19
gcc/config/arc/arc.c
View File

@ -1,5 +1,5 @@
/* Subroutines used for code generation on the Argonaut ARC cpu.
Copyright (C) 1994, 1995, 1997, 1999 Free Software Foundation, Inc.
Copyright (C) 1994, 1995, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -20,8 +20,8 @@ Boston, MA 02111-1307, USA. */
/* ??? This is an old port, and is undoubtedly suffering from bit rot. */
#include <stdio.h>
#include "config.h"
#include "system.h"
#include "tree.h"
#include "rtl.h"
#include "regs.h"
@ -707,10 +707,10 @@ gen_compare_reg (code, x, y)
enum machine_mode mode = SELECT_CC_MODE (code, x, y);
rtx cc_reg;
cc_reg = gen_rtx (REG, mode, 61);
cc_reg = gen_rtx_REG (mode, 61);
emit_insn (gen_rtx (SET, VOIDmode, cc_reg,
gen_rtx (COMPARE, mode, x, y)));
emit_insn (gen_rtx_SET (VOIDmode, cc_reg,
gen_rtx_COMPARE (mode, x, y)));
return cc_reg;
}
@ -786,12 +786,11 @@ arc_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
int align_slop = size & 1;
rtx regblock;
regblock = gen_rtx (MEM, BLKmode,
plus_constant (arg_pointer_rtx,
FIRST_PARM_OFFSET (0)
+ align_slop * UNITS_PER_WORD));
regblock = gen_rtx_MEM (BLKmode,
plus_constant (arg_pointer_rtx,
FIRST_PARM_OFFSET (0)
+ align_slop * UNITS_PER_WORD));
MEM_ALIAS_SET (regblock) = get_varargs_alias_set ();
move_block_from_reg (first_reg_offset, regblock,
MAX_ARC_PARM_REGS - first_reg_offset,
((MAX_ARC_PARM_REGS - first_reg_offset)

22
gcc/config/arc/arc.h
View File

@ -601,10 +601,12 @@ extern enum reg_class arc_regno_reg_class[];
farther back is at [%fp,4]. */
#if 0 /* The default value should work. */
#define RETURN_ADDR_RTX(COUNT, FRAME) \
(((COUNT) == -1) \
? gen_rtx (REG, Pmode, 31) \
: copy_to_reg (gen_rtx (MEM, Pmode, \
memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD)))))
(((COUNT) == -1) \
? gen_rtx_REG (Pmode, 31) \
: copy_to_reg (gen_rtx_MEM (Pmode, \
memory_address (Pmode, \
plus_constant ((FRAME), \
UNITS_PER_WORD)))))
#endif
/* Register to use for pushing function arguments. */
@ -722,7 +724,7 @@ extern enum reg_class arc_regno_reg_class[];
and the rest are pushed. */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
(PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \
? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
: 0)
/* A C expression for the number of words, at the beginning of an
@ -812,11 +814,11 @@ arc_setup_incoming_varargs(&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
VALTYPE is the data type of the value (as a tree).
If the precise function being called is known, FUNC is its FUNCTION_DECL;
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
/* 1 if N is a possible register number for a function value
as seen by the caller. */
@ -909,9 +911,9 @@ do { \
CXT is an RTX for the static chain value for the function. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
do { \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), CXT); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), FNADDR); \
emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), FNADDR); \
emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \
} while (0)
/* Library calls. */

76
gcc/config/arc/arc.md
View File

@ -1,5 +1,5 @@
;; Machine description of the Argonaut ARC cpu for GNU C compiler
;; Copyright (C) 1994, 1997, 1999 Free Software Foundation, Inc.
;; Copyright (C) 1994, 1997, 1998, 1999 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -304,7 +304,7 @@
;{
; /* Flow doesn't understand that this is effectively a DFmode move.
; It doesn't know that all of `operands[0]' is set. */
; emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0]));
; emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0]));
;
; /* Emit insns that movsi_insn can handle. */
; emit_insn (gen_movsi (operand_subword (operands[0], 0, 0, DImode),
@ -407,7 +407,7 @@
;{
; /* Flow doesn't understand that this is effectively a DFmode move.
; It doesn't know that all of `operands[0]' is set. */
; emit_insn (gen_rtx (CLOBBER, VOIDmode, operands[0]));
; emit_insn (gen_rtx_CLOBBER (VOIDmode, operands[0]));
;
; /* Emit insns that movsi_insn can handle. */
; emit_insn (gen_movsi (operand_subword (operands[0], 0, 0, DFmode),
@ -586,9 +586,9 @@
"
{
enum rtx_code code = GET_CODE (operands[1]);
rtx ccreg = gen_rtx (REG,
SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
61);
rtx ccreg
= gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
61);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
}")
@ -602,14 +602,14 @@
; "
;{
; enum rtx_code code = GET_CODE (operands[1]);
; rtx ccreg = gen_rtx (REG,
; SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
; 61);
; rtx ccreg
; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
; 61);
;
; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
;}")
}")
(define_expand "movsfcc"
[(set (match_operand:SF 0 "register_operand" "")
(if_then_else (match_operand 1 "comparison_operator" "")
(match_operand:SF 2 "nonmemory_operand" "")
@ -618,9 +618,9 @@
"
{
enum rtx_code code = GET_CODE (operands[1]);
rtx ccreg = gen_rtx (REG,
SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
61);
rtx ccreg
= gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
61);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
}")
@ -633,13 +633,13 @@
; "0 /* ??? can generate less efficient code if constants involved */"
; "
;{
; enum rtx_code code = GET_CODE (operands[1]);
; rtx ccreg = gen_rtx (REG,
; SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
; 61);
; enum rtx_code code = GET_CODE (operands[1]);
; rtx ccreg
; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
; 61);
;
; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
;}")
}")
(define_insn "*movsicc_insn"
[(set (match_operand:SI 0 "register_operand" "=r")
@ -1060,12 +1060,14 @@
{
if (! TARGET_SHIFTER)
{
emit_insn (gen_rtx
(PARALLEL, VOIDmode,
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (ASHIFT, SImode, operands[1], operands[2])),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_ASHIFT (SImode, operands[1],
operands[2])),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (SImode)))));
DONE;
}
}")
@ -1079,12 +1081,15 @@
{
if (! TARGET_SHIFTER)
{
emit_insn (gen_rtx
(PARALLEL, VOIDmode,
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (ASHIFTRT, SImode, operands[1], operands[2])),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_ASHIFTRT (SImode,
operands[1],
operands[2])),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (SImode)))));
DONE;
}
}")
@ -1098,12 +1103,15 @@
{
if (! TARGET_SHIFTER)
{
emit_insn (gen_rtx
(PARALLEL, VOIDmode,
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (LSHIFTRT, SImode, operands[1], operands[2])),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, SImode, 0)))));
gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_LSHIFTRT (SImode,
operands[1],
operands[2])),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (SImode)))));
DONE;
}
}")

32
gcc/config/clipper/clipper.c
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Clipper
Copyright (C) 1987, 1988, 1991, 1997, 1999 Free Software Foundation, Inc.
Copyright (C) 1987, 88, 91, 97, 98, 1999 Free Software Foundation, Inc.
Contributed by Holger Teutsch (holger@hotbso.rhein-main.de)
This file is part of GNU CC.
@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -43,16 +43,14 @@ extern int frame_pointer_needed;
static int frame_size;
/*
* compute size of a clipper stack frame where 'lsize' is the required
* space for local variables.
*/
/* Compute size of a clipper stack frame where 'lsize' is the required
space for local variables. */
int
clipper_frame_size (lsize)
int lsize;
{
int i,size; /* total size of frame */
int i, size; /* total size of frame */
int save_size;
save_size = 0; /* compute size for reg saves */
@ -70,17 +68,15 @@ clipper_frame_size (lsize)
return size;
}
/*
* prologue and epilogue output
* function is entered with pc pushed, i.e. stack is 32 bit aligned
*
* current_function_args_size == 0 means that the current function's args
* are passed totally in registers i.e fp is not used as ap.
* If frame_size is also 0 the current function does not push anything and
* can run with misaligned stack -> subq $4,sp / add $4,sp on entry and exit
* can be omitted.
*
*/
/* Prologue and epilogue output
Function is entered with pc pushed, i.e. stack is 32 bit aligned
current_function_args_size == 0 means that the current function's args
are passed totally in registers i.e fp is not used as ap.
If frame_size is also 0 the current function does not push anything and
can run with misaligned stack -> subq $4,sp / add $4,sp on entry and exit
can be omitted. */
void
output_function_prologue (file, lsize)
FILE *file;

19
gcc/config/clipper/clipper.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Clipper version.
Copyright (C) 1987, 88, 91, 93-96, 1999 Free Software Foundation, Inc.
Copyright (C) 1987, 88, 91, 93-96, 1998, 1999 Free Software Foundation, Inc.
Contributed by Holger Teutsch (holger@hotbso.rhein-main.de)
This file is part of GNU CC.
@ -393,15 +393,15 @@ enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES};
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
TYPE_MODE (VALTYPE) == DFmode) ? \
16 : 0))
gen_rtx_REG (TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode ||\
TYPE_MODE (VALTYPE) == DFmode) ? \
16 : 0))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, (MODE), ((MODE) == SFmode || (MODE) == DFmode ? 16 : 0))
gen_rtx_REG ((MODE), ((MODE) == SFmode || (MODE) == DFmode ? 16 : 0))
/* 1 if N is a possible register number for a function value
@ -527,8 +527,9 @@ do \
&& (GET_MODE_SIZE (MODE) <= 8) \
&& ((TYPE) == NULL || !AGGREGATE_TYPE_P(TYPE)) \
&& ((MODE) != DImode || (CUM).num == 0)) \
? gen_rtx (REG, (MODE), \
GET_MODE_CLASS(MODE) == MODE_FLOAT ? (CUM).num+16 : (CUM).num) \
? gen_rtx_REG ((MODE), \
GET_MODE_CLASS(MODE) == MODE_FLOAT \
? (CUM).num+16 : (CUM).num) \
: 0)
/* If defined, a C expression that gives the alignment boundary, in bits,
@ -633,8 +634,8 @@ do \
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 24)), CXT); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 28)), FNADDR); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 24)), CXT); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 28)), FNADDR); \
}
/* Addressing modes, and classification of registers for them. */

37
gcc/config/clipper/clipper.md
View File

@ -1,5 +1,6 @@
;;- Machine description for GNU compiler, Clipper Version
;; Copyright (C) 1987, 88, 91, 93, 94, 1997 Free Software Foundation, Inc.
;; Copyright (C) 1987, 88, 91, 93, 94, 97, 98, 1999
;; Free Software Foundation, Inc.
;; Contributed by Holger Teutsch (holger@hotbso.rhein-main.de)
;; This file is part of GNU CC.
@ -178,7 +179,7 @@
{
rtx xops[4];
xops[0] = operands[0];
xops[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
xops[2] = operands[1];
xops[3] = adj_offsettable_operand (operands[1], 4);
output_asm_insn (\"loadw %2,%0\;loadw %3,%1\", xops);
@ -189,9 +190,9 @@
{
rtx xops[4];
xops[0] = operands[0];
xops[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
xops[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
xops[2] = operands[1];
xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"movw %2,%0\;movw %3,%1\", xops);
return \"\";
}
@ -215,7 +216,7 @@
xops[0] = operands[0]; /* r -> o */
xops[1] = adj_offsettable_operand (operands[0], 4);
xops[2] = operands[1];
xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops);
return \"\";
}"
@ -317,12 +318,12 @@
{
rtx xoperands[2],yoperands[2];
xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
if (which_alternative == 0) /* r -> r */
{
output_asm_insn (\"movw %1,%0\", operands);
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"movw %1,%0\", xoperands);
return \"\";
}
@ -366,7 +367,7 @@
xops[0] = operands[0];
xops[1] = adj_offsettable_operand (operands[0], 4);
xops[2] = operands[1];
xops[3] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xops[3] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"storw %2,%0\;storw %3,%1\", xops);
return \"\";
}"
@ -696,9 +697,9 @@
rtx xoperands[4];
xoperands[0] = operands[0];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
xoperands[2] = operands[2];
xoperands[3] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1);
xoperands[3] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
output_asm_insn (\"addw %2,%0\;addwc %3,%1\", xoperands);
return \"\";
}"
@ -767,9 +768,9 @@
rtx xoperands[4];
xoperands[0] = operands[0];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
xoperands[2] = operands[2];
xoperands[3] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1);
xoperands[3] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
output_asm_insn (\"subw %2,%0\;subwc %3,%1\", xoperands);
return \"\";
}"
@ -991,7 +992,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1018,7 +1019,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1088,7 +1089,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1115,7 +1116,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1146,7 +1147,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1173,7 +1174,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""

10
gcc/config/convex/convex.c
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Convex.
Copyright (C) 1988, 1993, 1994, 1997 Free Software Foundation, Inc.
Copyright (C) 1988, 93, 94, 97, 98, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -19,7 +19,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "tree.h"
#include "rtl.h"
#include "regs.h"
@ -360,8 +360,8 @@ expand_movstr (operands)
dest = change_address (dest, mode, 0);
/* Make load and store patterns for this piece */
load = gen_rtx (SET, VOIDmode, reg, src);
store = gen_rtx (SET, VOIDmode, dest, reg);
load = gen_rtx_SET (VOIDmode, reg, src);
store = gen_rtx_SET (VOIDmode, dest, reg);
/* Emit the load and the store from last time.
When we emit a store, we can reuse its temp reg. */
@ -398,7 +398,7 @@ static void
expand_movstr_call (operands)
rtx *operands;
{
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0,
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0,
VOIDmode, 3,
XEXP (operands[0], 0), Pmode,
XEXP (operands[1], 0), Pmode,

10
gcc/config/convex/convex.md
View File

@ -1,5 +1,5 @@
;;- Machine description for GNU compiler, Convex Version
;; Copyright (C) 1988, 1994, 1995 Free Software Foundation, Inc.
;; Copyright (C) 1988, 1994, 1995, 1998, 1999 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -1518,7 +1518,7 @@
}
else
{
output_cmp (gen_rtx (REG, SImode, 7), constm1_rtx, 'W');
output_cmp (gen_rtx_REG (SImode, 7), constm1_rtx, 'W');
return \"psh.w s7\;ld.w %0,s7\;add.w #-1,s7\;st.w s7,%0\;pop.w s7\";
}
}")
@ -1540,7 +1540,7 @@
}
else
{
output_cmp (gen_rtx (REG, SImode, 7), const0_rtx, 'W');
output_cmp (gen_rtx_REG (SImode, 7), const0_rtx, 'W');
return \"psh.w s7\;ld.w %0,s7\;add.w #-1,s7\;st.w s7,%0\;pop.w s7\";
}
}")
@ -1561,7 +1561,7 @@
}
else
{
output_cmp (gen_rtx (REG, HImode, 7), constm1_rtx, 'H');
output_cmp (gen_rtx_REG (HImode, 7), constm1_rtx, 'H');
return \"psh.w s7\;ld.h %0,s7\;add.h #-1,s7\;st.h s7,%0\;pop.w s7\";
}
}")
@ -1583,7 +1583,7 @@
}
else
{
output_cmp (gen_rtx (REG, HImode, 7), const0_rtx, 'H');
output_cmp (gen_rtx_REG (HImode, 7), const0_rtx, 'H');
return \"psh.w s7\;ld.h %0,s7\;add.h #-1,s7\;st.h s7,%0\;pop.w s7\";
}
}")

122
gcc/config/dsp16xx/dsp16xx.c
View File

@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */
/* Some output-actions in dsp1600.md need these. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -1795,10 +1795,11 @@ enum machine_mode mode;
quotient = shift_amount/16;
shift_amount = shift_amount - (quotient * 16);
for (i = 0; i < quotient; i++)
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (shift_op, mode,
first_shift_emitted ? operands[0] : operands[1],
GEN_INT (16))));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (shift_op, mode,
first_shift_emitted
? operands[0] : operands[1],
GEN_INT (16))));
first_shift_emitted = 1;
}
else if (shift_amount/8)
@ -1806,10 +1807,11 @@ enum machine_mode mode;
quotient = shift_amount/8;
shift_amount = shift_amount - (quotient * 8);
for (i = 0; i < quotient; i++)
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (shift_op, mode,
first_shift_emitted ? operands[0] : operands[1],
GEN_INT (8))));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (shift_op, mode,
first_shift_emitted
? operands[0] : operands[1],
GEN_INT (8))));
first_shift_emitted = 1;
}
else if (shift_amount/4)
@ -1817,10 +1819,11 @@ enum machine_mode mode;
quotient = shift_amount/4;
shift_amount = shift_amount - (quotient * 4);
for (i = 0; i < quotient; i++)
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (shift_op, mode,
first_shift_emitted ? operands[0] : operands[1],
GEN_INT (4))));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (shift_op, mode,
first_shift_emitted
? operands[0] : operands[1],
GEN_INT (4))));
first_shift_emitted = 1;
}
else if (shift_amount/1)
@ -1828,10 +1831,11 @@ enum machine_mode mode;
quotient = shift_amount/1;
shift_amount = shift_amount - (quotient * 1);
for (i = 0; i < quotient; i++)
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (shift_op, mode,
first_shift_emitted ? operands[0] : operands[1],
GEN_INT (1))));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (shift_op, mode,
first_shift_emitted
? operands[0] : operands[1],
GEN_INT (1))));
first_shift_emitted = 1;
}
}
@ -2085,7 +2089,7 @@ dsp16xx_function_arg (args_so_far, mode, type, named)
args_so_far++;
if (named && args_so_far < 4 && !MUST_PASS_IN_STACK (mode,type))
return gen_rtx (REG, mode, args_so_far + FIRST_REG_FOR_FUNCTION_ARG);
return gen_rtx_REG (mode, args_so_far + FIRST_REG_FOR_FUNCTION_ARG);
else
return (struct rtx_def *) 0;
}
@ -2135,14 +2139,14 @@ gen_tst_reg (x)
if (mode == QImode)
{
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (2,
gen_rtx (SET, VOIDmode, cc0_rtx, x),
gen_rtx (CLOBBER, VOIDmode,
gen_rtx (SCRATCH, QImode, 0)))));
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, x),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)))));
}
else if (mode == HImode)
emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx, x));
emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, x));
else
fatal ("Invalid mode for gen_tst_reg");
@ -2165,54 +2169,64 @@ gen_compare_reg (code, x, y)
if (mode == QImode)
{
if (code == GTU || code == GEU ||
code == LTU || code == LEU)
if (code == GTU || code == GEU
|| code == LTU || code == LEU)
{
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (3,
gen_rtx (SET, VOIDmode, cc0_rtx,
gen_rtx (COMPARE, mode, x, y)),
gen_rtx (CLOBBER, VOIDmode,
gen_rtx (SCRATCH, QImode, 0)),
gen_rtx (CLOBBER, VOIDmode,
gen_rtx (SCRATCH, QImode, 0)))));
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (3,
gen_rtx_SET (VOIDmode, cc0_rtx,
gen_rtx_COMPARE (mode, x, y)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)))));
}
else
{
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (3,
gen_rtx (SET, VOIDmode, cc0_rtx,
gen_rtx (COMPARE, mode, x, y)),
gen_rtx (CLOBBER, VOIDmode,
gen_rtx (SCRATCH, QImode, 0)),
gen_rtx (CLOBBER, VOIDmode,
gen_rtx (SCRATCH, QImode, 0)))));
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (3, gen_rtx_SET (VOIDmode, cc0_rtx,
gen_rtx_COMPARE (mode, x, y)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)))));
}
}
else if (mode == HImode)
{
if (code == GTU || code == GEU ||
code == LTU || code == LEU)
if (code == GTU || code == GEU
|| code == LTU || code == LEU)
{
#if 1
emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5,
gen_rtx (SET, VOIDmode, cc0_rtx, gen_rtx (COMPARE, VOIDmode, x, y)),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)))));
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (5,
gen_rtx_SET (VOIDmode, cc0_rtx,
gen_rtx_COMPARE (VOIDmode,
x, y)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)))));
#else
if (!dsp16xx_ucmphi2_libcall)
dsp16xx_ucmphi2_libcall = gen_rtx (SYMBOL_REF, Pmode, UCMPHI2_LIBCALL);
dsp16xx_ucmphi2_libcall = gen_rtx_SYMBOL_REF (Pmode, UCMPHI2_LIBCALL);
emit_library_call (dsp16xx_ucmphi2_libcall, 1, HImode, 2,
x, HImode, y, HImode);
emit_insn (gen_tsthi_1 (copy_to_reg(hard_libcall_value (HImode))));
#endif
}
else
emit_insn (gen_rtx (SET, VOIDmode, cc0_rtx,
gen_rtx (COMPARE, VOIDmode, force_reg(HImode, x),
force_reg(HImode,y))));
emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx,
gen_rtx_COMPARE (VOIDmode,
force_reg (HImode, x),
force_reg (HImode,y))));
}
else
fatal ("Invalid mode for integer comparison in gen_compare_reg");

46
gcc/config/dsp16xx/dsp16xx.md
View File

@ -195,8 +195,8 @@
if (GET_CODE(operands[1]) == REG)
{
if (REGNO (operands[1]) == REG_Y ||
REGNO (operands[1]) == REG_PROD)
if (REGNO (operands[1]) == REG_Y
|| REGNO (operands[1]) == REG_PROD)
{
output_asm_insn (\"a1=%1\", operands);
}
@ -1049,11 +1049,13 @@
emit_move_insn (operands[0], addr_reg);
/* Then generate the add insn */
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (PLUS, QImode, operands[0], offset)),
gen_rtx (CLOBBER, VOIDmode, operands[2]))));
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2,
gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_PLUS (QImode, operands[0],
offset)),
gen_rtx_CLOBBER (VOIDmode, operands[2]))));
DONE;
}")
@ -1251,7 +1253,7 @@
"
{
operands[2] = gen_reg_rtx (HImode);
operands[3] = gen_rtx (SUBREG, QImode, operands[2], 1);
operands[3] = gen_rtx_SUBREG (QImode, operands[2], 1);
}")
;;(define_insn "extendqihi2"
@ -1301,7 +1303,7 @@
"
{
operands[2] = gen_reg_rtx (HImode);
operands[3] = gen_rtx (SUBREG, QImode, operands[2], 1);
operands[3] = gen_rtx_SUBREG (QImode, operands[2], 1);
}")
@ -1357,8 +1359,8 @@
emit_jump_insn (gen_bge (label1));
emit_insn (gen_fix_trunchfhi2 (operands[0], operands[1]));
emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx,
gen_rtx (LABEL_REF, VOIDmode, label2)));
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_LABEL_REF (VOIDmode, label2)));
emit_barrier ();
emit_label (label1);
@ -1372,7 +1374,7 @@
/* allow REG_NOTES to be set on last insn (labels don't have enough
fields, and can't be used for REG_NOTES anyway). */
emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx));
emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
DONE;
}
}")
@ -1438,7 +1440,8 @@
#if 0
if (!dsp16xx_ashrhi3_libcall)
dsp16xx_ashrhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, ASHRHI3_LIBCALL);
dsp16xx_ashrhi3_libcall
= gen_rtx_SYMBOL_REF (Pmode, ASHRHI3_LIBCALL);
emit_library_call (dsp16xx_ashrhi3_libcall, 1, HImode, 2,
operands[1], HImode,
@ -1562,7 +1565,8 @@
rtx label2 = gen_label_rtx ();
#if 0
if (!dsp16xx_lshrhi3_libcall)
dsp16xx_lshrhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, LSHRHI3_LIBCALL);
dsp16xx_lshrhi3_libcall
= gen_rtx_SYMBOL_REF (Pmode, LSHRHI3_LIBCALL);
emit_library_call (dsp16xx_lshrhi3_libcall, 1, HImode, 2,
operands[1], HImode,
@ -1704,11 +1708,11 @@
rtx label2 = gen_label_rtx ();
#if 0
if (!dsp16xx_ashlhi3_libcall)
dsp16xx_ashlhi3_libcall = gen_rtx_SYMBOL_REF (Pmode, ASHLHI3_LIBCALL);
dsp16xx_ashlhi3_libcall
= gen_rtx_SYMBOL_REF (Pmode, ASHLHI3_LIBCALL);
emit_library_call (dsp16xx_ashlhi3_libcall, 1, HImode, 2,
operands[1], HImode,
operands[2], QImode);
operands[1], HImode, operands[2], QImode);
emit_move_insn (operands[0], hard_libcall_value(HImode));
DONE;
#else
@ -2028,8 +2032,8 @@
{
if (GET_CODE (operands[0]) == MEM
&& ! call_address_operand (XEXP (operands[0], 0), QImode))
operands[0] = gen_rtx (MEM, GET_MODE (operands[0]),
force_reg (Pmode, XEXP (operands[0], 0)));
operands[0] = gen_rtx_MEM (GET_MODE (operands[0]),
force_reg (Pmode, XEXP (operands[0], 0)));
}")
(define_insn ""
@ -2059,8 +2063,8 @@
{
if (GET_CODE (operands[1]) == MEM
&& ! call_address_operand (XEXP (operands[1], 0), QImode))
operands[1] = gen_rtx (MEM, GET_MODE (operands[1]),
force_reg (Pmode, XEXP (operands[1], 0)));
operands[1] = gen_rtx_MEM (GET_MODE (operands[1]),
force_reg (Pmode, XEXP (operands[1], 0)));
}")
(define_insn ""

6
gcc/config/elxsi/elxsi.c
View File

@ -1,6 +1,6 @@
/* Subroutines for insn-output.c for GNU compiler. Elxsi version.
Copyright (C) 1987, 1992, 1997 Free Software Foundation, Inc
This port, done by Mike Stump <mrs@cygnus.com> in 1988, and is the first
Copyright (C) 1987, 1992, 1998, 1999 Free Software Foundation, Inc
Contributrd by Mike Stump <mrs@cygnus.com> in 1988 and is the first
64 bit port of GNU CC.
Based upon the VAX port.
@ -22,7 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "function.h"

12
gcc/config/elxsi/elxsi.h
View File

@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler. Elxsi version.
Copyright (C) 1987, 1988, 1992, 1995, 1996 Free Software Foundation, Inc.
This port, contributed by Mike Stump <mrs@cygnus.com> in 1988, is the first
Copyright (C) 1987, 88, 92, 95, 96, 1998, 1999 Free Software Foundation, Inc.
Contributed by Mike Stump <mrs@cygnus.com> in 1988. This is the first
64 bit port of GNU CC.
Based upon the VAX port.
@ -319,14 +319,14 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES };
/* On the Vax the return value is in R0 regardless. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
/* On the Vax the return value is in R0 regardless. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
/* Define this if PCC uses the nonreentrant convention for returning
structure and union values. */
@ -481,11 +481,11 @@ enum reg_class { NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES };
else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
{ rtx other_reg = XEXP (ADDR, 1); \
offset = 0; \
regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \
else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
{ rtx other_reg = XEXP (ADDR, 0); \
offset = 0; \
regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \
if (offset >= 0) \
{ int regno; \
extern char call_used_regs[]; \

12
gcc/config/fx80/fx80.c
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Alliant FX computers.
Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc.
Copyright (C) 1989, 1991, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -21,7 +21,7 @@ Boston, MA 02111-1307, USA. */
/* Some output-actions in alliant.md need these. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -153,14 +153,14 @@ output_move_double (operands)
{
operands[0] = XEXP (XEXP (operands[0], 0), 0);
output_asm_insn ("subq%.l %#8,%0", operands);
operands[0] = gen_rtx (MEM, DImode, operands[0]);
operands[0] = gen_rtx_MEM (DImode, operands[0]);
optype0 = OFFSOP;
}
if (optype0 == POPOP && optype1 == PUSHOP)
{
operands[1] = XEXP (XEXP (operands[1], 0), 0);
output_asm_insn ("subq%.l %#8,%1", operands);
operands[1] = gen_rtx (MEM, DImode, operands[1]);
operands[1] = gen_rtx_MEM (DImode, operands[1]);
optype1 = OFFSOP;
}
@ -183,14 +183,14 @@ output_move_double (operands)
operands in OPERANDS to be suitable for the low-numbered word. */
if (optype0 == REGOP)
latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
if (optype1 == REGOP)
latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)

10
gcc/config/fx80/fx80.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Alliant FX version.
Copyright (C) 1989, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
Copyright (C) 1989, 93, 94, 95, 96, 1998, 1999 Free Software Foundation, Inc.
Adapted from m68k.h by Paul Petersen (petersen@uicsrd.csrd.uiuc.edu)
and Joe Weening (weening@gang-of-four.stanford.edu).
@ -453,8 +453,8 @@ extern enum reg_class regno_reg_class[];
#define FUNCTION_VALUE(VALTYPE, FUNC) \
(TREE_CODE (VALTYPE) == REAL_TYPE \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \
: gen_rtx (REG, TYPE_MODE (VALTYPE), 0))
? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
: gen_rtx_REG (TYPE_MODE (VALTYPE), 0))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
@ -467,8 +467,8 @@ extern enum reg_class regno_reg_class[];
#define LIBCALL_VALUE(MODE) \
(((MODE) == DFmode || (MODE) == SFmode) \
? gen_rtx (REG, MODE, 16) \
: gen_rtx (REG, MODE, 0))
? gen_rtx_REG (MODE, 16) \
: gen_rtx_REG (MODE, 0))
/* 1 if N is a possible register number for a function value.
On the Alliant, D0 and FP0 are the only registers thus used.

40
gcc/config/fx80/fx80.md
View File

@ -1,5 +1,5 @@
;;- Machine description for GNU C compiler for Alliant FX systems
;; Copyright (C) 1989, 1994, 1996 Free Software Foundation, Inc.
;; Copyright (C) 1989, 1994, 1996, 1998, 1999 Free Software Foundation, Inc.
;; Adapted from m68k.md by Paul Petersen (petersen@uicsrd.csrd.uiuc.edu)
;; and Joe Weening (weening@gang-of-four.stanford.edu).
@ -415,8 +415,7 @@
{
xoperands[1] = operands[1];
xoperands[2]
= gen_rtx (MEM, QImode,
gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, const1_rtx));
= gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 1));
xoperands[3] = stack_pointer_rtx;
/* Just pushing a byte puts it in the high byte of the halfword. */
/* We must put it in the low half, the second byte. */
@ -428,8 +427,7 @@
xoperands[0] = operands[0];
xoperands[1] = operands[1];
xoperands[2]
= gen_rtx (MEM, QImode,
gen_rtx (PLUS, VOIDmode, stack_pointer_rtx, const1_rtx));
= gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 1));
xoperands[3] = stack_pointer_rtx;
output_asm_insn (\"mov%.w %1,%-\;mov%.b %2,%0\;addq%.w %#2,%3\", xoperands);
return \"\";
@ -537,7 +535,7 @@
if (REG_P (operands[1]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"mov%.l %1,%-\", xoperands);
output_asm_insn (\"mov%.l %1,%-\", operands);
return \"fmove%.d %+,%0\";
@ -549,7 +547,7 @@
if (REG_P (operands[0]))
{
output_asm_insn (\"fmove%.d %1,%-\;mov%.l %+,%0\", operands);
operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return \"mov%.l %+,%0\";
}
return \"fmove%.d %1,%0\";
@ -570,7 +568,7 @@
if (REG_P (operands[1]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"mov%.l %1,%-\", xoperands);
output_asm_insn (\"mov%.l %1,%-\", operands);
return \"fmove%.d %+,%0\";
@ -582,7 +580,7 @@
if (REG_P (operands[0]))
{
output_asm_insn (\"fmove%.d %1,%-\;mov%.l %+,%0\", operands);
operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return \"mov%.l %+,%0\";
}
return \"fmove%.d %1,%0\";
@ -1395,7 +1393,8 @@
operands[1] = GEN_INT (logval);
else
{
operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8));
operands[0]
= adj_offsettable_operand (operands[0], 3 - (logval / 8));
operands[1] = GEN_INT (logval % 8);
}
return \"bset %1,%0\";
@ -1896,10 +1895,8 @@
&& GET_CODE (operands[2]) == CONST_INT)
{
int width = GET_CODE (operands[0]) == REG ? 31 : 7;
return output_btst (operands,
GEN_INT (width - INTVAL (operands[2])),
operands[0],
insn, 1000);
return output_btst (operands, GEN_INT (width - INTVAL (operands[2])),
operands[0], insn, 1000);
/* Pass 1000 as SIGNPOS argument so that btst will
not think we are testing the sign bit for an `and'
and assume that nonzero implies a negative result. */
@ -1922,10 +1919,8 @@
&& GET_CODE (operands[2]) == CONST_INT)
{
int width = GET_CODE (operands[0]) == REG ? 31 : 7;
return output_btst (operands,
GEN_INT (width - INTVAL (operands[2])),
operands[0],
insn, 1000);
return output_btst (operands, GEN_INT (width - INTVAL (operands[2])),
operands[0], insn, 1000);
/* Pass 1000 as SIGNPOS argument so that btst will
not think we are testing the sign bit for an `and'
and assume that nonzero implies a negative result. */
@ -2292,10 +2287,9 @@
table_elt_addr
= memory_address_noforce
(HImode,
gen_rtx (PLUS, Pmode,
gen_rtx (MULT, Pmode, index_diff,
GEN_INT (2)),
gen_rtx (LABEL_REF, VOIDmode, operands[3])));
gen_rtx_PLUS (Pmode,
gen_rtx_MULT (Pmode, index_diff, GEN_INT (2)),
gen_rtx_LABEL_REF (Pmode, operands[3])));
/* Emit the last few insns. */
emit_insn (gen_casesi_2 (gen_reg_rtx (HImode), table_elt_addr, operands[3]));
DONE;
@ -2508,7 +2502,7 @@
; "*
;{
; rtx xoperands[2];
; xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
; xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
; output_asm_insn (\"mov%.l %1,%@\", xoperands);
; output_asm_insn (\"mov%.l %1,%-\", operands);
; return \"fmove%.d %+,%0\";

22
gcc/config/gmicro/gmicro.c
View File

@ -1,9 +1,8 @@
/* Subroutines for insn-output.c for the Gmicro.
Ported by Masanobu Yuhara, Fujitsu Laboratories LTD.
Copyright (C) 1990, 1991, 1997, 1998, 1999 Free Software Foundation, Inc.
Contributed by Masanobu Yuhara, Fujitsu Laboratories LTD.
(yuhara@flab.fujitsu.co.jp)
Copyright (C) 1990, 1991, 1997 Free Software Foundation, Inc.
This file is part of GNU CC.
GNU CC is free software; you can redistribute it and/or modify
@ -24,9 +23,8 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -498,14 +496,14 @@ output_move_double (operands)
{
operands[0] = XEXP (XEXP (operands[0], 0), 0);
output_asm_insn ("sub.w %#8,%0", operands);
operands[0] = gen_rtx (MEM, DImode, operands[0]);
operands[0] = gen_rtx_MEM (DImode, operands[0]);
optype0 = OFFSOP;
}
if (optype0 == POPOP && optype1 == PUSHOP)
{
operands[1] = XEXP (XEXP (operands[1], 0), 0);
output_asm_insn ("sub.w %#8,%1", operands);
operands[1] = gen_rtx (MEM, DImode, operands[1]);
operands[1] = gen_rtx_MEM (DImode, operands[1]);
optype1 = OFFSOP;
}
@ -528,14 +526,14 @@ output_move_double (operands)
operands in OPERANDS to be suitable for the low-numbered word. */
if (optype0 == REGOP)
latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
if (optype1 == REGOP)
latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
@ -633,16 +631,14 @@ output_move_const_double (operands)
else if (GREG_P (operands[0]))
{
rtx xoperands[2];
xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
xoperands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
xoperands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1]));
output_asm_insn ("mov.w %1,%0", xoperands);
operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
return "mov.w %1,%0";
}
else
{
return output_move_double (operands); /* ?????? */
}
return output_move_double (operands); /* ?????? */
}
char *

19
gcc/config/gmicro/gmicro.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Gmicro (TRON) version.
Copyright (C) 1987, 88, 89, 95, 96, 1997 Free Software Foundation, Inc.
Copyright (C) 1987, 88, 89, 95-98, 1999 Free Software Foundation, Inc.
Contributed by Masanobu Yuhara, Fujitsu Laboratories LTD.
(yuhara@flab.fujitsu.co.jp)
@ -477,9 +477,10 @@ extern enum reg_class regno_reg_class[];
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) \
(gen_rtx (REG, (MODE), \
((TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0)))
#define LIBCALL_VALUE(MODE) \
(gen_rtx_REG ((MODE), \
((TARGET_FPU && ((MODE) == SFmode || (MODE) == DFmode)) \
? 16 : 0)))
/* 1 if N is a possible register number for a function value.
@ -546,7 +547,7 @@ extern enum reg_class regno_reg_class[];
It exists only to test register calling conventions. */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0)
/* For an arg passed partly in registers and partly in memory,
this is the number of registers used.
@ -830,25 +831,25 @@ extern enum reg_class regno_reg_class[];
else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 0) == frame_pointer_rtx) \
{ rtx other_reg = XEXP (ADDR, 1); \
offset = 0; \
regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \
else if (GET_CODE (ADDR) == PLUS && XEXP (ADDR, 1) == frame_pointer_rtx) \
{ rtx other_reg = XEXP (ADDR, 0); \
offset = 0; \
regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \
else if (GET_CODE (ADDR) == PLUS \
&& GET_CODE (XEXP (ADDR, 0)) == PLUS \
&& XEXP (XEXP (ADDR, 0), 0) == frame_pointer_rtx \
&& GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
{ rtx other_reg = XEXP (XEXP (ADDR, 0), 1); \
offset = INTVAL (XEXP (ADDR, 1)); \
regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \
else if (GET_CODE (ADDR) == PLUS \
&& GET_CODE (XEXP (ADDR, 0)) == PLUS \
&& XEXP (XEXP (ADDR, 0), 1) == frame_pointer_rtx \
&& GET_CODE (XEXP (ADDR, 1)) == CONST_INT) \
{ rtx other_reg = XEXP (XEXP (ADDR, 0), 0); \
offset = INTVAL (XEXP (ADDR, 1)); \
regs = gen_rtx (PLUS, Pmode, stack_pointer_rtx, other_reg); } \
regs = gen_rtx_PLUS (Pmode, stack_pointer_rtx, other_reg); } \
if (offset >= 0) \
{ int regno; \
extern char call_used_regs[]; \

23
gcc/config/gmicro/gmicro.md
View File

@ -1,5 +1,5 @@
;;- Machine description for GNU compiler, Fujitsu Gmicro Version
;; Copyright (C) 1990, 1994, 1996 Free Software Foundation, Inc.
;; Copyright (C) 1990, 1994, 1996, 1998, 1999 Free Software Foundation, Inc.
;; Contributed by M.Yuhara, Fujitsu Laboratories LTD.
;; This file is part of GNU CC.
@ -581,7 +581,7 @@
if (FPU_REG_P (operands[0]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"mov.w %1,%-\", xoperands);
output_asm_insn (\"mov.w %1,%-\", operands);
return \"fmov.d %+,%0\";
@ -590,7 +590,7 @@
{
output_asm_insn (\"fmov.d %f1,%-\", operands);
output_asm_insn (\"mov.w %+,%0\", operands);
operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return \"mov.w %+,%0\";
}
}
@ -616,7 +616,7 @@
if (REG_P (operands[1]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"mov.w %1,%-\", xoperands);
output_asm_insn (\"mov.w %1,%-\", operands);
return \"fmov.d %+,%0\";
@ -630,7 +630,7 @@
if (REG_P (operands[0]))
{
output_asm_insn (\"fmov.d %f1,%-\;mov.w %+,%0\", operands);
operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return \"mov.w %+,%0\";
}
else
@ -1601,7 +1601,8 @@
}
else
{
operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8));
operands[0]
= adj_offsettable_operand (operands[0], 3 - (logval / 8));
operands[1] = GEN_INT (7 - (logval % 8));
}
return \"bset.b %1,%0\";
@ -1864,7 +1865,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1889,7 +1890,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, HImode, negate_rtx (HImode, operands[2]));
operands[2] = gen_rtx_NEG (HImode, negate_rtx (HImode, operands[2]));
}")
(define_insn ""
@ -1914,7 +1915,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, QImode, negate_rtx (QImode, operands[2]));
operands[2] = gen_rtx_NEG (QImode, negate_rtx (QImode, operands[2]));
}")
(define_insn ""
@ -2270,7 +2271,7 @@
output_asm_insn (\"mov.w %1,%0\", operands);
if (INTVAL (operands[3]) != 0)
output_asm_insn (\"shl.w %3,%0\", operands);
operands[2] = GEN_INT (-(32 - INTVAL (operands[2])));
operands[2] = GEN_INT (- (32 - INTVAL (operands[2])));
return \"shl.w %3,%0\";
}")
@ -2730,7 +2731,7 @@
"*
{
rtx xoperands[2];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"mov.w %1,@sp\", xoperands);
output_asm_insn (\"mov.w %1,%-\", operands);
return \"fmov.d %+,%0\";

50
gcc/config/gofast.h
View File

@ -1,5 +1,5 @@
/* US Software GOFAST floating point library support.
Copyright (C) 1994 Free Software Foundation, Inc.
Copyright (C) 1994, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -44,33 +44,33 @@ Boston, MA 02111-1307, USA. */
} while (0)
#define GOFAST_RENAME_LIBCALLS \
add_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpadd"); \
add_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpadd"); \
sub_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpsub"); \
sub_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpsub"); \
smul_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpmul"); \
smul_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpmul"); \
flodiv_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpdiv"); \
flodiv_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpdiv"); \
cmp_optab->handlers[(int) SFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \
cmp_optab->handlers[(int) DFmode].libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \
add_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpadd"); \
add_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpadd"); \
sub_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpsub"); \
sub_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpsub"); \
smul_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpmul"); \
smul_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpmul"); \
flodiv_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpdiv"); \
flodiv_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpdiv"); \
cmp_optab->handlers[(int) SFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \
cmp_optab->handlers[(int) DFmode].libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \
\
extendsfdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fptodp"); \
truncdfsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dptofp"); \
extendsfdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fptodp"); \
truncdfsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dptofp"); \
\
eqsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \
nesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \
gtsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \
gesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \
ltsf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \
lesf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "fpcmp"); \
eqsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \
nesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \
gtsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \
gesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \
ltsf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \
lesf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "fpcmp"); \
\
eqdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \
nedf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \
gtdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \
gedf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \
ltdf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \
ledf2_libfunc = gen_rtx (SYMBOL_REF, Pmode, "dpcmp"); \
eqdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \
nedf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \
gtdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \
gedf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \
ltdf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \
ledf2_libfunc = gen_rtx_SYMBOL_REF (Pmode, "dpcmp"); \
\
eqxf2_libfunc = NULL_RTX; \
nexf2_libfunc = NULL_RTX; \

40
gcc/config/h8300/h8300.c
View File

@ -22,7 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "tree.h"
#include "regs.h"
@ -41,7 +41,6 @@ Boston, MA 02111-1307, USA. */
/* Forward declarations. */
void print_operand_address ();
char *index ();
static int h8300_interrupt_function_p PROTO ((tree));
static int h8300_monitor_function_p PROTO ((tree));
@ -954,16 +953,16 @@ function_arg (cum, mode, type, named)
switch (cum->nbytes / UNITS_PER_WORD)
{
case 0:
result = gen_rtx (REG, mode, 0);
result = gen_rtx_REG (mode, 0);
break;
case 1:
result = gen_rtx (REG, mode, 1);
result = gen_rtx_REG (mode, 1);
break;
case 2:
result = gen_rtx (REG, mode, 2);
result = gen_rtx_REG (mode, 2);
break;
case 3:
result = gen_rtx (REG, mode, 3);
result = gen_rtx_REG (mode, 3);
break;
default:
result = 0;
@ -1858,12 +1857,14 @@ expand_a_shift (mode, code, operands)
/* need a loop to get all the bits we want - we generate the
code at emit time, but need to allocate a scratch reg now */
emit_insn (gen_rtx
(PARALLEL, VOIDmode,
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (code, mode, operands[0], operands[2])),
gen_rtx (CLOBBER, VOIDmode, gen_rtx (SCRATCH, QImode, 0)))));
gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (code, mode, operands[0],
operands[2])),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)))));
return 1;
}
@ -2791,9 +2792,9 @@ fix_bit_operand (operands, what, type)
/* Ok to have a memory dest. */
if (GET_CODE (operands[0]) == MEM && !EXTRA_CONSTRAINT (operands[0], 'U'))
{
rtx mem;
mem = gen_rtx (MEM, GET_MODE (operands[0]),
copy_to_mode_reg (Pmode, XEXP (operands[0], 0)));
rtx mem = gen_rtx_MEM (GET_MODE (operands[0]),
copy_to_mode_reg (Pmode,
XEXP (operands[0], 0)));
RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (operands[0]);
MEM_COPY_ATTRIBUTES (mem, operands[0]);
operands[0] = mem;
@ -2801,9 +2802,9 @@ fix_bit_operand (operands, what, type)
if (GET_CODE (operands[1]) == MEM && !EXTRA_CONSTRAINT (operands[1], 'U'))
{
rtx mem;
mem = gen_rtx (MEM, GET_MODE (operands[1]),
copy_to_mode_reg (Pmode, XEXP (operands[1], 0)));
rtx mem = gen_rtx_MEM (GET_MODE (operands[1]),
copy_to_mode_reg (Pmode,
XEXP (operands[1], 0)));
RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (operands[1]);
MEM_COPY_ATTRIBUTES (mem, operands[0]);
operands[1] = mem;
@ -2817,8 +2818,9 @@ fix_bit_operand (operands, what, type)
operands[1] = force_reg (QImode, operands[1]);
{
rtx res = gen_reg_rtx (QImode);
emit_insn (gen_rtx (SET, VOIDmode, res, gen_rtx (type, QImode, operands[1], operands[2])));
emit_insn (gen_rtx (SET, VOIDmode, operands[0], res));
emit_insn (gen_rtx_SET (VOIDmode, res,
gen_rtx (type, QImode, operands[1], operands[2])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0], res));
}
return 1;
}

23
gcc/config/h8300/h8300.h
View File

@ -526,7 +526,7 @@ enum reg_class {
On the H8 the return value is in R0/R1. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
@ -534,7 +534,7 @@ enum reg_class {
/* On the h8 the return value is in R0/R1 */
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, MODE, 0)
gen_rtx_REG (MODE, 0)
/* 1 if N is a possible register number for a function value.
On the H8, R0 is the only register thus used. */
@ -713,10 +713,11 @@ struct rtx_def *function_arg();
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
enum machine_mode mode = TARGET_H8300H || TARGET_H8300S? SImode : HImode; \
emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 2)), CXT); \
emit_move_insn (gen_rtx (MEM, mode, plus_constant ((TRAMP), 6)), FNADDR); \
if (TARGET_H8300H || TARGET_H8300S) \
emit_move_insn (gen_rtx (MEM, QImode, plus_constant ((TRAMP), 6)), GEN_INT (0x5A)); \
emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 2)), CXT); \
emit_move_insn (gen_rtx_MEM (mode, plus_constant ((TRAMP), 6)), FNADDR); \
if (TARGET_H8300H || TARGET_H8300S) \
emit_move_insn (gen_rtx_MEM (QImode, plus_constant ((TRAMP), 6)), \
GEN_INT (0x5A)); \
}
/* Addressing modes, and classification of registers for them. */
@ -1387,15 +1388,15 @@ extern int handle_pragma ();
#define INIT_TARGET_OPTABS \
do { \
smul_optab->handlers[(int) HImode].libfunc \
= gen_rtx (SYMBOL_REF, Pmode, MULHI3_LIBCALL); \
= gen_rtx_SYMBOL_REF (Pmode, MULHI3_LIBCALL); \
sdiv_optab->handlers[(int) HImode].libfunc \
= gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); \
= gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL); \
udiv_optab->handlers[(int) HImode].libfunc \
= gen_rtx (SYMBOL_REF, Pmode, UDIVHI3_LIBCALL); \
= gen_rtx_SYMBOL_REF (Pmode, UDIVHI3_LIBCALL); \
smod_optab->handlers[(int) HImode].libfunc \
= gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); \
= gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL); \
umod_optab->handlers[(int) HImode].libfunc \
= gen_rtx (SYMBOL_REF, Pmode, UMODHI3_LIBCALL); \
= gen_rtx_SYMBOL_REF (Pmode, UMODHI3_LIBCALL); \
} while (0)
#define MOVE_RATIO 3

10
gcc/config/i370/i370.c
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for System/370.
Copyright (C) 1989, 1993, 1995, 1997 Free Software Foundation, Inc.
Copyright (C) 1989, 93, 95, 97, 98, 1999 Free Software Foundation, Inc.
Contributed by Jan Stein (jan@cd.chalmers.se).
Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
@ -22,12 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include <string.h>
#include <ctype.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <fcntl.h>
#include "system.h"
#include "rtl.h"
#include "tree.h"
#include "regs.h"
@ -41,7 +36,6 @@ Boston, MA 02111-1307, USA. */
#include "function.h"
#include "flags.h"
#include "recog.h"
#include <time.h>
extern FILE *asm_out_file;

39
gcc/config/i370/i370.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. System/370 version.
Copyright (C) 1989, 1993, 1995, 1996, 1997 Free Software Foundation, Inc.
Copyright (C) 1989, 93, 95, 96, 97, 1998, 1999 Free Software Foundation, Inc.
Contributed by Jan Stein (jan@cd.chalmers.se).
Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
@ -545,7 +545,7 @@ enum reg_class
(((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx(REG, TYPE_MODE (VALTYPE), RET_REG(TYPE_MODE(VALTYPE)))
gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
#define RETURN_IN_MEMORY(VALTYPE) \
((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
@ -553,7 +553,7 @@ enum reg_class
/* Define how to find the value returned by a library function assuming
the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx(REG, MODE, RET_REG(MODE))
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
/* 1 if N is a possible register number for a function value.
On the 370 under C/370, R15 and R16 are thus used. */
@ -585,13 +585,12 @@ enum reg_class
#define TRAMPOLINE_TEMPLATE(FILE) \
{ \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x05E0)); \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x5800 | \
STATIC_CHAIN_REGNUM << 4)); \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00A)); \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x58F0)); \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00E)); \
ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x07FF)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x05E0)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00A)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x58F0)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00E)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x07FF)); \
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
ASM_OUTPUT_SHORT (FILE, const0_rtx); \
@ -606,8 +605,8 @@ enum reg_class
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
}
/* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
@ -792,17 +791,17 @@ enum reg_class
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
{ \
if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
copy_to_mode_reg (SImode, XEXP (X, 1))); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
copy_to_mode_reg (SImode, XEXP (X, 1))); \
if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
copy_to_mode_reg (SImode, XEXP (X, 0))); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
copy_to_mode_reg (SImode, XEXP (X, 0))); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
force_operand (XEXP (X, 0), 0)); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
force_operand (XEXP (X, 0), 0)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
force_operand (XEXP (X, 1), 0)); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
force_operand (XEXP (X, 1), 0)); \
if (memory_address_p (MODE, X)) \
goto WIN; \
}

38
gcc/config/i386/i386.c
View File

@ -1441,11 +1441,11 @@ static rtx
gen_push (arg)
rtx arg;
{
return gen_rtx (SET, VOIDmode,
gen_rtx_MEM (SImode,
gen_rtx (PRE_DEC, SImode,
stack_pointer_rtx)),
arg);
return gen_rtx_SET (VOIDmode,
gen_rtx_MEM (SImode,
gen_rtx_PRE_DEC (SImode,
stack_pointer_rtx)),
arg);
}
/* Compute the size of local storage taking into consideration the
@ -2239,9 +2239,9 @@ legitimize_address (x, oldx, mode)
&& (log = (unsigned)exact_log2 (INTVAL (XEXP (XEXP (x, 0), 1)))) < 4)
{
changed = 1;
XEXP (x, 0) = gen_rtx (MULT, Pmode,
force_reg (Pmode, XEXP (XEXP (x, 0), 0)),
GEN_INT (1 << log));
XEXP (x, 0) = gen_rtx_MULT (Pmode,
force_reg (Pmode, XEXP (XEXP (x, 0), 0)),
GEN_INT (1 << log));
}
if (GET_CODE (XEXP (x, 1)) == ASHIFT
@ -2249,9 +2249,9 @@ legitimize_address (x, oldx, mode)
&& (log = (unsigned)exact_log2 (INTVAL (XEXP (XEXP (x, 1), 1)))) < 4)
{
changed = 1;
XEXP (x, 1) = gen_rtx (MULT, Pmode,
force_reg (Pmode, XEXP (XEXP (x, 1), 0)),
GEN_INT (1 << log));
XEXP (x, 1) = gen_rtx_MULT (Pmode,
force_reg (Pmode, XEXP (XEXP (x, 1), 0)),
GEN_INT (1 << log));
}
/* Put multiply first if it isn't already. */
@ -2270,10 +2270,10 @@ legitimize_address (x, oldx, mode)
if (GET_CODE (XEXP (x, 0)) == MULT && GET_CODE (XEXP (x, 1)) == PLUS)
{
changed = 1;
x = gen_rtx (PLUS, Pmode,
gen_rtx (PLUS, Pmode, XEXP (x, 0),
XEXP (XEXP (x, 1), 0)),
XEXP (XEXP (x, 1), 1));
x = gen_rtx_PLUS (Pmode,
gen_rtx_PLUS (Pmode, XEXP (x, 0),
XEXP (XEXP (x, 1), 0)),
XEXP (XEXP (x, 1), 1));
}
/* Canonicalize
@ -2303,10 +2303,10 @@ legitimize_address (x, oldx, mode)
if (constant)
{
changed = 1;
x = gen_rtx (PLUS, Pmode,
gen_rtx (PLUS, Pmode, XEXP (XEXP (x, 0), 0),
XEXP (XEXP (XEXP (x, 0), 1), 0)),
plus_constant (other, INTVAL (constant)));
x = gen_rtx_PLUS (Pmode,
gen_rtx_PLUS (Pmode, XEXP (XEXP (x, 0), 0),
XEXP (XEXP (XEXP (x, 0), 1), 0)),
plus_constant (other, INTVAL (constant)));
}
}

8
gcc/config/i386/i386.h
View File

@ -1103,7 +1103,7 @@ enum reg_class
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx_REG (TYPE_MODE (VALTYPE), \
VALUE_REGNO (TYPE_MODE (VALTYPE)))
VALUE_REGNO (TYPE_MODE (VALTYPE)))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
@ -2168,12 +2168,12 @@ number as al, and ax.
/* Before the prologue, RA is at 0(%esp). */
#define INCOMING_RETURN_ADDR_RTX \
gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
/* After the prologue, RA is at -4(AP) in the current frame. */
#define RETURN_ADDR_RTX(COUNT, FRAME) \
((COUNT) == 0 \
? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\
: gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -4))\
: gen_rtx_MEM (Pmode, plus_constant (FRAME, 4)))
/* PC is dbx register 8; let's use that column for RA. */
#define DWARF_FRAME_RETURN_COLUMN 8

8
gcc/config/i386/mingw32.h
View File

@ -70,14 +70,6 @@ do { \
char c; \
\
putc ('\"', asm_file); \
if (STRING[1] == ':' \
&& (STRING[2] == '/' || STRING[2] == '\\')) \
{ \
putc ('/', asm_file); \
putc ('/', asm_file); \
putc (*string, asm_file); \
string += 2; \
} \
\
while ((c = *string++) != 0) \
{ \

8
gcc/config/i386/osfrose.h
View File

@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler.
Intel 386 (OSF/1 with OSF/rose) version.
Copyright (C) 1991, 1992, 1993, 1996, 1999 Free Software Foundation, Inc.
Copyright (C) 1991, 92, 93, 96, 98, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -217,8 +217,8 @@ do \
rtx symref; \
\
HALF_PIC_EXTERNAL ("_mcount_ptr"); \
symref = HALF_PIC_PTR (gen_rtx (SYMBOL_REF, Pmode, \
"_mcount_ptr")); \
symref = HALF_PIC_PTR (gen_rtx_SYMBOL_REF (Pmode, \
"_mcount_ptr")); \
\
fprintf (FILE, "\tmovl $%sP%d,%%edx\n", lprefix, labelno); \
fprintf (FILE, "\tmovl %s%s,%%eax\n", prefix, \
@ -290,7 +290,7 @@ do \
rtx symdef; \
\
HALF_PIC_EXTERNAL ("mcount"); \
symdef = HALF_PIC_PTR (gen_rtx (SYMBOL_REF, Pmode, "mcount")); \
symdef = HALF_PIC_PTR (gen_rtx_SYMBOL_REF (Pmode, "mcount")); \
fprintf (FILE, "\tmovl $%sP%d,%%edx\n", lprefix, labelno); \
fprintf (FILE, "\tcall *%s%s\n", prefix, XSTR (symdef, 0)); \
} \

4
gcc/config/i386/win-nt.h
View File

@ -1,6 +1,6 @@
/* Operating system specific defines to be used when targeting GCC for
Windows NT 3.x on an i386.
Copyright (C) 1994, 1995 Free Software Foundation, Inc.
Copyright (C) 1994, 1995, 1998, 1999 Free Software Foundation, Inc.
Contributed by Douglas B. Rupp (drupp@cs.washington.edu).
This file is part of GNU CC.
@ -118,7 +118,7 @@ do \
if (lookup_attribute ("stdcall", \
TYPE_ATTRIBUTES (TREE_TYPE (DECL)))) \
XEXP (DECL_RTL (DECL), 0) = \
gen_rtx (SYMBOL_REF, Pmode, gen_stdcall_suffix (DECL)); \
gen_rtx_SYMBOL_REF (Pmode, gen_stdcall_suffix (DECL)); \
} \
while (0)
#endif

27
gcc/config/i860/i860.c
View File

@ -26,7 +26,7 @@ Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "flags.h"
#include "rtl.h"
#include "tree.h"
@ -522,7 +522,7 @@ singlemove_string (operands)
rtx xoperands[2];
cc_status.flags &= ~CC_F0_IS_0;
xoperands[0] = gen_rtx (REG, SFmode, 32);
xoperands[0] = gen_rtx_REG (SFmode, 32);
xoperands[1] = operands[1];
output_asm_insn (singlemove_string (xoperands), xoperands);
xoperands[1] = xoperands[0];
@ -627,14 +627,14 @@ output_move_double (operands)
operands in OPERANDS to be suitable for the low-numbered word. */
if (optype0 == REGOP)
latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
if (optype1 == REGOP)
latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
@ -693,7 +693,7 @@ output_move_double (operands)
xops[0] = latehalf[0];
xops[1] = operands[0];
output_asm_insn ("adds %1,%0,%1", xops);
operands[1] = gen_rtx (MEM, DImode, operands[0]);
operands[1] = gen_rtx_MEM (DImode, operands[0]);
latehalf[1] = adj_offsettable_operand (operands[1], 4);
addreg1 = 0;
highest_first = 1;
@ -747,7 +747,7 @@ output_fp_move_double (operands)
/* If the source operand is any sort of zero, use f0 instead. */
if (operands[1] == CONST0_RTX (GET_MODE (operands[1])))
operands[1] = gen_rtx (REG, DFmode, F0_REGNUM);
operands[1] = gen_rtx_REG (DFmode, F0_REGNUM);
if (FP_REG_P (operands[0]))
{
@ -756,8 +756,8 @@ output_fp_move_double (operands)
if (GET_CODE (operands[1]) == REG)
{
output_asm_insn ("ixfr %1,%0", operands);
operands[0] = gen_rtx (REG, VOIDmode, REGNO (operands[0]) + 1);
operands[1] = gen_rtx (REG, VOIDmode, REGNO (operands[1]) + 1);
operands[0] = gen_rtx_REG (VOIDmode, REGNO (operands[0]) + 1);
operands[1] = gen_rtx_REG (VOIDmode, REGNO (operands[1]) + 1);
return "ixfr %1,%0";
}
if (operands[1] == CONST0_RTX (DFmode))
@ -782,8 +782,8 @@ output_fp_move_double (operands)
if (GET_CODE (operands[0]) == REG)
{
output_asm_insn ("fxfr %1,%0", operands);
operands[0] = gen_rtx (REG, VOIDmode, REGNO (operands[0]) + 1);
operands[1] = gen_rtx (REG, VOIDmode, REGNO (operands[1]) + 1);
operands[0] = gen_rtx_REG (VOIDmode, REGNO (operands[0]) + 1);
operands[1] = gen_rtx_REG (VOIDmode, REGNO (operands[1]) + 1);
return "fxfr %1,%0";
}
if (CONSTANT_ADDRESS_P (XEXP (operands[0], 0)))
@ -1116,8 +1116,7 @@ output_size_for_block_move (size, reg, align)
output_asm_insn ("sub %2,%1,%0", xoperands);
else
{
xoperands[1]
= GEN_INT (INTVAL (size) - INTVAL (align));
xoperands[1] = GEN_INT (INTVAL (size) - INTVAL (align));
cc_status.flags &= ~ CC_KNOW_HI_R31;
output_asm_insn ("mov %1,%0", xoperands);
}
@ -1432,8 +1431,8 @@ output_delayed_branch (template, operands, insn)
else
{
int insn_code_number;
rtx pat = gen_rtx (SET, VOIDmode, dest, src);
rtx delay_insn = gen_rtx (INSN, VOIDmode, 0, 0, 0, pat, -1, 0, 0);
rtx pat = gen_rtx_SET (VOIDmode, dest, src);
rtx delay_insn = gen_rtx_INSN (VOIDmode, 0, 0, 0, pat, -1, 0, 0);
int i;
/* Output the branch instruction first. */

62
gcc/config/i860/i860.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, for Intel 860.
Copyright (C) 1989, 91, 93, 95, 96, 1997 Free Software Foundation, Inc.
Copyright (C) 1989, 91, 93, 95-98, 1999 Free Software Foundation, Inc.
Hacked substantially by Ron Guilmette (rfg@monkeys.com) to cater to
the whims of the System V Release 4 assembler.
@ -428,17 +428,17 @@ enum reg_class { NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES };
/* On the i860, the value register depends on the mode. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), \
(GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \
? 40 : 16))
gen_rtx_REG (TYPE_MODE (VALTYPE), \
(GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT \
? 40 : 16))
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, MODE, \
(GET_MODE_CLASS ((MODE)) == MODE_FLOAT \
? 40 : 16))
gen_rtx_REG (MODE, \
(GET_MODE_CLASS ((MODE)) == MODE_FLOAT \
? 40 : 16))
/* 1 if N is a possible register number for a function value
as seen by the caller. */
@ -523,17 +523,17 @@ struct cumulative_args { int ints, floats; };
? 0 \
: GET_MODE_CLASS ((MODE)) == MODE_FLOAT || (MODE) == DImode \
? (ROUNDUP ((CUM).floats, GET_MODE_SIZE ((MODE))) < 32 \
? gen_rtx (REG, (MODE), \
40+(ROUNDUP ((CUM).floats, \
GET_MODE_SIZE ((MODE))) \
/ 4)) \
? gen_rtx_REG ((MODE), \
40 + (ROUNDUP ((CUM).floats, \
GET_MODE_SIZE ((MODE))) \
/ 4)) \
: 0) \
: GET_MODE_CLASS ((MODE)) == MODE_INT \
? (ROUNDUP ((CUM).ints, GET_MODE_SIZE ((MODE))) < 48 \
? gen_rtx (REG, (MODE), \
16+(ROUNDUP ((CUM).ints, \
GET_MODE_SIZE ((MODE))) \
/ 4)) \
? gen_rtx_REG ((MODE), \
16 + (ROUNDUP ((CUM).ints, \
GET_MODE_SIZE ((MODE))) \
/ 4)) \
: 0) \
: 0)
@ -660,13 +660,13 @@ struct cumulative_args { int ints, floats; };
size_int (16), 0, 0); \
rtx hi_fn = expand_shift (RSHIFT_EXPR, SImode, fn, \
size_int (16), 0, 0); \
emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 16)), \
emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 16)), \
gen_lowpart (HImode, cxt)); \
emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 4)), \
emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 4)), \
gen_lowpart (HImode, fn)); \
emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 8)), \
emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 8)), \
gen_lowpart (HImode, hi_cxt)); \
emit_move_insn (gen_rtx (MEM, HImode, plus_constant (TRAMP, 0)), \
emit_move_insn (gen_rtx_MEM (HImode, plus_constant (TRAMP, 0)), \
gen_lowpart (HImode, hi_fn)); \
}
@ -819,25 +819,25 @@ struct cumulative_args { int ints, floats; };
#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
{ if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
force_operand (XEXP (X, 0), 0)); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
force_operand (XEXP (X, 0), 0)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
force_operand (XEXP (X, 1), 0)); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
force_operand (XEXP (X, 1), 0)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
force_operand (XEXP (X, 0), 0)); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
force_operand (XEXP (X, 0), 0)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
force_operand (XEXP (X, 1), 0)); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
force_operand (XEXP (X, 1), 0)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) != REG \
&& GET_CODE (XEXP (X, 0)) != CONST_INT) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
copy_to_mode_reg (SImode, XEXP (X, 0))); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
copy_to_mode_reg (SImode, XEXP (X, 0))); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) != REG \
&& GET_CODE (XEXP (X, 1)) != CONST_INT) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
copy_to_mode_reg (SImode, XEXP (X, 1))); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
copy_to_mode_reg (SImode, XEXP (X, 1))); \
if (GET_CODE (x) == SYMBOL_REF) \
(X) = copy_to_reg (X); \
if (GET_CODE (x) == CONST) \

36
gcc/config/i860/i860.md
View File

@ -1,5 +1,5 @@
;;- Machine description for Intel 860 chip for GNU C compiler
;; Copyright (C) 1989, 1990, 1997 Free Software Foundation, Inc.
;; Copyright (C) 1989, 1990, 1997, 1998, 1999 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -1527,7 +1527,7 @@
"*
{
CC_STATUS_PARTIAL_INIT;
operands[2] = GEN_INT ((INTVAL (operands[2]) << INTVAL (operands[1])));
operands[2] = GEN_INT (INTVAL (operands[2]) << INTVAL (operands[1]));
return \"and %2,%0,%?r0\";
}")
@ -1542,7 +1542,7 @@
"*
{
CC_STATUS_PARTIAL_INIT;
operands[2] = GEN_INT ((INTVAL (operands[2]) << INTVAL (operands[1])));
operands[2] = GEN_INT (INTVAL (operands[2]) << INTVAL (operands[1]));
return \"and %2,%0,%?r0\";
}")
@ -1766,14 +1766,15 @@
return \"and %2,%1,%0\";
if ((INTVAL (operands[2]) & 0xffff) == 0)
{
operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16);
operands[2]
= GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16);
return \"andh %2,%1,%0\";
}
xop[0] = operands[0];
xop[1] = operands[1];
xop[2] = GEN_INT (~INTVAL (operands[2]) & 0xffff);
output_asm_insn (\"andnot %2,%1,%0\", xop);
operands[2] = GEN_INT (~(unsigned) INTVAL (operands[2]) >> 16);
operands[2] = GEN_INT (~(unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16);
return \"andnoth %2,%0,%0\";
}")
@ -1791,14 +1792,15 @@
return \"andnot %1,%2,%0\";
if ((INTVAL (operands[1]) & 0xffff) == 0)
{
operands[1] = GEN_INT ((unsigned) INTVAL (operands[1]) >> 16);
operands[1]
= GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[1]) >> 16);
return \"andnoth %1,%2,%0\";
}
xop[0] = operands[0];
xop[1] = GEN_INT ((INTVAL (operands[1]) & 0xffff));
xop[1] = GEN_INT (INTVAL (operands[1]) & 0xffff);
xop[2] = operands[2];
output_asm_insn (\"andnot %1,%2,%0\", xop);
operands[1] = GEN_INT ((unsigned) INTVAL (operands[1]) >> 16);
operands[1] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[1]) >> 16);
return \"andnoth %1,%0,%0\";
}")
@ -1816,14 +1818,15 @@
return \"or %2,%1,%0\";
if ((INTVAL (operands[2]) & 0xffff) == 0)
{
operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16);
operands[2]
= GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16);
return \"orh %2,%1,%0\";
}
xop[0] = operands[0];
xop[1] = operands[1];
xop[2] = GEN_INT ((INTVAL (operands[2]) & 0xffff));
xop[2] = GEN_INT (INTVAL (operands[2]) & 0xffff);
output_asm_insn (\"or %2,%1,%0\", xop);
operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16);
operands[2] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16);
return \"orh %2,%0,%0\";
}")
@ -1841,14 +1844,15 @@
return \"xor %2,%1,%0\";
if ((INTVAL (operands[2]) & 0xffff) == 0)
{
operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16);
operands[2]
= GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16);
return \"xorh %2,%1,%0\";
}
xop[0] = operands[0];
xop[1] = operands[1];
xop[2] = GEN_INT ((INTVAL (operands[2]) & 0xffff));
xop[2] = GEN_INT (INTVAL (operands[2]) & 0xffff);
output_asm_insn (\"xor %2,%1,%0\", xop);
operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16);
operands[2] = GEN_INT ((unsigned HOST_WIDE_INT) INTVAL (operands[2]) >> 16);
return \"xorh %2,%0,%0\";
}")
@ -2121,7 +2125,7 @@ fmul.ss %1,%0,%4\;fmul.ss %3,%4,%0\";
if (INTVAL (operands[1]) > 0)
{
emit_move_insn (arg_pointer_rtx, stack_pointer_rtx);
emit_insn (gen_rtx (USE, VOIDmode, arg_pointer_rtx));
emit_insn (gen_rtx_USE (VOIDmode, arg_pointer_rtx));
}
}")
@ -2189,7 +2193,7 @@ fmul.ss %1,%0,%4\;fmul.ss %3,%4,%0\";
if (INTVAL (operands[2]) > 0)
{
emit_move_insn (arg_pointer_rtx, stack_pointer_rtx);
emit_insn (gen_rtx (USE, VOIDmode, arg_pointer_rtx));
emit_insn (gen_rtx_USE (VOIDmode, arg_pointer_rtx));
}
}")

70
gcc/config/i960/i960.c
View File

@ -23,7 +23,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -507,9 +507,9 @@ gen_compare_reg (code, x, y)
y = force_reg (SImode, y);
}
cc_reg = gen_rtx (REG, ccmode, 36);
emit_insn (gen_rtx (SET, VOIDmode, cc_reg,
gen_rtx (COMPARE, ccmode, x, y)));
cc_reg = gen_rtx_REG (ccmode, 36);
emit_insn (gen_rtx_SET (VOIDmode, cc_reg,
gen_rtx_COMPARE (ccmode, x, y)));
return cc_reg;
}
@ -608,12 +608,12 @@ emit_move_sequence (operands, mode)
&& REGNO (operands[1]) < FIRST_PSEUDO_REGISTER
&& ! HARD_REGNO_MODE_OK (REGNO (operands[1]), mode))
{
emit_insn (gen_rtx (PARALLEL, VOIDmode,
gen_rtvec (2,
gen_rtx (SET, VOIDmode,
operands[0], operands[1]),
gen_rtx (CLOBBER, VOIDmode,
gen_rtx (SCRATCH, Pmode)))));
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2,
gen_rtx_SET (VOIDmode, operands[0], operands[1]),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (Pmode)))));
return 1;
}
@ -664,8 +664,8 @@ i960_output_move_double (dst, src)
edge conditions. */
operands[0] = dst;
operands[1] = src;
operands[2] = gen_rtx (REG, Pmode, REGNO (dst) + 1);
operands[3] = gen_rtx (MEM, word_mode, operands[2]);
operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 1);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
output_asm_insn ("lda %1,%2\n\tld %3,%0\n\tld %4,%D0", operands);
return "";
@ -754,8 +754,8 @@ i960_output_move_quad (dst, src)
edge conditions. */
operands[0] = dst;
operands[1] = src;
operands[2] = gen_rtx (REG, Pmode, REGNO (dst) + 3);
operands[3] = gen_rtx (MEM, word_mode, operands[2]);
operands[2] = gen_rtx_REG (Pmode, REGNO (dst) + 3);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD);
operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD);
@ -844,7 +844,7 @@ i960_output_ldconst (dst, src)
for (i = 0; i < 3; i++)
{
operands[0] = gen_rtx (REG, SImode, REGNO (dst) + i);
operands[0] = gen_rtx_REG (SImode, REGNO (dst) + i);
operands[1] = GEN_INT (value_long[i]);
output_asm_insn (i960_output_ldconst (operands[0], operands[1]),
operands);
@ -863,11 +863,11 @@ i960_output_ldconst (dst, src)
output_asm_insn ("# ldconst %1,%0",operands);
operands[0] = gen_rtx (REG, SImode, REGNO (dst));
operands[0] = gen_rtx_REG (SImode, REGNO (dst));
operands[1] = first;
output_asm_insn (i960_output_ldconst (operands[0], operands[1]),
operands);
operands[0] = gen_rtx (REG, SImode, REGNO (dst) + 1);
operands[0] = gen_rtx_REG (SImode, REGNO (dst) + 1);
operands[1] = second;
output_asm_insn (i960_output_ldconst (operands[0], operands[1]),
operands);
@ -882,7 +882,7 @@ i960_output_ldconst (dst, src)
REAL_VALUE_TO_TARGET_SINGLE (d, value);
output_asm_insn ("# ldconst %1,%0",operands);
operands[0] = gen_rtx (REG, SImode, REGNO (dst));
operands[0] = gen_rtx_REG (SImode, REGNO (dst));
operands[1] = GEN_INT (value);
output_asm_insn (i960_output_ldconst (operands[0], operands[1]),
operands);
@ -918,7 +918,7 @@ i960_output_ldconst (dst, src)
return "movl %1,%0";
/* Output the upper half with a recursive call. */
xoperands[0] = gen_rtx (REG, SImode, REGNO (dst) + 1);
xoperands[0] = gen_rtx_REG (SImode, REGNO (dst) + 1);
xoperands[1] = upperhalf;
output_asm_insn (i960_output_ldconst (xoperands[0], xoperands[1]),
xoperands);
@ -2144,9 +2144,9 @@ legitimize_address (x, oldx, mode)
similar optimizations. */
if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == MULT
&& GET_CODE (XEXP (x, 1)) == PLUS)
x = gen_rtx (PLUS, Pmode,
gen_rtx (PLUS, Pmode, XEXP (x, 0), XEXP (XEXP (x, 1), 0)),
XEXP (XEXP (x, 1), 1));
x = gen_rtx_PLUS (Pmode,
gen_rtx_PLUS (Pmode, XEXP (x, 0), XEXP (XEXP (x, 1), 0)),
XEXP (XEXP (x, 1), 1));
/* Canonicalize (plus (plus (mult (reg) (const)) (plus (reg) (const))) const)
into (plus (plus (mult (reg) (const)) (reg)) (const)). */
@ -2171,10 +2171,10 @@ legitimize_address (x, oldx, mode)
constant = 0;
if (constant)
x = gen_rtx (PLUS, Pmode,
gen_rtx (PLUS, Pmode, XEXP (XEXP (x, 0), 0),
XEXP (XEXP (XEXP (x, 0), 1), 0)),
plus_constant (other, INTVAL (constant)));
x = gen_rtx_PLUS (Pmode,
gen_rtx_PLUS (Pmode, XEXP (XEXP (x, 0), 0),
XEXP (XEXP (XEXP (x, 0), 1), 0)),
plus_constant (other, INTVAL (constant)));
}
return x;
@ -2483,7 +2483,7 @@ i960_function_arg (cum, mode, type, named)
else
{
cum->ca_nregparms = ROUND_PARM (cum->ca_nregparms, align);
ret = gen_rtx (REG, mode, cum->ca_nregparms);
ret = gen_rtx_REG (mode, cum->ca_nregparms);
}
return ret;
@ -2615,17 +2615,17 @@ i960_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
va_start assumes it. */
emit_insn (gen_cmpsi (arg_pointer_rtx, const0_rtx));
emit_jump_insn (gen_bne (label));
emit_insn (gen_rtx (SET, VOIDmode, arg_pointer_rtx,
stack_pointer_rtx));
emit_insn (gen_rtx (SET, VOIDmode, stack_pointer_rtx,
memory_address (SImode,
plus_constant (stack_pointer_rtx,
48))));
emit_insn (gen_rtx_SET (VOIDmode, arg_pointer_rtx,
stack_pointer_rtx));
emit_insn (gen_rtx_SET (VOIDmode, stack_pointer_rtx,
memory_address (SImode,
plus_constant (stack_pointer_rtx,
48))));
emit_label (label);
/* ??? Note that we unnecessarily store one extra register for stdarg
fns. We could optimize this, but it's kept as-is for now. */
regblock = gen_rtx (MEM, BLKmode,
fns. We could optimize this, but it's kept as for now. */
regblock = gen_rtx_MEM (BLKmode,
plus_constant (arg_pointer_rtx,
first_reg * 4));
MEM_ALIAS_SET (regblock) = get_varargs_alias_set ();

10
gcc/config/i960/i960.h
View File

@ -831,7 +831,7 @@ enum reg_class { NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx ((REG), (MODE), 0)
#define LIBCALL_VALUE(MODE) gen_rtx_REG ((MODE), 0)
/* 1 if N is a possible register number for a function value
as seen by the caller.
@ -947,7 +947,7 @@ extern struct rtx_def *i960_function_arg ();
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(TYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (TYPE), 0)
gen_rtx_REG (TYPE_MODE (TYPE), 0)
/* Force aggregates and objects larger than 16 bytes to be returned in memory,
since we only have 4 registers available for return values. */
@ -1583,10 +1583,8 @@ extern struct rtx_def *gen_compare_reg ();
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \
FNADDR); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), \
CXT); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), FNADDR); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
}
/* Generate RTL to flush the register windows so as to make arbitrary frames

30
gcc/config/i960/i960.md
View File

@ -875,7 +875,7 @@
if (which_alternative == 0)
return i960_output_move_double (operands[0], operands[1]);
operands[3] = gen_rtx (MEM, word_mode, operands[2]);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
return \"lda %0,%2\;st %1,%3\;st %D1,%4\";
}"
@ -954,7 +954,7 @@
if (which_alternative == 0)
return i960_output_move_quad (operands[0], operands[1]);
operands[3] = gen_rtx (MEM, word_mode, operands[2]);
operands[3] = gen_rtx_MEM (word_mode, operands[2]);
operands[4] = adj_offsettable_operand (operands[3], UNITS_PER_WORD);
operands[5] = adj_offsettable_operand (operands[4], UNITS_PER_WORD);
operands[6] = adj_offsettable_operand (operands[5], UNITS_PER_WORD);
@ -1266,7 +1266,7 @@
operand0 = SUBREG_REG (operand0);
}
if (GET_MODE (operand0) != SImode)
operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subreg_word);
operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subreg_word);
emit_insn (gen_ashlsi3 (temp, operand1, shift_24));
emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
@ -1387,7 +1387,7 @@
operand0 = SUBREG_REG (operand0);
}
if (GET_MODE (operand0) != SImode)
operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subreg_word);
operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subreg_word);
emit_insn (gen_ashlsi3 (temp, operand1, shift_24));
emit_insn (gen_lshrsi3 (operand0, temp, shift_24));
@ -1470,11 +1470,12 @@
"
{
rtx temp = gen_reg_rtx (DImode);
emit_insn (gen_rtx (SET, VOIDmode, temp,
gen_rtx (UNSIGNED_FIX, DImode,
gen_rtx (FIX, DFmode, operands[1]))));
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (SUBREG, SImode, temp, 0)));
emit_insn (gen_rtx_SET (VOIDmode, temp,
gen_rtx_UNSIGNED_FIX (DImode,
gen_rtx_FIX (DFmode,
operands[1]))));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SUBREG (SImode, temp, 0)));
DONE;
}")
@ -1492,11 +1493,12 @@
"
{
rtx temp = gen_reg_rtx (DImode);
emit_insn (gen_rtx (SET, VOIDmode, temp,
gen_rtx (UNSIGNED_FIX, DImode,
gen_rtx (FIX, SFmode, operands[1]))));
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (SUBREG, SImode, temp, 0)));
emit_insn (gen_rtx_SET (VOIDmode, temp,
gen_rtx_UNSIGNED_FIX (DImode,
gen_rtx_FIX (SFmode,
operands[1]))));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_SUBREG (SImode, temp, 0)));
DONE;
}")

27
gcc/config/m32r/m32r.c
View File

@ -1,5 +1,5 @@
/* Subroutines used for code generation on the Mitsubishi M32R cpu.
Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -938,18 +938,15 @@ m32r_select_cc_mode (op, x, y)
than being susummed into the following branch instruction. */
rtx
gen_compare (int_code, x, y, need_compare)
int int_code;
rtx x;
rtx y;
int need_compare;
gen_compare (code, x, y, need_compare)
enum rtx_code code;
rtx x, y;
int need_compare;
{
enum rtx_code code = (enum rtx_code)int_code;
enum rtx_code compare_code;
enum rtx_code branch_code;
enum machine_mode mode = SELECT_CC_MODE (code, x, y);
rtx cc_reg = gen_rtx (REG, mode, CARRY_REGNUM);
int must_swap = 0;
enum machine_mode mode = SELECT_CC_MODE (code, x, y);
enum rtx_code compare_code, branch_code;
rtx cc_reg = gen_rtx_REG (mode, CARRY_REGNUM);
int swap_p = 0;
switch (code)
{
@ -1336,9 +1333,9 @@ m32r_setup_incoming_varargs (cum, int_mode, type, pretend_size, no_rtl)
int size = M32R_MAX_PARM_REGS - first_reg_offset;
rtx regblock;
regblock = gen_rtx (MEM, BLKmode,
plus_constant (arg_pointer_rtx,
FIRST_PARM_OFFSET (0)));
regblock = gen_rtx_MEM (BLKmode,
plus_constant (arg_pointer_rtx,
FIRST_PARM_OFFSET (0)));
MEM_ALIAS_SET (regblock) = get_varargs_alias_set ();
move_block_from_reg (first_reg_offset, regblock,
size, size * UNITS_PER_WORD);

28
gcc/config/m32r/m32r.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler, Mitsubishi M32R cpu.
Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -706,10 +706,12 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size)
/* The current return address is in r14. */
#if 0 /* The default value should work. */
#define RETURN_ADDR_RTX(COUNT, FRAME) \
(((COUNT) == -1) \
? gen_rtx (REG, Pmode, 14) \
: copy_to_reg (gen_rtx (MEM, Pmode, \
memory_address (Pmode, plus_constant ((FRAME), UNITS_PER_WORD)))))
(((COUNT) == -1) \
? gen_rtx_REG (Pmode, 14) \
: copy_to_reg (gen_rtx_MEM (Pmode, \
memory_address (Pmode, \
plus_constant ((FRAME), \
UNITS_PER_WORD)))))
#endif
/* Register to use for pushing function arguments. */
@ -918,14 +920,14 @@ M32R_STACK_ALIGN (current_function_outgoing_args_size)
and the rest are pushed. */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
(PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \
? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
: 0)
/* ??? Quick hack to try to get varargs working the normal way. */
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
(((! current_function_varargs || (NAMED)) \
&& PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))) \
? gen_rtx (REG, (MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
: 0)
/* A C expression for the number of words, at the beginning of an
@ -1011,11 +1013,11 @@ m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
VALTYPE is the data type of the value (as a tree).
If the precise function being called is known, FUNC is its FUNCTION_DECL;
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
#define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
/* 1 if N is a possible register number for a function value
as seen by the caller. */
@ -1095,13 +1097,13 @@ m32r_output_function_epilogue (FILE, SIZE)
CXT is an RTX for the static chain value for the function. */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
do { \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 0)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \
plus_constant ((CXT), 0xe7000000)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 4)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \
plus_constant ((FNADDR), 0xe6000000)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 8)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \
GEN_INT (0x1fc67000)); \
emit_insn (gen_flush_icache (validize_mem (gen_rtx (MEM, SImode, TRAMP)))); \
emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \
} while (0)
/* Library calls. */

14
gcc/config/m32r/m32r.md
View File

@ -1,5 +1,5 @@
;; Machine description of the Mitsubishi M32R cpu for GNU C compiler
;; Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
;; Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -684,11 +684,11 @@
op0_subword = SUBREG_WORD (operand0);
operand0 = XEXP (operand0, 0);
}
emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1,
op1_subword),
emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1,
op1_subword),
shift_24));
if (GET_MODE (operand0) != SImode)
operand0 = gen_rtx (SUBREG, SImode, operand0, op0_subword);
operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subword);
emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
DONE;
}")
@ -717,8 +717,7 @@
operand1 = XEXP (operand1, 0);
}
emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1,
op1_subword),
emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword),
shift_24));
emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
DONE;
@ -748,8 +747,7 @@
operand1 = XEXP (operand1, 0);
}
emit_insn (gen_ashlsi3 (temp, gen_rtx (SUBREG, SImode, operand1,
op1_subword),
emit_insn (gen_ashlsi3 (temp, gen_rtx_SUBREG (SImode, operand1, op1_subword),
shift_16));
emit_insn (gen_ashrsi3 (operand0, temp, shift_16));
DONE;

16
gcc/config/m68k/a-ux.h
View File

@ -1,5 +1,5 @@
/* Definitions for Motorola 680x0 running A/UX
Copyright (C) 1996, 1998 Free Software Foundation, Inc.
Copyright (C) 1996, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -116,14 +116,14 @@ crt2.o%s "
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \
(TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \
? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
: (POINTER_TYPE_P (VALTYPE) \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \
: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)))
? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \
: gen_rtx_REG (TYPE_MODE (VALTYPE), 0)))
#undef LIBCALL_VALUE
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, (MODE), ((TARGET_68881 && \
gen_rtx_REG ((MODE), ((TARGET_68881 && \
((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0))
/* 1 if N is a possible register number for a function value.
@ -166,9 +166,9 @@ crt2.o%s "
#undef FINALIZE_TRAMPOLINE
#define FINALIZE_TRAMPOLINE(TRAMP) \
emit_library_call(gen_rtx(SYMBOL_REF, Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
plus_constant(TRAMP, TRAMPOLINE_SIZE), Pmode);
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_cache"), \
0, VOIDmode, 2, TRAMP, Pmode, \
plus_constant (TRAMP, TRAMPOLINE_SIZE), Pmode);
/* Clear the instruction cache from `beg' to `end'. This makes an
inline system call to SYS_sysm68k. The arguments are as follows:

6
gcc/config/m68k/crds.h
View File

@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler;
Charles River Data Systems UNiverse/32.
Copyright (C) 1987, 1993, 1994, 1996, 1997 Free Software Foundation, Inc.
Copyright (C) 1987, 93, 94, 96, 97, 1998, 1999 Free Software Foundation, Inc.
Contributed by Gary E. Miller (Gary_Edmunds_Miller@cup.portal.com)
This file is part of GNU CC.
@ -79,7 +79,7 @@ Boston, MA 02111-1307, USA. */
#if 0
#define HAVE_probe 1
#define gen_probe() gen_rtx(ASM_INPUT, VOIDmode, "tstb -2048(sp)\t;probe\n")
#define gen_probe() gen_rtx_ASM_INPUT (VOIDmode, "tstb -2048(sp)\t;probe\n")
#else
#undef NEED_PROBE
#define NEED_PROBE (-2048)
@ -109,7 +109,7 @@ Boston, MA 02111-1307, USA. */
/* unos uses ".comm c.sac" returns &c.sac in d0 */
/* make pointer to c.sac ?
#undef STRUCT_VALUE_REGNUM
#define STRUCT_VALUE gen_rtx(MEM, Pmode, gen_rtx( , , ) )
#define STRUCT_VALUE gen_rtx_MEM (Pmode, gen_rtx( , , ) )
*/
#define BSS_SECTION_ASM_OP ".bss"

4
gcc/config/m68k/isi.h
View File

@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler. ISI 68000/68020 version.
Intended only for use with GAS, and not ISI's assembler, which is buggy
Copyright (C) 1988, 1996 Free Software Foundation, Inc.
Copyright (C) 1988, 1996, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -74,7 +74,7 @@ Boston, MA 02111-1307, USA. */
#define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, (MODE), ((TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0))
gen_rtx_REG ((MODE), ((TARGET_68881 && ((MODE) == SFmode || (MODE) == DFmode)) ? 16 : 0))
/* 1 if N is a possible register number for a function value.
D0 may be used, and F0 as well if -m68881 is specified. */

6
gcc/config/m68k/linux.h
View File

@ -1,6 +1,6 @@
/* Definitions for Motorola 68k running Linux-based GNU systems with
ELF format.
Copyright (C) 1995, 1996, 1997 Free Software Foundation, Inc.
Copyright (C) 1995, 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -298,8 +298,8 @@ do { \
#define LIBCALL_VALUE(MODE) \
((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \
&& TARGET_68881) \
? gen_rtx_REG (MODE, 16) \
: gen_rtx_REG (MODE, 0))
? gen_rtx_REG ((MODE), 16) \
: gen_rtx_REG ((MODE), 0))
/* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is
an operand of a function call. */

9
gcc/config/m68k/lynx.h
View File

@ -1,5 +1,5 @@
/* Definitions for Motorola 680x0 running LynxOS.
Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
Copyright (C) 1993, 94, 95, 96, 98, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -62,9 +62,10 @@ Boston, MA 02111-1307, USA. */
#undef LIBCALL_VALUE
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, (MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \
gen_rtx_REG ((MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode \
|| (MODE) == XFmode)) \
? 16 : 0))
#undef FUNCTION_VALUE_REGNO_P

6
gcc/config/m68k/m68k.c
View File

@ -18,8 +18,6 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Some output-actions in m68k.md need these. */
#include "config.h"
#include "system.h"
#include "tree.h"
@ -2147,7 +2145,7 @@ output_addsi3 (operands)
if (INTVAL (operands[2]) < 0
&& INTVAL (operands[2]) >= -8)
{
operands[2] = GEN_INT (-INTVAL (operands[2]));
operands[2] = GEN_INT (- INTVAL (operands[2]));
return "subq%.l %2,%0";
}
/* On the CPU32 it is faster to use two addql instructions to
@ -2164,7 +2162,7 @@ output_addsi3 (operands)
if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16)
{
operands[2] = GEN_INT (-INTVAL (operands[2]) - 8);
operands[2] = GEN_INT (- INTVAL (operands[2]) - 8);
return "subq%.l %#8,%0\n\tsubq%.l %2,%0";
}
}

160
gcc/config/m68k/m68k.md
View File

@ -1504,7 +1504,7 @@
"*
{
CC_STATUS_INIT;
operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return \"moveq %#0,%0\;moveq %#0,%2\;move%.b %1,%2\";
}")
@ -1515,7 +1515,7 @@
"*
{
CC_STATUS_INIT;
operands[2] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return \"moveq %#0,%0\;moveq %#0,%2\;move%.w %1,%2\";
}")
@ -2197,32 +2197,33 @@
return \"add%.l %R2,%R0\;addx%.l %2,%0\";
else if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == POST_INC)
{
return \"move%.l %2,%3\;add%.l %2,%R0\;addx%.l %3,%0\";
}
return \"move%.l %2,%3\;add%.l %2,%R0\;addx%.l %3,%0\";
else
{
rtx high, low;
rtx xoperands[2];
if (GET_CODE (operands[2]) == REG)
operands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
else if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
}
else if (GET_CODE (operands[2]) == CONST_INT)
{
operands[1] = operands[2];
operands[2] = INTVAL (operands[2]) < 0 ? constm1_rtx : const0_rtx;
low = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
high = operands[2];
}
else if (CONSTANT_P (operands[2]))
split_double (operands[2], &high, &low);
else
operands[1] = adj_offsettable_operand (operands[2], 4);
{
low = adj_offsettable_operand (operands[2], 4);
high = operands[2];
}
operands[1] = low, operands[2] = high;
xoperands[0] = operands[3];
if (GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0)
xoperands[1] = GEN_INT (-INTVAL (operands[2]) - 1);
else
xoperands[1] = operands[2];
output_asm_insn (output_move_simode (xoperands), xoperands);
if (GET_CODE (operands[1]) == CONST_INT)
{
@ -2255,10 +2256,8 @@
CC_STATUS_INIT;
if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
{
operands[1]
= gen_rtx_MEM (SImode,
gen_rtx_PLUS (VOIDmode, XEXP(operands[0], 0),
GEN_INT (-8)));
operands[1] = gen_rtx_MEM (SImode,
plus_constant (XEXP(operands[0], 0), -8));
return \"move%.l %0,%3\;add%.l %R2,%0\;addx%.l %2,%3\;move%.l %3,%1\";
}
else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
@ -2368,7 +2367,7 @@
if (INTVAL (operands[2]) < 0
&& INTVAL (operands[2]) >= -8)
{
operands[2] = GEN_INT (-INTVAL (operands[2]));
operands[2] = GEN_INT (- INTVAL (operands[2]));
return \"subq%.w %2,%0\";
}
/* On the CPU32 it is faster to use two addqw instructions to
@ -2385,7 +2384,7 @@
if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16)
{
operands[2] = GEN_INT (-INTVAL (operands[2]) - 8);
operands[2] = GEN_INT (- INTVAL (operands[2]) - 8);
return \"subq%.w %#8,%0\;subq%.w %2,%0\";
}
}
@ -2430,7 +2429,7 @@
if (INTVAL (operands[1]) < 0
&& INTVAL (operands[1]) >= -8)
{
operands[1] = GEN_INT (-INTVAL (operands[1]));
operands[1] = GEN_INT (- INTVAL (operands[1]));
return \"subq%.w %1,%0\";
}
/* On the CPU32 it is faster to use two addqw instructions to
@ -2447,7 +2446,7 @@
if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16)
{
operands[1] = GEN_INT (-INTVAL (operands[1]) - 8);
operands[1] = GEN_INT (- INTVAL (operands[1]) - 8);
return \"subq%.w %#8,%0\;subq%.w %1,%0\";
}
}
@ -2486,7 +2485,7 @@
if (INTVAL (operands[1]) < 0
&& INTVAL (operands[1]) >= -8)
{
operands[1] = GEN_INT (-INTVAL (operands[1]));
operands[1] = GEN_INT (- INTVAL (operands[1]));
return \"subq%.w %1,%0\";
}
/* On the CPU32 it is faster to use two addqw instructions to
@ -2503,7 +2502,7 @@
if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16)
{
operands[1] = GEN_INT (-INTVAL (operands[1]) - 8);
operands[1] = GEN_INT (- INTVAL (operands[1]) - 8);
return \"subq%.w %#8,%0\;subq%.w %1,%0\";
}
}
@ -2536,7 +2535,7 @@
return \"addq%.b %2,%0\";
if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8)
{
operands[2] = GEN_INT (-INTVAL (operands[2]));
operands[2] = GEN_INT (- INTVAL (operands[2]));
return \"subq%.b %2,%0\";
}
}
@ -2562,7 +2561,7 @@
return \"addq%.b %1,%0\";
if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8)
{
operands[1] = GEN_INT (-INTVAL (operands[1]));
operands[1] = GEN_INT (- INTVAL (operands[1]));
return \"subq%.b %1,%0\";
}
}
@ -2588,7 +2587,7 @@
return \"addq%.b %1,%0\";
if (INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -8)
{
operands[1] = GEN_INT (-INTVAL (operands[1]));
operands[1] = GEN_INT (- INTVAL (operands[1]));
return \"subq%.b %1,%0\";
}
}
@ -2763,27 +2762,30 @@
}
else
{
rtx high, low;
rtx xoperands[2];
if (GET_CODE (operands[2]) == REG)
operands[1] = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
else if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
}
else if (GET_CODE (operands[2]) == CONST_INT)
{
operands[1] = operands[2];
operands[2] = INTVAL (operands[2]) < 0 ? constm1_rtx : const0_rtx;
low = gen_rtx_REG (SImode, REGNO (operands[2]) + 1);
high = operands[2];
}
else if (CONSTANT_P (operands[2]))
split_double (operands[2], &high, &low);
else
operands[1] = adj_offsettable_operand (operands[2], 4);
{
low = adj_offsettable_operand (operands[2], 4);
high = operands[2];
}
operands[1] = low, operands[2] = high;
xoperands[0] = operands[3];
if (GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) >= -8 && INTVAL (operands[1]) < 0)
xoperands[1] = GEN_INT (-INTVAL (operands[2]) - 1);
else
xoperands[1] = operands[2];
output_asm_insn (output_move_simode (xoperands), xoperands);
if (GET_CODE (operands[1]) == CONST_INT)
{
@ -2817,9 +2819,7 @@
if (GET_CODE (XEXP (operands[0], 0)) == POST_INC)
{
operands[1]
= gen_rtx_MEM (SImode,
gen_rtx_PLUS (VOIDmode, XEXP(operands[0], 0),
GEN_INT (-8)));
= gen_rtx_MEM (SImode, plus_constant (XEXP (operands[0], 0), -8));
return \"move%.l %0,%3\;sub%.l %R2,%0\;subx%.l %2,%3\;move%.l %3,%1\";
}
else if (GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)
@ -3641,21 +3641,12 @@
{
CC_STATUS_INIT;
/* We can get CONST_DOUBLE, but also const1_rtx etc. */
if (GET_CODE (operands[2]) == CONST_DOUBLE
|| GET_CODE (operands[2]) == CONST_INT)
if (CONSTANT_P (operands[2]))
{
rtx hi, lo;
if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
lo = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
}
else
{
lo = operands[2];
hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx;
}
split_double (operands[2], &hi, &lo);
switch (INTVAL (hi))
{
case 0 :
@ -3790,7 +3781,7 @@
CC_STATUS_INIT;
if (GET_CODE (operands[0]) == REG)
operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else
operands[0] = adj_offsettable_operand (operands[0], 4);
if (GET_MODE (operands[1]) == SImode)
@ -3814,21 +3805,12 @@
{
CC_STATUS_INIT;
/* We can get CONST_DOUBLE, but also const1_rtx etc. */
if (GET_CODE (operands[2]) == CONST_DOUBLE
|| GET_CODE (operands[2]) == CONST_INT)
if (CONSTANT_P (operands[2]))
{
rtx hi, lo;
if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
lo = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
}
else
{
lo = operands[2];
hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx;
}
split_double (operands[2], &hi, &lo);
switch (INTVAL (hi))
{
case 0 :
@ -4001,21 +3983,13 @@
{
CC_STATUS_INIT;
/* We can get CONST_DOUBLE, but also const1_rtx etc. */
if (GET_CODE (operands[2]) == CONST_DOUBLE
|| GET_CODE (operands[2]) == CONST_INT)
if (CONSTANT_P (operands[2]))
{
rtx hi, lo;
if (GET_CODE (operands[2]) == CONST_DOUBLE)
{
hi = GEN_INT (CONST_DOUBLE_HIGH (operands[2]));
lo = GEN_INT (CONST_DOUBLE_LOW (operands[2]));
}
else
{
lo = operands[2];
hi = INTVAL (lo) < 0 ? constm1_rtx : const0_rtx;
}
split_double (operands[2], &hi, &lo);
switch (INTVAL (hi))
{
case 0 :
@ -4248,7 +4222,7 @@
target = operand_subword_force (operands[0], 0, SFmode);
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, SFmode),
GEN_INT(0x80000000), target, 0, OPTAB_WIDEN);
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
if (result == 0)
abort ();
@ -4299,7 +4273,7 @@
target = operand_subword (operands[0], 0, 1, DFmode);
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, DFmode),
GEN_INT(0x80000000), target, 0, OPTAB_WIDEN);
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
if (result == 0)
abort ();
@ -4382,7 +4356,7 @@
target = operand_subword_force (operands[0], 0, SFmode);
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, SFmode),
GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN);
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
if (result == 0)
abort ();
@ -4428,7 +4402,7 @@
target = operand_subword (operands[0], 0, 1, DFmode);
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, DFmode),
GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN);
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
if (result == 0)
abort ();
@ -5645,8 +5619,7 @@
int width = GET_CODE (operands[0]) == REG ? 31 : 7;
return output_btst (operands,
GEN_INT (width - INTVAL (operands[2])),
operands[0],
insn, 1000);
operands[0], insn, 1000);
/* Pass 1000 as SIGNPOS argument so that btst will
not think we are testing the sign bit for an `and'
and assume that nonzero implies a negative result. */
@ -5670,10 +5643,8 @@
&& GET_CODE (operands[2]) == CONST_INT)
{
int width = GET_CODE (operands[0]) == REG ? 31 : 7;
return output_btst (operands,
GEN_INT (width - INTVAL (operands[2])),
operands[0],
insn, 1000);
return output_btst (operands, GEN_INT (width - INTVAL (operands[2])),
operands[0], insn, 1000);
/* Pass 1000 as SIGNPOS argument so that btst will
not think we are testing the sign bit for an `and'
and assume that nonzero implies a negative result. */
@ -7003,8 +6974,7 @@
"NEED_PROBE"
"*
{
operands[0] = gen_rtx_PLUS (SImode, stack_pointer_rtx,
GEN_INT (NEED_PROBE));
operands[0] = plus_constant (stack_pointer_rtx, NEED_PROBE);
return \"tstl %a0\";
}")
@ -7207,9 +7177,7 @@
xoperands[1] = operands[1];
xoperands[2]
= gen_rtx_MEM (QImode,
gen_rtx_PLUS (VOIDmode, stack_pointer_rtx,
GEN_INT (3)));
= gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 3));
xoperands[3] = stack_pointer_rtx;
if (!TARGET_5200)
output_asm_insn (\"subq%.w %#4,%3\;move%.b %1,%2\", xoperands);
@ -7552,7 +7520,7 @@
if (REG_P (operands[1]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"move%.l %1,%-\", xoperands);
output_asm_insn (\"move%.l %1,%-\", operands);
return \"f%&move%.d %+,%0\";
@ -7784,7 +7752,7 @@
target = operand_subword (operands[0], 0, 1, XFmode);
result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, XFmode),
GEN_INT(0x80000000), target, 0, OPTAB_WIDEN);
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
if (result == 0)
abort ();
@ -7833,7 +7801,7 @@
target = operand_subword (operands[0], 0, 1, XFmode);
result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, XFmode),
GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN);
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
if (result == 0)
abort ();

11
gcc/config/m68k/m68kemb.h
View File

@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler. "embedded" 68XXX.
This is meant to be included after m68k.h.
Copyright (C) 1994, 1995 Free Software Foundation, Inc. */
Copyright (C) 1994, 1995, 1998, 1999 Free Software Foundation, Inc. */
#define PTRDIFF_TYPE "long int"
#define SIZE_TYPE "long unsigned int"
@ -26,10 +26,11 @@
#define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
#undef LIBCALL_VALUE
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, (MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG ((MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode \
|| (MODE) == XFmode)) \
? 16 : 0))
#undef FUNCTION_VALUE_REGNO_P

30
gcc/config/m68k/m68kv4.h
View File

@ -1,5 +1,5 @@
/* Target definitions for GNU compiler for mc680x0 running System V.4
Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
Copyright (C) 1991, 93, 94, 95, 96, 1998, 1999 Free Software Foundation, Inc.
Contributed by Ron Guilmette (rfg@monkeys.com) and
Fred Fish (fnf@cygnus.com).
@ -167,10 +167,10 @@ while (0)
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \
(TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \
? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
: (POINTER_TYPE_P (VALTYPE) \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \
: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)))
? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \
: gen_rtx_REG (TYPE_MODE (VALTYPE), 0)))
/* For compatibility with the large body of existing code which does not
always properly declare external functions returning pointer types, the
@ -195,8 +195,8 @@ do { \
#define LIBCALL_VALUE(MODE) \
((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \
&& TARGET_68881) \
? gen_rtx (REG, (MODE), 16) \
: gen_rtx (REG, (MODE), 0))
? gen_rtx_REG ((MODE), 16) \
: gen_rtx_REG ((MODE), 0))
/* Boundary (in *bits*) on which stack pointer should be aligned.
The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
@ -321,13 +321,13 @@ int switch_table_difference_label_flag;
#undef TRAMPOLINE_TEMPLATE
#define TRAMPOLINE_TEMPLATE(FILE) \
{ \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x227a)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x2f3a)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x4e75)); \
ASM_OUTPUT_INT (FILE, const0_rtx); \
ASM_OUTPUT_INT (FILE, const0_rtx); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x227a)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x2f3a)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \
ASM_OUTPUT_SHORT (FILE, GEN_INT (0x4e75)); \
ASM_OUTPUT_INT (FILE, const0_rtx); \
ASM_OUTPUT_INT (FILE, const0_rtx); \
}
/* Redefine since we are using a different trampoline */
@ -341,6 +341,6 @@ int switch_table_difference_label_flag;
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 10)), CXT); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 14)), FNADDR); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 10)), CXT); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 14)), FNADDR); \
}

25
gcc/config/m68k/mot3300.h
View File

@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler,
SysV68 Motorola 3300 Delta Series.
Copyright (C) 1987, 93, 94, 95, 96, 1997, 1998, 1999 Free Software Foundation, Inc.
Copyright (C) 1987, 93-98, 1999 Free Software Foundation, Inc.
Contributed by Abramo and Roberto Bagnara (bagnara@dipisa.di.unipi.it)
based on Alex Crain's 3B1 definitions.
Maintained by Philippe De Muyter (phdm@info.ucl.ac.be).
@ -298,20 +298,21 @@ dtors_section () \
/* sysV68 (brain damaged) cc convention support. */
#define FUNCTION_VALUE(VALTYPE,FUNC) \
(TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 16) \
? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
: (POINTER_TYPE_P (VALTYPE) \
? gen_rtx (REG, TYPE_MODE (VALTYPE), 8) \
: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)))
? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \
: gen_rtx_REG (TYPE_MODE (VALTYPE), 0)))
/* If TARGET_68881, SF and DF values are returned in fp0 instead of d0. */
/* Is LIBCALL_VALUE never called with a pointer ? */
#undef LIBCALL_VALUE
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, (MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \
? 16 : 0))
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG ((MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode \
|| (MODE) == XFmode)) \
? 16 : 0))
/* 1 if N is a possible register number for a function value.
d0 may be used, and fp0 as well if -msoft-float is not specified. */
@ -772,8 +773,8 @@ do {(CUM).offset = 0;\
#undef FUNCTION_ARG
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
(((CUM).libcall && (CUM).offset == 0) ? gen_rtx(REG, (MODE), 0)\
: (TARGET_REGPARM && (CUM).offset < 8) ? gen_rtx (REG, (MODE), (CUM).offset / 4) : 0)
(((CUM).libcall && (CUM).offset == 0) ? gen_rtx_REG ((MODE), 0)\
: (TARGET_REGPARM && (CUM).offset < 8) ? gen_rtx_REG ((MODE), (CUM).offset / 4) : 0)
#undef FUNCTION_ARG_PARTIAL_NREGS
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
@ -815,5 +816,5 @@ do {(CUM).offset = 0;\
if (!TARGET_68040) \
; \
else \
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "__clear_insn_cache"), \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__clear_insn_cache"), \
0, VOIDmode, 0)

13
gcc/config/m68k/news.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. SONY NEWS-OS 4 version.
Copyright (C) 1987, 89, 93, 94, 96, 1997 Free Software Foundation, Inc.
Copyright (C) 1987, 89, 93, 94, 96-98, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -126,11 +126,12 @@ Boston, MA 02111-1307, USA. */
#define FUNCTION_VALUE(VALTYPE,FUNC) LIBCALL_VALUE (TYPE_MODE (VALTYPE))
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, (MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \
? 16 : 0))
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG ((MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode \
|| (MODE) == XFmode)) \
? 16 : 0))
#define ASM_OUTPUT_ALIGN(FILE,LOG) \
fprintf (FILE, "\t.align %d\n", (LOG))

6
gcc/config/m68k/next.h
View File

@ -1,5 +1,5 @@
/* Target definitions for GNU compiler for mc680x0 running NeXTSTEP
Copyright (C) 1989, 90-94, 96, 1997 Free Software Foundation, Inc.
Copyright (C) 1989, 90-94, 96, 97, 98, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -186,8 +186,8 @@ Boston, MA 02111-1307, USA. */
#undef FINALIZE_TRAMPOLINE
#define FINALIZE_TRAMPOLINE(TRAMP) \
emit_library_call(gen_rtx(SYMBOL_REF, Pmode, "__enable_execute_stack"), \
0, VOIDmode, 1, memory_address(SImode, (TRAMP)), Pmode)
emit_library_call(gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack"), \
0, VOIDmode, 1, memory_address (SImode, (TRAMP)), Pmode)
/* A C expression used to clear the instruction cache from
address BEG to address END. On NeXTSTEP this i a system trap. */

13
gcc/config/m68k/sun3.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Sun 68000/68020 version.
Copyright (C) 1987, 1988, 1993, 1995, 1996 Free Software Foundation, Inc.
Copyright (C) 1987, 88, 93, 95, 96, 98, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -171,11 +171,12 @@ Boston, MA 02111-1307, USA. */
/* This is not a good idea. It prevents interoperation between
files compiled with -m68881 and those compiled with -msoft-float. */
#if 0
#define FUNCTION_VALUEX(MODE) \
gen_rtx (REG, (MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode)) \
? 16 : 0))
#define FUNCTION_VALUEX(MODE) \
gen_rtx_REG ((MODE), \
((TARGET_68881 \
&& ((MODE) == SFmode || (MODE) == DFmode \
|| (MODE) == XFmode)) \
? 16 : 0))
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE,FUNC) FUNCTION_VALUEX (TYPE_MODE (VALTYPE))

164
gcc/config/m88k/m88k.c
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Motorola 88000.
Copyright (C) 1988, 92, 93, 94, 95, 16, 1997, 1999 Free Software
Copyright (C) 1988, 92, 93, 94, 95, 96, 1997, 1998, 1999 Free Software
Foundation, Inc.
Contributed by Michael Tiemann (tiemann@mcc.com)
Currently maintained by (gcc@dg-rtp.dg.com)
@ -22,12 +22,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include <sys/types.h>
#include <time.h>
#include <ctype.h>
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -44,8 +39,6 @@ Boston, MA 02111-1307, USA. */
#include "flags.h"
extern char *version_string;
extern time_t time ();
extern char *ctime ();
extern int flag_traditional;
extern FILE *asm_out_file;
@ -237,7 +230,7 @@ emit_move_sequence (operands, mode, scratch)
|| GET_CODE (operand1) == MEM)
{
/* Run this case quickly. */
emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1));
emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1));
return 1;
}
}
@ -247,7 +240,7 @@ emit_move_sequence (operands, mode, scratch)
|| (operand1 == const0_rtx && GET_MODE_SIZE (mode) <= UNITS_PER_WORD))
{
/* Run this case quickly. */
emit_insn (gen_rtx (SET, VOIDmode, operand0, operand1));
emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1));
return 1;
}
if (! reload_in_progress && ! reload_completed)
@ -269,7 +262,7 @@ emit_move_sequence (operands, mode, scratch)
&& symbolic_address_p (operand1),
operand1, temp, scratch);
if (mode != SImode)
operands[1] = gen_rtx (SUBREG, mode, operands[1], 0);
operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
}
}
@ -316,28 +309,33 @@ legitimize_address (pic, orig, reg, scratch)
temp = ((reload_in_progress || reload_completed)
? reg : gen_reg_rtx (Pmode));
emit_insn (gen_rtx (SET, VOIDmode, temp,
gen_rtx (HIGH, SImode,
gen_rtx (UNSPEC, SImode,
gen_rtvec (1, addr),
0))));
emit_insn (gen_rtx (SET, VOIDmode, temp,
gen_rtx (LO_SUM, SImode, temp,
gen_rtx (UNSPEC, SImode,
gen_rtvec (1, addr),
0))));
emit_insn (gen_rtx_SET
(VOIDmode, temp,
gen_rtx_HIGH (SImode,
gen_rtx_UNSPEC (SImode,
gen_rtvec (1, addr),
0))));
emit_insn (gen_rtx_SET
(VOIDmode, temp,
gen_rtx_LO_SUM (SImode, temp,
gen_rtx_UNSPEC (SImode,
gen_rtvec (1, addr),
0))));
addr = temp;
}
new = gen_rtx (MEM, Pmode,
gen_rtx (PLUS, SImode,
pic_offset_table_rtx, addr));
new = gen_rtx_MEM (Pmode,
gen_rtx_PLUS (SImode,
pic_offset_table_rtx, addr));
current_function_uses_pic_offset_table = 1;
RTX_UNCHANGING_P (new) = 1;
insn = emit_move_insn (reg, new);
/* Put a REG_EQUAL note on this insn, so that it can be optimized
by loop. */
REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, orig,
REG_NOTES (insn));
REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL, orig,
REG_NOTES (insn));
new = reg;
}
else if (GET_CODE (addr) == CONST)
@ -381,7 +379,7 @@ legitimize_address (pic, orig, reg, scratch)
for this address. */
abort ();
}
new = gen_rtx (PLUS, SImode, base, addr);
new = gen_rtx_PLUS (SImode, base, addr);
/* Should we set special REG_NOTEs here? */
}
}
@ -395,15 +393,15 @@ legitimize_address (pic, orig, reg, scratch)
reg = gen_reg_rtx (Pmode);
}
emit_insn (gen_rtx (SET, VOIDmode,
reg, gen_rtx (HIGH, SImode, addr)));
new = gen_rtx (LO_SUM, SImode, reg, addr);
emit_insn (gen_rtx_SET (VOIDmode,
reg, gen_rtx_HIGH (SImode, addr)));
new = gen_rtx_LO_SUM (SImode, reg, addr);
}
if (new != orig
&& GET_CODE (orig) == MEM)
{
new = gen_rtx (MEM, GET_MODE (orig), new);
new = gen_rtx_MEM (GET_MODE (orig), new);
RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (orig);
MEM_COPY_ATTRIBUTES (new, orig);
}
@ -527,7 +525,7 @@ expand_block_move (dest_mem, src_mem, operands)
else
{
#ifdef TARGET_MEM_FUNCTIONS
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0,
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0,
VOIDmode, 3,
operands[0], Pmode,
operands[1], Pmode,
@ -535,7 +533,7 @@ expand_block_move (dest_mem, src_mem, operands)
TREE_UNSIGNED (sizetype)),
TYPE_MODE (sizetype));
#else
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0,
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0,
VOIDmode, 3,
operands[1], Pmode,
operands[0], Pmode,
@ -596,22 +594,22 @@ block_move_loop (dest, dest_mem, src, src_mem, size, align)
offset_rtx = GEN_INT (MOVSTR_LOOP + (1 - units) * align);
value_rtx = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode,
gen_rtx (PLUS, Pmode,
gen_rtx (REG, Pmode, 3),
offset_rtx));
value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode,
gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode, 3),
offset_rtx));
RTX_UNCHANGING_P (value_rtx) = RTX_UNCHANGING_P (src_mem);
MEM_COPY_ATTRIBUTES (value_rtx, src_mem);
emit_insn (gen_call_movstrsi_loop
(gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)),
(gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)),
dest, src, offset_rtx, value_rtx,
gen_rtx (REG, mode, ((units & 1) ? 4 : 5)),
gen_rtx_REG (mode, ((units & 1) ? 4 : 5)),
GEN_INT (count)));
if (remainder)
block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem,
gen_rtx (REG, Pmode, 3), src_mem,
block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem,
gen_rtx_REG (Pmode, 3), src_mem,
remainder, align, MOVSTR_LOOP + align);
}
@ -652,10 +650,11 @@ block_move_no_loop (dest, dest_mem, src, src_mem, size, align)
offset_rtx = GEN_INT (most - (size - remainder));
value_rtx = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode,
gen_rtx (PLUS, Pmode,
gen_rtx (REG, Pmode, 3),
offset_rtx));
value_rtx = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode,
gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode, 3),
offset_rtx));
RTX_UNCHANGING_P (value_rtx) = RTX_UNCHANGING_P (src_mem);
MEM_COPY_ATTRIBUTES (value_rtx, src_mem);
@ -663,13 +662,13 @@ block_move_no_loop (dest, dest_mem, src, src_mem, size, align)
? (align == 8 ? 6 : 5) : 4);
emit_insn (gen_call_block_move
(gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)),
(gen_rtx_SYMBOL_REF (Pmode, IDENTIFIER_POINTER (entry_name)),
dest, src, offset_rtx, value_rtx,
gen_rtx (REG, mode, value_reg)));
gen_rtx_REG (mode, value_reg)));
if (remainder)
block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem,
gen_rtx (REG, Pmode, 3), src_mem,
block_move_sequence (gen_rtx_REG (Pmode, 2), dest_mem,
gen_rtx_REG (Pmode, 3), src_mem,
remainder, align, most);
}
@ -724,13 +723,12 @@ block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset)
temp[next] = gen_reg_rtx (mode[next]);
}
size -= amount[next];
srcp = gen_rtx (MEM,
MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode,
gen_rtx (PLUS, Pmode, src,
GEN_INT (offset_ld)));
srcp = gen_rtx_MEM (MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode,
plus_constant (src, offset_ld));
RTX_UNCHANGING_P (srcp) = RTX_UNCHANGING_P (src_mem);
MEM_COPY_ATTRIBUTES (srcp, src_mem);
emit_insn (gen_rtx (SET, VOIDmode, temp[next], srcp));
emit_insn (gen_rtx_SET (VOIDmode, temp[next], srcp));
offset_ld += amount[next];
active[next] = TRUE;
}
@ -738,13 +736,13 @@ block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset)
if (active[phase])
{
active[phase] = FALSE;
dstp = gen_rtx (MEM,
MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode,
gen_rtx (PLUS, Pmode, dest,
GEN_INT (offset_st)));
dstp
= gen_rtx_MEM (MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode,
plus_constant (dest, offset_st));
RTX_UNCHANGING_P (dstp) = RTX_UNCHANGING_P (dest_mem);
MEM_COPY_ATTRIBUTES (dstp, dest_mem);
emit_insn (gen_rtx (SET, VOIDmode, dstp, temp[phase]));
emit_insn (gen_rtx_SET (VOIDmode, dstp, temp[phase]));
offset_st += amount[phase];
}
}
@ -927,9 +925,9 @@ output_call (operands, addr)
}
/* Record the values to be computed later as "def name,high-low". */
sb_name = gen_rtx (EXPR_LIST, VOIDmode, operands[0], sb_name);
sb_high = gen_rtx (EXPR_LIST, VOIDmode, high, sb_high);
sb_low = gen_rtx (EXPR_LIST, VOIDmode, low, sb_low);
sb_name = gen_rtx_EXPR_LIST (VOIDmode, operands[0], sb_name);
sb_high = gen_rtx_EXPR_LIST (VOIDmode, high, sb_high);
sb_low = gen_rtx_EXPR_LIST (VOIDmode, low, sb_low);
#endif /* Don't USE_GAS */
return last;
@ -1160,7 +1158,7 @@ legitimize_operand (op, mode)
&& (u.s.exponent1 == 0x8 || u.s.exponent1 == 0x7) /* Exponent fits */
&& (temp = simplify_unary_operation (FLOAT_TRUNCATE, SFmode,
op, mode)) != 0)
return gen_rtx (FLOAT_EXTEND, mode, force_reg (SFmode, temp));
return gen_rtx_FLOAT_EXTEND (mode, force_reg (SFmode, temp));
}
else if (register_operand (op, mode))
return op;
@ -1982,13 +1980,13 @@ m88k_expand_prologue ()
if (flag_pic && save_regs[PIC_OFFSET_TABLE_REGNUM])
{
rtx return_reg = gen_rtx (REG, SImode, 1);
rtx return_reg = gen_rtx_REG (SImode, 1);
rtx label = gen_label_rtx ();
rtx temp_reg;
if (! save_regs[1])
{
temp_reg = gen_rtx (REG, SImode, TEMP_REGNUM);
temp_reg = gen_rtx_REG (SImode, TEMP_REGNUM);
emit_move_insn (temp_reg, return_reg);
}
emit_insn (gen_locate1 (pic_offset_table_rtx, label));
@ -2092,9 +2090,10 @@ emit_add (dstreg, srcreg, amount)
int amount;
{
rtx incr = GEN_INT (abs (amount));
if (! ADD_INTVAL (amount))
{
rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM);
rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM);
emit_move_insn (temp, incr);
incr = temp;
}
@ -2207,22 +2206,23 @@ emit_ldst (store_p, regno, mode, offset)
enum machine_mode mode;
int offset;
{
rtx reg = gen_rtx (REG, mode, regno);
rtx reg = gen_rtx_REG (mode, regno);
rtx mem;
if (SMALL_INTVAL (offset))
{
mem = gen_rtx (MEM, mode, plus_constant (stack_pointer_rtx, offset));
mem = gen_rtx_MEM (mode, plus_constant (stack_pointer_rtx, offset));
}
else
{
/* offset is too large for immediate index must use register */
rtx disp = GEN_INT (offset);
rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM);
rtx regi = gen_rtx (PLUS, SImode, stack_pointer_rtx, temp);
rtx temp = gen_rtx_REG (SImode, TEMP_REGNUM);
rtx regi = gen_rtx_PLUS (SImode, stack_pointer_rtx, temp);
emit_move_insn (temp, disp);
mem = gen_rtx (MEM, mode, regi);
mem = gen_rtx_MEM (mode, regi);
}
if (store_p)
@ -2561,9 +2561,8 @@ m88k_function_arg (args_so_far, mode, type, named)
|| bytes != UNITS_PER_WORD))
return (rtx) 0;
return gen_rtx (REG,
((mode == BLKmode) ? TYPE_MODE (type) : mode),
2 + args_so_far);
return gen_rtx_REG (((mode == BLKmode) ? TYPE_MODE (type) : mode),
2 + args_so_far);
}
/* Do what is necessary for `va_start'. We look at the current function
@ -2788,15 +2787,14 @@ emit_bcnd (op, label)
rtx label;
{
if (m88k_compare_op1 == const0_rtx)
emit_jump_insn( gen_bcnd (
gen_rtx (op, VOIDmode,m88k_compare_op0, const0_rtx),
label));
emit_jump_insn (gen_bcnd
(gen_rtx (op, VOIDmode,m88k_compare_op0, const0_rtx),
label));
else if (m88k_compare_op0 == const0_rtx)
emit_jump_insn( gen_bcnd(
gen_rtx(
swap_condition (op),
VOIDmode, m88k_compare_op1, const0_rtx),
label));
emit_jump_insn (gen_bcnd
(gen_rtx (swap_condition (op),
VOIDmode, m88k_compare_op1, const0_rtx),
label));
else if (op != EQ && op != NE)
emit_jump_insn (gen_bxx (emit_test (op, VOIDmode), label));
else

35
gcc/config/m88k/m88k.h
View File

@ -975,9 +975,8 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
If the precise function being called is known, FUNC is its FUNCTION_DECL;
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, \
TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
2)
gen_rtx_REG (TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
2)
/* Define this if it differs from FUNCTION_VALUE. */
/* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
@ -997,7 +996,7 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 2)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2)
/* True if N is a possible register number for a function value
as seen by the caller. */
@ -1239,8 +1238,8 @@ extern struct rtx_def *m88k_va_arg ();
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \
}
/*** Library Subroutine Names ***/
@ -1416,23 +1415,23 @@ extern struct rtx_def *m88k_va_arg ();
#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
{ \
if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
copy_to_mode_reg (SImode, XEXP (X, 1))); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
copy_to_mode_reg (SImode, XEXP (X, 1))); \
if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
copy_to_mode_reg (SImode, XEXP (X, 0))); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
copy_to_mode_reg (SImode, XEXP (X, 0))); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 1), \
force_operand (XEXP (X, 0), 0)); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
force_operand (XEXP (X, 0), 0)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
(X) = gen_rtx (PLUS, SImode, XEXP (X, 0), \
force_operand (XEXP (X, 1), 0)); \
(X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
force_operand (XEXP (X, 1), 0)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
(X) = gen_rtx (PLUS, Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
XEXP (X, 1)); \
(X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
XEXP (X, 1)); \
if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
(X) = gen_rtx (PLUS, Pmode, XEXP (X, 0), \
force_operand (XEXP (X, 1), NULL_RTX)); \
(X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
force_operand (XEXP (X, 1), NULL_RTX)); \
if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
|| GET_CODE (X) == LABEL_REF) \
(X) = legitimize_address (flag_pic, X, 0, 0); \

104
gcc/config/m88k/m88k.md
View File

@ -1,5 +1,5 @@
;;- Machine description for the Motorola 88000 for GNU C compiler
;;; Copyright (C) 1988, 92-96, 1999 Free Software Foundation, Inc.
;;; Copyright (C) 1988, 92-96, 1998, 1999 Free Software Foundation, Inc.
;; Contributed by Michael Tiemann (tiemann@mcc.com)
;; Currently maintained by (gcc@dg-rtp.dg.com)
@ -432,24 +432,25 @@
(match_dup 2)))
(set (match_dup 0)
(neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
if (GET_CODE (operands[1]) == GET_CODE (operands[3]))
; /* The conditions match. */
else if (GET_CODE (operands[1])
== reverse_condition (GET_CODE (operands[3])))
/* Reverse the condition by complimenting the compare word. */
operands[4] = gen_rtx (NOT, CCmode, operands[4]);
operands[4] = gen_rtx_NOT (CCmode, operands[4]);
else
{
/* Make the condition pairs line up by rotating the compare word. */
int cv1 = condition_value (operands[1]);
int cv2 = condition_value (operands[3]);
operands[4] = gen_rtx (ROTATE, CCmode, operands[4],
GEN_INT (((cv2 & ~1) - (cv1 & ~1)) & 0x1f));
operands[4] = gen_rtx_ROTATE (CCmode, operands[4],
GEN_INT (((cv2 & ~1) - (cv1 & ~1))
& 0x1f));
/* Reverse the condition if needed. */
if ((cv1 & 1) != (cv2 & 1))
operands[4] = gen_rtx (NOT, CCmode, operands[4]);
operands[4] = gen_rtx_NOT (CCmode, operands[4]);
}")
(define_split
@ -469,7 +470,7 @@
(match_dup 2)))
(set (match_dup 0)
(neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
if (GET_CODE (operands[1]) == GET_CODE (operands[3]))
; /* The conditions match. */
else
@ -478,8 +479,8 @@
int cv1 = condition_value (operands[1]);
int cv2 = condition_value (operands[3]);
operands[4] = gen_rtx (ROTATE, CCmode, operands[4],
GEN_INT ((cv2 - cv1) & 0x1f));
operands[4] = gen_rtx_ROTATE (CCmode, operands[4],
GEN_INT ((cv2 - cv1) & 0x1f));
}")
(define_split
@ -499,7 +500,7 @@
(match_dup 4)))
(set (match_dup 0)
(neg:SI (match_op_dup 3 [(match_dup 5) (const_int 0)])))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
if (GET_CODE (operands[1])
== reverse_condition (GET_CODE (operands[3])))
;
@ -509,8 +510,9 @@
int cv1 = condition_value (operands[1]);
int cv2 = condition_value (operands[3]);
operands[2] = gen_rtx (ROTATE, CCmode, operands[2],
GEN_INT (((cv1 & ~1) - (cv2 & ~1)) & 0x1f));
operands[2] = gen_rtx_ROTATE (CCmode, operands[2],
GEN_INT (((cv1 & ~1) - (cv2 & ~1))
& 0x1f));
}")
(define_split
@ -529,10 +531,10 @@
(match_dup 2)))
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
/* Reverse the condition by complimenting the compare word. */
if (GET_CODE (operands[1]) != GET_CODE (operands[3]))
operands[4] = gen_rtx (NOT, CCmode, operands[4]);")
operands[4] = gen_rtx_NOT (CCmode, operands[4]);")
(define_split
[(set (match_operand:SI 0 "register_operand" "=r")
@ -549,7 +551,7 @@
(match_dup 2)))
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);")
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);")
(define_split
[(set (match_operand:SI 0 "register_operand" "=r")
@ -566,7 +568,7 @@
(match_dup 2)))
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);")
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);")
(define_split
[(set (match_operand:SI 0 "register_operand" "=r")
@ -585,23 +587,24 @@
(match_dup 2)))
(set (match_dup 0)
(neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
if (GET_CODE (operands[1]) == GET_CODE (operands[3]))
; /* The conditions match. */
else if (GET_CODE (operands[1])
== reverse_condition (GET_CODE (operands[3])))
/* Reverse the condition by complimenting the compare word. */
operands[4] = gen_rtx (NOT, CCmode, operands[4]);
operands[4] = gen_rtx_NOT (CCmode, operands[4]);
else
{
/* Make the condition pairs line up by rotating the compare word. */
int cv1 = condition_value (operands[1]);
int cv2 = condition_value (operands[3]);
operands[4] = gen_rtx (ROTATE, CCmode, operands[4],
GEN_INT (((cv2 & ~1) - (cv1 & ~1)) & 0x1f));
operands[4] = gen_rtx_ROTATE (CCmode, operands[4],
GEN_INT (((cv2 & ~1) - (cv1 & ~1))
& 0x1f));
/* Reverse the condition if needed. */
if ((cv1 & 1) != (cv2 & 1))
operands[4] = gen_rtx (NOT, CCmode, operands[4]);
operands[4] = gen_rtx_NOT (CCmode, operands[4]);
}")
(define_split
@ -621,7 +624,7 @@
(match_dup 2)))
(set (match_dup 0)
(neg:SI (match_op_dup 1 [(match_dup 5) (const_int 0)])))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
if (GET_CODE (operands[1]) == GET_CODE (operands[3]))
; /* The conditions match. */
else
@ -629,8 +632,8 @@
/* Make the condition pairs line up by rotating the compare word. */
int cv1 = condition_value (operands[1]);
int cv2 = condition_value (operands[3]);
operands[4] = gen_rtx (ROTATE, CCmode, operands[4],
GEN_INT ((cv2 - cv1) & 0x1f));
operands[4] = gen_rtx_ROTATE (CCmode, operands[4],
GEN_INT ((cv2 - cv1) & 0x1f));
}")
(define_split
@ -650,7 +653,7 @@
(match_dup 4)))
(set (match_dup 0)
(neg:SI (match_op_dup 3 [(match_dup 5) (const_int 0)])))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
if (GET_CODE (operands[1])
== reverse_condition (GET_CODE (operands[3])))
;
@ -659,8 +662,9 @@
/* Make the condition pairs line up by rotating the compare word. */
int cv1 = condition_value (operands[1]);
int cv2 = condition_value (operands[3]);
operands[2] = gen_rtx (ROTATE, CCmode, operands[2],
GEN_INT (((cv1 & ~1) - (cv2 & ~1)) & 0x1f));
operands[2] = gen_rtx_ROTATE (CCmode, operands[2],
GEN_INT (((cv1 & ~1) - (cv2 & ~1))
& 0x1f));
}")
(define_split
@ -679,10 +683,10 @@
(match_dup 2)))
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);
/* Reverse the condition by complimenting the compare word. */
if (GET_CODE (operands[1]) != GET_CODE (operands[3]))
operands[4] = gen_rtx (NOT, CCmode, operands[4]);")
operands[4] = gen_rtx_NOT (CCmode, operands[4]);")
(define_split
[(set (match_operand:SI 0 "register_operand" "=r")
@ -699,7 +703,7 @@
(match_dup 2)))
(set (match_dup 0)
(match_op_dup 1 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);")
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);")
(define_split
[(set (match_operand:SI 0 "register_operand" "=r")
@ -716,7 +720,7 @@
(match_dup 4)))
(set (match_dup 0)
(match_op_dup 3 [(match_dup 5) (const_int 0)]))]
"operands[5] = gen_rtx(SUBREG, CCEVENmode, operands[5], 0);")
"operands[5] = gen_rtx_SUBREG (CCEVENmode, operands[5], 0);")
;; Logical operations on compare words.
@ -1786,7 +1790,7 @@
DONE;
/* We don't want the clobber emitted, so handle this ourselves. */
emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1]));
emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
DONE;
}")
@ -2279,8 +2283,8 @@
{
operands[1]
= legitimize_address (flag_pic, operands[1], 0, 0);
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (ZERO_EXTEND, SImode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_ZERO_EXTEND (SImode, operands[1])));
DONE;
}
}")
@ -2852,7 +2856,7 @@
if (TARGET_USE_DIV)
{
emit_move_insn (op0, gen_rtx (DIV, SImode, op1, op2));
emit_move_insn (op0, gen_rtx_DIV (SImode, op1, op2));
if (TARGET_CHECK_ZERO_DIV && GET_CODE (op2) != CONST_INT)
{
rtx label = gen_label_rtx ();
@ -2881,7 +2885,7 @@
emit_insn (gen_cmpsi (op2, const0_rtx));
emit_jump_insn (gen_bgt (label1));
/* constant / 0-or-negative */
emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, neg_op2));
emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, neg_op2));
if (!neg)
emit_insn (gen_negsi2 (op0, op0));
@ -2891,7 +2895,7 @@
emit_barrier ();
emit_label (label1); /* constant / positive */
emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2));
emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2));
if (neg)
emit_insn (gen_negsi2 (op0, op0));
}
@ -2914,7 +2918,7 @@
emit_insn (gen_cmpsi (op1, const0_rtx));
emit_jump_insn (gen_bge (label1));
/* 0-or-negative / constant */
emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, op2));
emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, op2));
if (!neg)
emit_insn (gen_negsi2 (op0, op0));
@ -2922,7 +2926,7 @@
emit_barrier ();
emit_label (label1); /* positive / constant */
emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2));
emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2));
if (neg)
emit_insn (gen_negsi2 (op0, op0));
}
@ -2944,7 +2948,7 @@
emit_insn (gen_cmpsi (op1, const0_rtx));
emit_jump_insn (gen_bge (label2));
/* negative / negative-or-0 */
emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, neg_op2));
emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, neg_op2));
if (TARGET_CHECK_ZERO_DIV)
{
@ -2958,7 +2962,7 @@
emit_barrier ();
emit_label (label2); /* pos.-or-0 / neg.-or-0 */
emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, neg_op2));
emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, neg_op2));
if (TARGET_CHECK_ZERO_DIV)
{
@ -2975,13 +2979,13 @@
emit_insn (gen_cmpsi (op1, const0_rtx));
emit_jump_insn (gen_bge (label3));
/* negative / positive */
emit_move_insn (op0, gen_rtx (UDIV, SImode, neg_op1, op2));
emit_move_insn (op0, gen_rtx_UDIV (SImode, neg_op1, op2));
emit_insn (gen_negsi2 (op0, op0));
emit_jump_insn (gen_jump (join_label));
emit_barrier ();
emit_label (label3); /* positive-or-0 / positive */
emit_move_insn (op0, gen_rtx (UDIV, SImode, op1, op2));
emit_move_insn (op0, gen_rtx_UDIV (SImode, op1, op2));
}
emit_label (join_label);
@ -3016,8 +3020,8 @@
else if (GET_CODE (op2) != CONST_INT && TARGET_CHECK_ZERO_DIV)
{
rtx label = gen_label_rtx ();
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (UDIV, SImode, operands[1], op2)));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_UDIV (SImode, operands[1], op2)));
emit_insn (gen_tcnd_divide_by_zero (op2, label));
emit_label (label);
emit_insn (gen_dummy (operands[0]));
@ -3801,7 +3805,7 @@
{
register rtx index_diff = gen_reg_rtx (SImode);
register rtx low = GEN_INT (-INTVAL (operands[1]));
register rtx label = gen_rtx (LABEL_REF, VOIDmode, operands[3]);
register rtx label = gen_rtx_LABEL_REF (Pmode, operands[3]);
register rtx base;
if (! CASE_VECTOR_INSNS)
@ -3879,8 +3883,8 @@
{
if (GET_CODE (operands[0]) == MEM
&& ! call_address_operand (XEXP (operands[0], 0), SImode))
operands[0] = gen_rtx (MEM, GET_MODE (operands[0]),
force_reg (Pmode, XEXP (operands[0], 0)));
operands[0] = gen_rtx_MEM (GET_MODE (operands[0]),
force_reg (Pmode, XEXP (operands[0], 0)));
}")
(define_insn ""
@ -3901,8 +3905,8 @@
{
if (GET_CODE (operands[1]) == MEM
&& ! call_address_operand (XEXP (operands[1], 0), SImode))
operands[1] = gen_rtx (MEM, GET_MODE (operands[1]),
force_reg (Pmode, XEXP (operands[1], 0)));
operands[1] = gen_rtx_MEM (GET_MODE (operands[1]),
force_reg (Pmode, XEXP (operands[1], 0)));
}")
(define_insn ""

15
gcc/config/m88k/sysv3.h
View File

@ -1,6 +1,6 @@
/* Definitions of target machine for GNU compiler.
Motorola m88100 running the AT&T/Unisoft/Motorola V.3 reference port.
Copyright (C) 1990, 1991, 1997, 1999 Free Software Foundation, Inc.
Copyright (C) 1990, 1991, 1997, 1998, 1999 Free Software Foundation, Inc.
Contributed by Ray Essick (ressick@mot.com)
Enhanced by Tom Wood (Tom_Wood@NeXT.com)
@ -145,10 +145,11 @@ do { \
#undef INITIALIZE_TRAMPOLINE
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 40)), FNADDR); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 36)), CXT); \
emit_call_insn (gen_call (gen_rtx (MEM, SImode, \
gen_rtx (SYMBOL_REF, Pmode, \
"__enable_execute_stack")), \
const0_rtx)); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \
emit_call_insn (gen_call \
(gen_rtx_MEM \
(SImode, \
gen_rtx_SYMBOL_REF (Pmode, "__enable_execute_stack")), \
const0_rtx)); \
}

21
gcc/config/mips/abi64.h
View File

@ -134,7 +134,7 @@ extern struct rtx_def *mips_function_value ();
ptr = plus_constant (virtual_incoming_args_rtx, \
- (mips_save_gp_regs \
* UNITS_PER_WORD)); \
mem = gen_rtx (MEM, BLKmode, ptr); \
mem = gen_rtx_MEM (BLKmode, ptr); \
/* va_arg is an array access in this case, which causes \
it to get MEM_IN_STRUCT_P set. We must set it here \
so that the insn scheduler won't assume that these \
@ -167,15 +167,15 @@ extern struct rtx_def *mips_function_value ();
for (i = 0; i < mips_save_fp_regs; i++) \
{ \
rtx tem = \
gen_rtx (MEM, mode, \
plus_constant (virtual_incoming_args_rtx, \
off)); \
gen_rtx_MEM (mode, \
plus_constant (virtual_incoming_args_rtx, \
off)); \
emit_move_insn (tem, \
gen_rtx (REG, mode, \
((CUM).fp_arg_words \
+ FP_ARG_FIRST \
+ i \
+ mips_fp_off))); \
gen_rtx_REG (mode, \
((CUM).fp_arg_words \
+ FP_ARG_FIRST \
+ i \
+ mips_fp_off))); \
off += size; \
if (! TARGET_FLOAT64 || TARGET_SINGLE_FLOAT) \
++i; \
@ -193,8 +193,7 @@ extern struct rtx_def *mips_function_value ();
argument itself. The pointer is passed in whatever way is appropriate
for passing a pointer to that type. */
#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
(mips_abi == ABI_EABI \
&& function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED))
function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED)
/* A C expression that indicates when it is the called function's
responsibility to make a copy of arguments passed by invisible

170
gcc/config/mips/mips.c
View File

@ -29,7 +29,6 @@ Boston, MA 02111-1307, USA. */
#include "config.h"
#include "system.h"
#include <signal.h>
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -41,6 +40,8 @@ Boston, MA 02111-1307, USA. */
#include "insn-codes.h"
#include "recog.h"
#include "toplev.h"
#include "output.h"
#include "tree.h"
#include "function.h"
#include "expr.h"
@ -1478,14 +1479,14 @@ mips_fill_delay_slot (ret, type, operands, cur_insn)
mips_load_reg = set_reg;
if (GET_MODE_SIZE (mode)
> (FP_REG_P (REGNO (set_reg)) ? UNITS_PER_FPREG : UNITS_PER_WORD))
mips_load_reg2 = gen_rtx (REG, SImode, REGNO (set_reg) + 1);
mips_load_reg2 = gen_rtx_REG (SImode, REGNO (set_reg) + 1);
else
mips_load_reg2 = 0;
if (type == DELAY_HILO)
{
mips_load_reg3 = gen_rtx (REG, SImode, MD_REG_FIRST);
mips_load_reg4 = gen_rtx (REG, SImode, MD_REG_FIRST+1);
mips_load_reg3 = gen_rtx_REG (SImode, MD_REG_FIRST);
mips_load_reg4 = gen_rtx_REG (SImode, MD_REG_FIRST+1);
}
else
{
@ -1646,9 +1647,10 @@ embedded_pic_offset (x)
pop_topmost_sequence ();
}
return gen_rtx (CONST, Pmode,
gen_rtx (MINUS, Pmode, x,
XEXP (DECL_RTL (current_function_decl), 0)));
return
gen_rtx_CONST (Pmode,
gen_rtx_MINUS (Pmode, x,
XEXP (DECL_RTL (current_function_decl), 0)));
}
/* Return the appropriate instructions to move one operand to another. */
@ -2790,7 +2792,7 @@ gen_int_relational (test_code, result, cmp0, cmp1, p_invert)
else if (test == ITEST_EQ)
{
reg2 = invert ? gen_reg_rtx (mode) : result;
convert_move (reg2, gen_rtx (LTU, mode, reg, const1_rtx), 0);
convert_move (reg2, gen_rtx_LTU (mode, reg, const1_rtx), 0);
reg = reg2;
}
@ -2857,7 +2859,7 @@ gen_conditional_branch (operands, test_code)
case CMP_SF:
case CMP_DF:
if (mips_isa < 4)
reg = gen_rtx (REG, CCmode, FPSW_REGNUM);
reg = gen_rtx_REG (CCmode, FPSW_REGNUM);
else
reg = gen_reg_rtx (CCmode);
@ -2865,10 +2867,10 @@ gen_conditional_branch (operands, test_code)
0 in the instruction built below. The MIPS FPU handles
inequality testing by testing for equality and looking for a
false result. */
emit_insn (gen_rtx (SET, VOIDmode, reg,
gen_rtx (test_code == NE ? EQ : test_code,
CCmode, cmp0, cmp1)));
emit_insn (gen_rtx_SET (VOIDmode, reg,
gen_rtx (test_code == NE ? EQ : test_code,
CCmode, cmp0, cmp1)));
test_code = test_code == NE ? EQ : NE;
mode = CCmode;
cmp0 = reg;
@ -2882,7 +2884,7 @@ gen_conditional_branch (operands, test_code)
/* Generate the branch. */
label1 = gen_rtx (LABEL_REF, VOIDmode, operands[0]);
label1 = gen_rtx_LABEL_REF (VOIDmode, operands[0]);
label2 = pc_rtx;
if (invert)
@ -2891,10 +2893,11 @@ gen_conditional_branch (operands, test_code)
label1 = pc_rtx;
}
emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx,
gen_rtx (IF_THEN_ELSE, VOIDmode,
gen_rtx (test_code, mode, cmp0, cmp1),
label1, label2)));
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_IF_THEN_ELSE (VOIDmode,
gen_rtx (test_code, mode,
cmp0, cmp1),
label1, label2)));
}
/* Emit the common code for conditional moves. OPERANDS is the array
@ -2973,14 +2976,15 @@ gen_conditional_move (operands)
abort ();
cmp_reg = gen_reg_rtx (cmp_mode);
emit_insn (gen_rtx (SET, cmp_mode, cmp_reg,
gen_rtx (cmp_code, cmp_mode, op0, op1)));
emit_insn (gen_rtx_SET (cmp_mode, cmp_reg,
gen_rtx (cmp_code, cmp_mode, op0, op1)));
emit_insn (gen_rtx (SET, op_mode, operands[0],
gen_rtx (IF_THEN_ELSE, op_mode,
gen_rtx (move_code, VOIDmode,
cmp_reg, CONST0_RTX (SImode)),
operands[2], operands[3])));
emit_insn (gen_rtx_SET (op_mode, operands[0],
gen_rtx_IF_THEN_ELSE (op_mode,
gen_rtx (move_code, VOIDmode,
cmp_reg,
CONST0_RTX (SImode)),
operands[2], operands[3])));
}
/* Write a loop to move a constant number of bytes.
@ -3097,13 +3101,13 @@ block_move_call (dest_reg, src_reg, bytes_rtx)
bytes_rtx = convert_to_mode (Pmode, bytes_rtx, 1);
#ifdef TARGET_MEM_FUNCTIONS
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "memcpy"), 0,
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "memcpy"), 0,
VOIDmode, 3, dest_reg, Pmode, src_reg, Pmode,
convert_to_mode (TYPE_MODE (sizetype), bytes_rtx,
TREE_UNSIGNED (sizetype)),
TYPE_MODE (sizetype));
#else
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "bcopy"), 0,
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "bcopy"), 0,
VOIDmode, 3, src_reg, Pmode, dest_reg, Pmode,
convert_to_mode (TYPE_MODE (integer_type_node), bytes_rtx,
TREE_UNSIGNED (integer_type_node)),
@ -3502,23 +3506,23 @@ output_block_move (insn, operands, num_regs, move_type)
abort ();
if (GET_MODE (operands[i + 4]) != load_store[i].mode)
operands[i + 4] = gen_rtx (REG, load_store[i].mode,
REGNO (operands[i + 4]));
operands[i + 4] = gen_rtx_REG (load_store[i].mode,
REGNO (operands[i + 4]));
offset = load_store[i].offset;
xoperands[0] = operands[i + 4];
xoperands[1] = gen_rtx (MEM, load_store[i].mode,
plus_constant (src_reg, offset));
xoperands[1] = gen_rtx_MEM (load_store[i].mode,
plus_constant (src_reg, offset));
if (use_lwl_lwr)
{
int extra_offset
= GET_MODE_SIZE (load_store[i].mode) - 1;
xoperands[2] = gen_rtx (MEM, load_store[i].mode,
plus_constant (src_reg,
extra_offset
+ offset));
xoperands[2] = gen_rtx_MEM (load_store[i].mode,
plus_constant (src_reg,
extra_offset
+ offset));
}
output_asm_insn (load_store[i].load, xoperands);
@ -3531,17 +3535,17 @@ output_block_move (insn, operands, num_regs, move_type)
int offset = load_store[i].offset;
xoperands[0] = operands[i + 4];
xoperands[1] = gen_rtx (MEM, load_store[i].mode,
plus_constant (dest_reg, offset));
xoperands[1] = gen_rtx_MEM (load_store[i].mode,
plus_constant (dest_reg, offset));
if (use_lwl_lwr)
{
int extra_offset = GET_MODE_SIZE (load_store[i].mode) - 1;
xoperands[2] = gen_rtx (MEM, load_store[i].mode,
plus_constant (dest_reg,
extra_offset
+ offset));
xoperands[2] = gen_rtx_MEM (load_store[i].mode,
plus_constant (dest_reg,
extra_offset
+ offset));
}
if (move_type == BLOCK_MOVE_NORMAL)
@ -3814,7 +3818,7 @@ function_arg (cum, mode, type, named)
if (! type || TREE_CODE (type) != RECORD_TYPE || mips_abi == ABI_32
|| mips_abi == ABI_EABI || mips_abi == ABI_O64 || ! named)
ret = gen_rtx (REG, mode, regbase + *arg_words + bias);
ret = gen_rtx_REG (mode, regbase + *arg_words + bias);
else
{
/* The Irix 6 n32/n64 ABIs say that if any 64 bit chunk of the
@ -3834,7 +3838,7 @@ function_arg (cum, mode, type, named)
/* If the whole struct fits a DFmode register,
we don't need the PARALLEL. */
if (! field || mode == DFmode)
ret = gen_rtx (REG, mode, regbase + *arg_words + bias);
ret = gen_rtx_REG (mode, regbase + *arg_words + bias);
else
{
/* Now handle the special case by returning a PARALLEL
@ -3853,7 +3857,7 @@ function_arg (cum, mode, type, named)
/* assign_parms checks the mode of ENTRY_PARM, so we must
use the actual mode here. */
ret = gen_rtx (PARALLEL, mode, rtvec_alloc (chunks));
ret = gen_rtx_PARALLEL (mode, rtvec_alloc (chunks));
bitpos = 0;
regno = regbase + *arg_words + bias;
@ -3872,14 +3876,14 @@ function_arg (cum, mode, type, named)
&& TREE_INT_CST_LOW (DECL_FIELD_BITPOS (field)) == bitpos
&& TREE_CODE (TREE_TYPE (field)) == REAL_TYPE
&& TYPE_PRECISION (TREE_TYPE (field)) == BITS_PER_WORD)
reg = gen_rtx (REG, DFmode,
regno + FP_ARG_FIRST - GP_ARG_FIRST);
reg = gen_rtx_REG (DFmode,
regno + FP_ARG_FIRST - GP_ARG_FIRST);
else
reg = gen_rtx (REG, word_mode, regno);
reg = gen_rtx_REG (word_mode, regno);
XVECEXP (ret, 0, i)
= gen_rtx (EXPR_LIST, VOIDmode, reg,
GEN_INT (bitpos / BITS_PER_UNIT));
= gen_rtx_EXPR_LIST (VOIDmode, reg,
GEN_INT (bitpos / BITS_PER_UNIT));
bitpos += 64;
regno++;
@ -3915,7 +3919,7 @@ function_arg (cum, mode, type, named)
{
rtx amount = GEN_INT (BITS_PER_WORD
- int_size_in_bytes (type) * BITS_PER_UNIT);
rtx reg = gen_rtx (REG, word_mode, regbase + *arg_words + bias);
rtx reg = gen_rtx_REG (word_mode, regbase + *arg_words + bias);
if (TARGET_64BIT)
cum->adjust[cum->num_adjusts++] = gen_ashldi3 (reg, reg, amount);
@ -5773,7 +5777,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
&& (unsigned HOST_WIDE_INT) (large_offset - gp_offset) < 32768
&& (unsigned HOST_WIDE_INT) (large_offset - end_offset) < 32768)
{
base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM);
base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM);
base_offset = large_offset;
if (file == 0)
{
@ -5796,7 +5800,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
else
{
base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM);
base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM);
base_offset = gp_offset;
if (file == 0)
{
@ -5990,7 +5994,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
&& (unsigned HOST_WIDE_INT) (large_offset - fp_offset) < 32768
&& (unsigned HOST_WIDE_INT) (large_offset - end_offset) < 32768)
{
base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM);
base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM);
base_offset = large_offset;
if (file == 0)
{
@ -6014,7 +6018,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
else
{
base_reg_rtx = gen_rtx (REG, Pmode, MIPS_TEMP2_REGNUM);
base_reg_rtx = gen_rtx_REG (Pmode, MIPS_TEMP2_REGNUM);
base_offset = fp_offset;
if (file == 0)
{
@ -6665,7 +6669,7 @@ mips_expand_prologue ()
if (TARGET_ABICALLS && (mips_abi != ABI_32 && mips_abi != ABI_O64))
emit_insn (gen_loadgp (XEXP (DECL_RTL (current_function_decl), 0),
gen_rtx (REG, DImode, 25)));
gen_rtx_REG (DImode, 25)));
}
/* If we are profiling, make sure no instructions are scheduled before
@ -6794,7 +6798,7 @@ mips_expand_epilogue ()
if (tsize > 32767 && ! TARGET_MIPS16)
{
tmp_rtx = gen_rtx (REG, Pmode, MIPS_TEMP1_REGNUM);
tmp_rtx = gen_rtx_REG (Pmode, MIPS_TEMP1_REGNUM);
emit_move_insn (tmp_rtx, tsize_rtx);
tsize_rtx = tmp_rtx;
}
@ -7111,12 +7115,13 @@ mips_function_value (valtype, func)
strictly necessary. */
enum machine_mode field_mode = TYPE_MODE (TREE_TYPE (fields[0]));
return gen_rtx (PARALLEL, mode,
gen_rtvec (1,
gen_rtx (EXPR_LIST, VOIDmode,
gen_rtx (REG, field_mode,
FP_RETURN),
const0_rtx)));
return gen_rtx_PARALLEL
(mode,
gen_rtvec (1,
gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_REG (field_mode,
FP_RETURN),
const0_rtx)));
}
else if (i == 2)
@ -7130,23 +7135,24 @@ mips_function_value (valtype, func)
int second_offset
= TREE_INT_CST_LOW (DECL_FIELD_BITPOS (fields[1]));
return gen_rtx (PARALLEL, mode,
gen_rtvec (2,
gen_rtx (EXPR_LIST, VOIDmode,
gen_rtx (REG, first_mode,
FP_RETURN),
GEN_INT (first_offset
/ BITS_PER_UNIT)),
gen_rtx (EXPR_LIST, VOIDmode,
gen_rtx (REG, second_mode,
FP_RETURN + 2),
GEN_INT (second_offset
/ BITS_PER_UNIT))));
return gen_rtx_PARALLEL
(mode,
gen_rtvec (2,
gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_REG (first_mode,
FP_RETURN),
GEN_INT (first_offset
/ BITS_PER_UNIT)),
gen_rtx_EXPR_LIST (VOIDmode,
gen_rtx_REG (second_mode,
FP_RETURN + 2),
GEN_INT (second_offset
/ BITS_PER_UNIT))));
}
}
}
return gen_rtx (REG, mode, reg);
return gen_rtx_REG (mode, reg);
}
/* The implementation of FUNCTION_ARG_PASS_BY_REFERENCE. Return
@ -7161,6 +7167,18 @@ function_arg_pass_by_reference (cum, mode, type, named)
{
int size;
/* We must pass by reference if we would be both passing in registers
and the stack. This is because any subsequent partial arg would be
handled incorrectly in this case.
??? This is really a kludge. We should either fix GCC so that such
a situation causes an abort and then do something in the MIPS port
to prevent it, or add code to function.c to properly handle the case. */
if (FUNCTION_ARG (*cum, mode, type, named) != 0
&& MUST_PASS_IN_STACK (mode, type))
return 1;
/* Otherwise, we only do this if EABI is selected. */
if (mips_abi != ABI_EABI)
return 0;

32
gcc/config/mips/mips.h
View File

@ -1131,7 +1131,7 @@ while (0)
#define DWARF_FRAME_RETURN_COLUMN (FP_REG_LAST + 1)
/* Before the prologue, RA lives in r31. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx (REG, VOIDmode, GP_REG_FIRST + 31)
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31)
/* Overrides for the COFF debug format. */
#define PUT_SDB_SCL(a) \
@ -2164,7 +2164,7 @@ extern enum reg_class mips_secondary_reload_class ();
#define RETURN_ADDR_RTX(count, frame) \
((count == 0) \
? gen_rtx (MEM, Pmode, gen_rtx (REG, Pmode, RETURN_ADDRESS_POINTER_REGNUM))\
? gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM))\
: (rtx) 0)
/* Structure to be filled in by compute_frame_size with register
@ -2706,19 +2706,19 @@ typedef struct mips_args {
rtx addr = ADDR; \
if (Pmode == DImode) \
{ \
emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 32)), FUNC); \
emit_move_insn (gen_rtx (MEM, DImode, plus_constant (addr, 40)), CHAIN);\
emit_move_insn (gen_rtx_MEM (DImode, plus_constant (addr, 32)), FUNC); \
emit_move_insn (gen_rtx_MEM (DImode, plus_constant (addr, 40)), CHAIN);\
} \
else \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), FUNC); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 36)), CHAIN);\
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\
} \
\
/* Flush both caches. We need to flush the data cache in case \
the system has a write-back cache. */ \
/* ??? Should check the return value for errors. */ \
emit_library_call (gen_rtx (SYMBOL_REF, Pmode, CACHE_FLUSH_FUNC), \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, CACHE_FLUSH_FUNC), \
0, VOIDmode, 3, addr, Pmode, \
GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\
GEN_INT (3), TYPE_MODE (integer_type_node)); \
@ -3050,8 +3050,10 @@ typedef struct mips_args {
if (mips_split_addresses && mips_check_split (X, MODE)) \
{ \
/* ??? Is this ever executed? */ \
X = gen_rtx (LO_SUM, Pmode, \
copy_to_mode_reg (Pmode, gen_rtx (HIGH, Pmode, X)), X); \
X = gen_rtx_LO_SUM (Pmode, \
copy_to_mode_reg (Pmode, \
gen_rtx (HIGH, Pmode, X)), \
X); \
goto WIN; \
} \
\
@ -3067,7 +3069,7 @@ typedef struct mips_args {
\
emit_move_insn (ptr_reg, XEXP (XEXP (xinsn, 0), 0)); \
\
X = gen_rtx (PLUS, Pmode, ptr_reg, constant); \
X = gen_rtx_PLUS (Pmode, ptr_reg, constant); \
if (SMALL_INT (constant)) \
goto WIN; \
/* Otherwise we fall through so the code below will fix the \
@ -3099,12 +3101,12 @@ typedef struct mips_args {
emit_move_insn (int_reg, \
GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
\
emit_insn (gen_rtx (SET, VOIDmode, \
ptr_reg, \
gen_rtx (PLUS, Pmode, xplus0, int_reg))); \
emit_insn (gen_rtx_SET (VOIDmode, \
ptr_reg, \
gen_rtx_PLUS (Pmode, xplus0, int_reg))); \
\
X = gen_rtx (PLUS, Pmode, ptr_reg, \
GEN_INT (INTVAL (xplus1) & 0x7fff)); \
X = gen_rtx_PLUS (Pmode, ptr_reg, \
GEN_INT (INTVAL (xplus1) & 0x7fff)); \
goto WIN; \
} \
} \

167
gcc/config/mips/mips.md
View File

@ -1,9 +1,9 @@
;; Mips.md Machine Description for MIPS based processors
;; Copyright (C) 1989, 90-98, 1999 Free Software Foundation, Inc.
;; Contributed by A. Lichnewsky, lich@inria.inria.fr
;; Changes by Michael Meissner, meissner@osf.org
;; 64 bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and
;; Brendan Eich, brendan@microunity.com.
;; Copyright (C) 1989, 90-98, 1999 Free Software Foundation, Inc.
;; This file is part of GNU CC.
@ -1701,7 +1701,7 @@
rtx xoperands[10];
xoperands[0] = operands[0];
xoperands[1] = gen_rtx (REG, SImode, LO_REGNUM);
xoperands[1] = gen_rtx_REG (SImode, LO_REGNUM);
output_asm_insn (\"mult\\t%1,%2\", operands);
output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands);
@ -1829,13 +1829,13 @@
output_asm_insn (\"dmult\\t%0,%1,%2\", operands);
else
{
rtx xoperands[10];
rtx xoperands[10];
xoperands[0] = operands[0];
xoperands[1] = gen_rtx (REG, DImode, LO_REGNUM);
xoperands[0] = operands[0];
xoperands[1] = gen_rtx_REG (DImode, LO_REGNUM);
output_asm_insn (\"dmult\\t%1,%2\", operands);
output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands);
output_asm_insn (\"dmult\\t%1,%2\", operands);
output_asm_insn (mips_move_1word (xoperands, insn, FALSE), xoperands);
}
return \"\";
}"
@ -4265,12 +4265,12 @@ move\\t%0,%z4\\n\\
emit_jump_insn (gen_bge (label1));
emit_insn (gen_fix_truncdfsi2 (operands[0], operands[1]));
emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx,
gen_rtx (LABEL_REF, VOIDmode, label2)));
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_LABEL_REF (VOIDmode, label2)));
emit_barrier ();
emit_label (label1);
emit_move_insn (reg2, gen_rtx (MINUS, DFmode, operands[1], reg1));
emit_move_insn (reg2, gen_rtx_MINUS (DFmode, operands[1], reg1));
emit_move_insn (reg3, GEN_INT (0x80000000));
emit_insn (gen_fix_truncdfsi2 (operands[0], reg2));
@ -4280,7 +4280,7 @@ move\\t%0,%z4\\n\\
/* allow REG_NOTES to be set on last insn (labels don't have enough
fields, and can't be used for REG_NOTES anyway). */
emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx));
emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
DONE;
}
}")
@ -4308,12 +4308,12 @@ move\\t%0,%z4\\n\\
emit_jump_insn (gen_bge (label1));
emit_insn (gen_fix_truncdfdi2 (operands[0], operands[1]));
emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx,
gen_rtx (LABEL_REF, VOIDmode, label2)));
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_LABEL_REF (VOIDmode, label2)));
emit_barrier ();
emit_label (label1);
emit_move_insn (reg2, gen_rtx (MINUS, DFmode, operands[1], reg1));
emit_move_insn (reg2, gen_rtx_MINUS (DFmode, operands[1], reg1));
emit_move_insn (reg3, GEN_INT (0x80000000));
emit_insn (gen_ashldi3 (reg3, reg3, GEN_INT (32)));
@ -4324,7 +4324,7 @@ move\\t%0,%z4\\n\\
/* allow REG_NOTES to be set on last insn (labels don't have enough
fields, and can't be used for REG_NOTES anyway). */
emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx));
emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
DONE;
}
}")
@ -4352,12 +4352,12 @@ move\\t%0,%z4\\n\\
emit_jump_insn (gen_bge (label1));
emit_insn (gen_fix_truncsfsi2 (operands[0], operands[1]));
emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx,
gen_rtx (LABEL_REF, VOIDmode, label2)));
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_LABEL_REF (VOIDmode, label2)));
emit_barrier ();
emit_label (label1);
emit_move_insn (reg2, gen_rtx (MINUS, SFmode, operands[1], reg1));
emit_move_insn (reg2, gen_rtx_MINUS (SFmode, operands[1], reg1));
emit_move_insn (reg3, GEN_INT (0x80000000));
emit_insn (gen_fix_truncsfsi2 (operands[0], reg2));
@ -4367,7 +4367,7 @@ move\\t%0,%z4\\n\\
/* allow REG_NOTES to be set on last insn (labels don't have enough
fields, and can't be used for REG_NOTES anyway). */
emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx));
emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
DONE;
}
}")
@ -4395,12 +4395,12 @@ move\\t%0,%z4\\n\\
emit_jump_insn (gen_bge (label1));
emit_insn (gen_fix_truncsfdi2 (operands[0], operands[1]));
emit_jump_insn (gen_rtx (SET, VOIDmode, pc_rtx,
gen_rtx (LABEL_REF, VOIDmode, label2)));
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_LABEL_REF (VOIDmode, label2)));
emit_barrier ();
emit_label (label1);
emit_move_insn (reg2, gen_rtx (MINUS, SFmode, operands[1], reg1));
emit_move_insn (reg2, gen_rtx_MINUS (SFmode, operands[1], reg1));
emit_move_insn (reg3, GEN_INT (0x80000000));
emit_insn (gen_ashldi3 (reg3, reg3, GEN_INT (32)));
@ -4411,7 +4411,7 @@ move\\t%0,%z4\\n\\
/* allow REG_NOTES to be set on last insn (labels don't have enough
fields, and can't be used for REG_NOTES anyway). */
emit_insn (gen_rtx (USE, VOIDmode, stack_pointer_rtx));
emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
DONE;
}
}")
@ -4729,10 +4729,10 @@ move\\t%0,%z4\\n\\
rtx tem = ((reload_in_progress | reload_completed)
? operands[0] : gen_reg_rtx (mode));
emit_insn (gen_rtx (SET, VOIDmode, tem,
gen_rtx (HIGH, mode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, tem,
gen_rtx_HIGH (mode, operands[1])));
operands[1] = gen_rtx (LO_SUM, mode, tem, operands[1]);
operands[1] = gen_rtx_LO_SUM (mode, tem, operands[1]);
}
/* If we are generating embedded PIC code, and we are referring to a
@ -4746,8 +4746,8 @@ move\\t%0,%z4\\n\\
rtx temp;
temp = embedded_pic_offset (operands[1]);
temp = gen_rtx (PLUS, Pmode, embedded_pic_fnaddr_rtx,
force_reg (DImode, temp));
temp = gen_rtx_PLUS (Pmode, embedded_pic_fnaddr_rtx,
force_reg (DImode, temp));
emit_move_insn (operands[0], force_reg (DImode, temp));
DONE;
}
@ -4762,7 +4762,7 @@ move\\t%0,%z4\\n\\
if (! SMALL_INT (temp2))
temp2 = force_reg (DImode, temp2);
emit_move_insn (operands[0], gen_rtx (PLUS, DImode, temp, temp2));
emit_move_insn (operands[0], gen_rtx_PLUS (DImode, temp, temp2));
DONE;
}
@ -4972,10 +4972,10 @@ move\\t%0,%z4\\n\\
"TARGET_64BIT"
"
{
rtx scratch = gen_rtx (REG, DImode,
(REGNO (operands[0]) == REGNO (operands[2])
? REGNO (operands[2]) + 1
: REGNO (operands[2])));
rtx scratch = gen_rtx_REG (DImode,
(REGNO (operands[0]) == REGNO (operands[2])
? REGNO (operands[2]) + 1
: REGNO (operands[2])));
if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == HILO_REGNUM)
{
@ -4985,7 +4985,7 @@ move\\t%0,%z4\\n\\
rtx addr = find_replacement (&XEXP (operands[1], 0));
rtx op1 = change_address (operands[1], VOIDmode, addr);
scratch = gen_rtx (REG, SImode, REGNO (scratch));
scratch = gen_rtx_REG (SImode, REGNO (scratch));
memword = change_address (op1, SImode, NULL_RTX);
offword = change_address (adj_offsettable_operand (op1, 4),
SImode, NULL_RTX);
@ -5000,7 +5000,7 @@ move\\t%0,%z4\\n\\
loword = memword;
}
emit_move_insn (scratch, hiword);
emit_move_insn (gen_rtx (REG, SImode, 64), scratch);
emit_move_insn (gen_rtx_REG (SImode, 64), scratch);
emit_move_insn (scratch, loword);
emit_move_insn (gen_rtx (REG, SImode, 65), scratch);
emit_insn (gen_rtx_USE (VOIDmode, operands[0]));
@ -5008,7 +5008,7 @@ move\\t%0,%z4\\n\\
else
{
emit_insn (gen_ashrdi3 (scratch, operands[1], GEN_INT (32)));
emit_insn (gen_movdi (gen_rtx (REG, DImode, 64), scratch));
emit_insn (gen_movdi (gen_rtx_REG (DImode, 64), scratch));
emit_insn (gen_ashldi3 (scratch, operands[1], GEN_INT (32)));
emit_insn (gen_ashrdi3 (scratch, scratch, GEN_INT (32)));
emit_insn (gen_movdi (gen_rtx (REG, DImode, 65), scratch));
@ -5018,10 +5018,10 @@ move\\t%0,%z4\\n\\
}
if (GET_CODE (operands[1]) == REG && REGNO (operands[1]) == HILO_REGNUM)
{
emit_insn (gen_movdi (scratch, gen_rtx (REG, DImode, 65)));
emit_insn (gen_movdi (scratch, gen_rtx_REG (DImode, 65)));
emit_insn (gen_ashldi3 (scratch, scratch, GEN_INT (32)));
emit_insn (gen_lshrdi3 (scratch, scratch, GEN_INT (32)));
emit_insn (gen_movdi (operands[0], gen_rtx (REG, DImode, 64)));
emit_insn (gen_movdi (operands[0], gen_rtx_REG (DImode, 64)));
emit_insn (gen_ashldi3 (operands[0], operands[0], GEN_INT (32)));
emit_insn (gen_iordi3 (operands[0], operands[0], scratch));
emit_insn (gen_rtx_USE (VOIDmode, operands[1]));
@ -5065,7 +5065,7 @@ move\\t%0,%z4\\n\\
rtx addr = find_replacement (&XEXP (operands[0], 0));
rtx op0 = change_address (operands[0], VOIDmode, addr);
scratch = gen_rtx (REG, SImode, REGNO (operands[2]));
scratch = gen_rtx_REG (SImode, REGNO (operands[2]));
memword = change_address (op0, SImode, NULL_RTX);
offword = change_address (adj_offsettable_operand (op0, 4),
SImode, NULL_RTX);
@ -5079,9 +5079,9 @@ move\\t%0,%z4\\n\\
hiword = offword;
loword = memword;
}
emit_move_insn (scratch, gen_rtx (REG, SImode, 64));
emit_move_insn (scratch, gen_rtx_REG (SImode, 64));
emit_move_insn (hiword, scratch);
emit_move_insn (scratch, gen_rtx (REG, SImode, 65));
emit_move_insn (scratch, gen_rtx_REG (SImode, 65));
emit_move_insn (loword, scratch);
emit_insn (gen_rtx_USE (VOIDmode, operands[1]));
}
@ -5151,10 +5151,10 @@ move\\t%0,%z4\\n\\
rtx tem = ((reload_in_progress | reload_completed)
? operands[0] : gen_reg_rtx (mode));
emit_insn (gen_rtx (SET, VOIDmode, tem,
gen_rtx (HIGH, mode, operands[1])));
emit_insn (gen_rtx_SET (VOIDmode, tem,
gen_rtx_HIGH (mode, operands[1])));
operands[1] = gen_rtx (LO_SUM, mode, tem, operands[1]);
operands[1] = gen_rtx_LO_SUM (mode, tem, operands[1]);
}
/* If we are generating embedded PIC code, and we are referring to a
@ -5168,8 +5168,8 @@ move\\t%0,%z4\\n\\
rtx temp;
temp = embedded_pic_offset (operands[1]);
temp = gen_rtx (PLUS, Pmode, embedded_pic_fnaddr_rtx,
force_reg (SImode, temp));
temp = gen_rtx_PLUS (Pmode, embedded_pic_fnaddr_rtx,
force_reg (SImode, temp));
emit_move_insn (operands[0], force_reg (SImode, temp));
DONE;
}
@ -5184,7 +5184,7 @@ move\\t%0,%z4\\n\\
if (! SMALL_INT (temp2))
temp2 = force_reg (SImode, temp2);
emit_move_insn (operands[0], gen_rtx (PLUS, SImode, temp, temp2));
emit_move_insn (operands[0], gen_rtx_PLUS (SImode, temp, temp2));
DONE;
}
@ -5429,7 +5429,7 @@ move\\t%0,%z4\\n\\
if (TARGET_64BIT
&& GET_CODE (operands[0]) == REG && REGNO (operands[0]) == HILO_REGNUM)
{
emit_insn (gen_movsi (gen_rtx (REG, SImode, 65), operands[1]));
emit_insn (gen_movsi (gen_rtx_REG (SImode, 65), operands[1]));
emit_insn (gen_ashrsi3 (operands[2], operands[1], GEN_INT (31)));
emit_insn (gen_movsi (gen_rtx (REG, SImode, 64), operands[2]));
emit_insn (gen_rtx_USE (VOIDmode, operands[0]));
@ -5596,17 +5596,17 @@ move\\t%0,%z4\\n\\
if (GET_CODE (operands[1]) == MEM)
source = change_address (operands[1], SFmode, NULL_RTX);
else if (GET_CODE (operands[1]) == REG || GET_CODE (operands[1]) == SUBREG)
source = gen_rtx (REG, SFmode, true_regnum (operands[1]));
source = gen_rtx_REG (SFmode, true_regnum (operands[1]));
else
source = operands[1];
fp1 = gen_rtx (REG, SFmode, REGNO (operands[2]));
fp2 = gen_rtx (REG, SFmode, REGNO (operands[2]) + 1);
fp1 = gen_rtx_REG (SFmode, REGNO (operands[2]));
fp2 = gen_rtx_REG (SFmode, REGNO (operands[2]) + 1);
emit_insn (gen_move_insn (fp1, source));
emit_insn (gen_move_insn (fp2, gen_rtx (REG, SFmode, 0)));
emit_insn (gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (LT, CCmode, fp2, fp1)));
emit_insn (gen_move_insn (fp2, gen_rtx_REG (SFmode, 0)));
emit_insn (gen_rtx_SET (VOIDmode, operands[0],
gen_rtx_LT (CCmode, fp2, fp1)));
DONE;
}")
@ -5692,7 +5692,7 @@ move\\t%0,%z4\\n\\
(define_insn ""
[(set (mem:SF (plus:SI (match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")))
(match_operand:SF 0 "register_operand" "=f"))]
(match_operand:SF 0 "register_operand" "f"))]
"mips_isa >= 4 && TARGET_HARD_FLOAT"
"swxc1\\t%0,%1(%2)"
[(set_attr "type" "store")
@ -5701,7 +5701,7 @@ move\\t%0,%z4\\n\\
(define_insn ""
[(set (mem:SF (plus:DI (match_operand:DI 1 "se_register_operand" "d")
(match_operand:DI 2 "se_register_operand" "d")))
(match_operand:SF 0 "register_operand" "=f"))]
(match_operand:SF 0 "register_operand" "f"))]
"mips_isa >= 4 && TARGET_HARD_FLOAT"
"swxc1\\t%0,%1(%2)"
[(set_attr "type" "store")
@ -5710,7 +5710,7 @@ move\\t%0,%z4\\n\\
(define_insn ""
[(set (mem:DF (plus:SI (match_operand:SI 1 "register_operand" "d")
(match_operand:SI 2 "register_operand" "d")))
(match_operand:DF 0 "register_operand" "=f"))]
(match_operand:DF 0 "register_operand" "f"))]
"mips_isa >= 4 && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
"sdxc1\\t%0,%1(%2)"
[(set_attr "type" "store")
@ -5719,7 +5719,7 @@ move\\t%0,%z4\\n\\
(define_insn ""
[(set (mem:DF (plus:DI (match_operand:DI 1 "se_register_operand" "d")
(match_operand:DI 2 "se_register_operand" "d")))
(match_operand:DF 0 "register_operand" "=f"))]
(match_operand:DF 0 "register_operand" "f"))]
"mips_isa >= 4 && TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
"sdxc1\\t%0,%1(%2)"
[(set_attr "type" "store")
@ -6551,9 +6551,9 @@ move\\t%0,%z4\\n\\
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = const0_rtx;
operands[5] = GEN_INT (((-amount) & 31));
operands[5] = GEN_INT ((-amount) & 31);
return \"sll\\t%M0,%M1,%2\;srl\\t%3,%L1,%5\;or\\t%M0,%M0,%3\;sll\\t%L0,%L1,%2\";
}"
@ -6592,8 +6592,8 @@ move\\t%0,%z4\\n\\
"
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[4] = GEN_INT (((-amount) & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = GEN_INT ((-amount) & 31);
}")
@ -6627,8 +6627,8 @@ move\\t%0,%z4\\n\\
"
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[4] = GEN_INT (((-amount) & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = GEN_INT ((-amount) & 31);
}")
@ -6905,8 +6905,8 @@ move\\t%0,%z4\\n\\
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[4] = GEN_INT (((-amount) & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = GEN_INT ((-amount) & 31);
return \"srl\\t%L0,%L1,%2\;sll\\t%3,%M1,%4\;or\\t%L0,%L0,%3\;sra\\t%M0,%M1,%2\";
}"
@ -6945,8 +6945,8 @@ move\\t%0,%z4\\n\\
"
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[4] = GEN_INT (((-amount) & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = GEN_INT ((-amount) & 31);
}")
@ -6980,8 +6980,8 @@ move\\t%0,%z4\\n\\
"
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[4] = GEN_INT (((-amount) & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = GEN_INT ((-amount) & 31);
}")
@ -7290,8 +7290,8 @@ move\\t%0,%z4\\n\\
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[4] = GEN_INT (((-amount) & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = GEN_INT ((-amount) & 31);
return \"srl\\t%L0,%L1,%2\;sll\\t%3,%M1,%4\;or\\t%L0,%L0,%3\;srl\\t%M0,%M1,%2\";
}"
@ -7330,8 +7330,8 @@ move\\t%0,%z4\\n\\
"
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[4] = GEN_INT (((-amount) & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = GEN_INT ((-amount) & 31);
}")
@ -7365,8 +7365,8 @@ move\\t%0,%z4\\n\\
"
{
int amount = INTVAL (operands[2]);
operands[2] = GEN_INT ((amount & 31));
operands[4] = GEN_INT (((-amount) & 31));
operands[2] = GEN_INT (amount & 31);
operands[4] = GEN_INT ((-amount) & 31);
}")
@ -8775,7 +8775,7 @@ move\\t%0,%z4\\n\\
"!TARGET_MIPS16 && INTVAL (operands[2]) < 32767"
"*
{
operands[2] = GEN_INT (INTVAL (operands[2])+1);
operands[2] = GEN_INT (INTVAL (operands[2]) + 1);
return \"sltu\\t%0,%1,%2\";
}"
[(set_attr "type" "arith")
@ -8804,7 +8804,7 @@ move\\t%0,%z4\\n\\
"TARGET_64BIT && !TARGET_MIPS16 && INTVAL (operands[2]) < 32767"
"*
{
operands[2] = GEN_INT (INTVAL (operands[2])+1);
operands[2] = GEN_INT (INTVAL (operands[2]) + 1);
return \"sltu\\t%0,%1,%2\";
}"
[(set_attr "type" "arith")
@ -9514,8 +9514,8 @@ move\\t%0,%z4\\n\\
}
emit_call_insn (gen_call_internal0 (operands[0], operands[1],
gen_rtx (REG, SImode, GP_REG_FIRST + 31)));
gen_rtx_REG (SImode,
GP_REG_FIRST + 31)));
DONE;
}
}")
@ -9694,7 +9694,7 @@ move\\t%0,%z4\\n\\
(XEXP (XVECEXP (operands[0], 0, 0), 0),
operands[1], operands[2],
XEXP (XVECEXP (operands[0], 0, 1), 0),
gen_rtx (REG, SImode, GP_REG_FIRST + 31)));
gen_rtx_REG (SImode, GP_REG_FIRST + 31)));
DONE;
}
@ -9704,7 +9704,8 @@ move\\t%0,%z4\\n\\
operands[0] = XEXP (XVECEXP (operands[0], 0, 0), 0);
emit_call_insn (gen_call_value_internal0 (operands[0], operands[1], operands[2],
gen_rtx (REG, SImode, GP_REG_FIRST + 31)));
gen_rtx_REG (SImode,
GP_REG_FIRST + 31)));
DONE;
}
@ -9945,7 +9946,7 @@ move\\t%0,%z4\\n\\
;; "
;; {
;; operands[0] = gen_reg_rtx (SImode);
;; operands[1] = gen_rtx (MEM, SImode, stack_pointer_rtx);
;; operands[1] = gen_rtx_MEM (SImode, stack_pointer_rtx);
;; MEM_VOLATILE_P (operands[1]) = TRUE;
;;
;; /* fall through and generate default code */

63
gcc/config/mn10200/mn10200.c
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Matsushita MN10200 series
Copyright (C) 1997 Free Software Foundation, Inc.
Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "tree.h"
#include "regs.h"
@ -276,7 +276,7 @@ print_operand (file, x, code)
if (GET_CODE (x) != MEM)
abort ();
if (GET_CODE (XEXP (x, 0)) == REG)
x = gen_rtx (PLUS, PSImode, XEXP (x, 0), GEN_INT (0));
x = gen_rtx_PLUS (PSImode, XEXP (x, 0), GEN_INT (0));
else
x = XEXP (x, 0);
fputc ('(', file);
@ -595,12 +595,12 @@ expand_prologue ()
if (!regs_ever_live[2])
{
regs_ever_live[2] = 1;
zero_dreg = gen_rtx (REG, HImode, 2);
zero_dreg = gen_rtx_REG (HImode, 2);
}
if (!regs_ever_live[3])
{
regs_ever_live[3] = 1;
zero_dreg = gen_rtx (REG, HImode, 3);
zero_dreg = gen_rtx_REG (HImode, 3);
}
}
@ -612,12 +612,12 @@ expand_prologue ()
if (!regs_ever_live[5])
{
regs_ever_live[5] = 1;
zero_areg = gen_rtx (REG, HImode, 5);
zero_areg = gen_rtx_REG (HImode, 5);
}
if (!regs_ever_live[6])
{
regs_ever_live[6] = 1;
zero_areg = gen_rtx (REG, HImode, 6);
zero_areg = gen_rtx_REG (HImode, 6);
}
}
@ -639,14 +639,14 @@ expand_prologue ()
{
emit_insn (gen_addpsi3 (stack_pointer_rtx, stack_pointer_rtx,
GEN_INT (-4)));
emit_move_insn (gen_rtx (MEM, PSImode, stack_pointer_rtx),
gen_rtx (REG, PSImode, STATIC_CHAIN_REGNUM));
emit_move_insn (gen_rtx_MEM (PSImode, stack_pointer_rtx),
gen_rtx_REG (PSImode, STATIC_CHAIN_REGNUM));
}
if (frame_pointer_needed)
{
/* Store a2 into a0 temporarily. */
emit_move_insn (gen_rtx (REG, PSImode, 4), frame_pointer_rtx);
emit_move_insn (gen_rtx_REG (PSImode, 4), frame_pointer_rtx);
/* Set up the frame pointer. */
emit_move_insn (frame_pointer_rtx, stack_pointer_rtx);
@ -671,11 +671,10 @@ expand_prologue ()
register 4 (a0). */
regno = (i == FRAME_POINTER_REGNUM && frame_pointer_needed) ? 4 : i;
emit_move_insn (gen_rtx (MEM, PSImode,
gen_rtx (PLUS, Pmode,
stack_pointer_rtx,
GEN_INT (offset))),
gen_rtx (REG, PSImode, regno));
emit_move_insn (gen_rtx_MEM (PSImode,
plus_constant (stack_pointer_rtx,
offset)),
gen_rtx_REG (PSImode, regno));
offset += 4;
}
}
@ -684,10 +683,10 @@ expand_prologue ()
expects to find it. */
if (current_function_needs_context)
{
emit_move_insn (gen_rtx (REG, PSImode, STATIC_CHAIN_REGNUM),
emit_move_insn (gen_rtx_REG (PSImode, STATIC_CHAIN_REGNUM),
gen_rtx (MEM, PSImode,
gen_rtx (PLUS, PSImode, stack_pointer_rtx,
GEN_INT (size))));
gen_rtx_PLUS (PSImode, stack_pointer_rtx,
GEN_INT (size))));
}
}
@ -765,11 +764,9 @@ expand_epilogue ()
regno = ((i == FRAME_POINTER_REGNUM && frame_pointer_needed)
? temp_regno : i);
emit_move_insn (gen_rtx (REG, PSImode, regno),
gen_rtx (MEM, PSImode,
gen_rtx (PLUS, Pmode,
basereg,
GEN_INT (offset))));
emit_move_insn (gen_rtx_REG (PSImode, regno),
gen_rtx_MEM (PSImode,
plus_constant (basereg, offset)));
offset += 4;
}
}
@ -779,7 +776,7 @@ expand_epilogue ()
/* Deallocate this frame's stack. */
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
/* Restore the old frame pointer. */
emit_move_insn (frame_pointer_rtx, gen_rtx (REG, PSImode, temp_regno));
emit_move_insn (frame_pointer_rtx, gen_rtx_REG (PSImode, temp_regno));
}
else if (size)
{
@ -973,14 +970,14 @@ expand_a_shift (mode, code, operands)
/* need a loop to get all the bits we want - we generate the
code at emit time, but need to allocate a scratch reg now */
emit_insn (gen_rtx
(PARALLEL, VOIDmode,
emit_insn (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2,
gen_rtx (SET, VOIDmode, operands[0],
gen_rtx (code, mode,
operands[0], operands[2])),
gen_rtx (CLOBBER, VOIDmode,
gen_rtx (SCRATCH, HImode, 0)))));
gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (code, mode,
operands[0], operands[2])),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (HImode)))));
return 1;
}
@ -1375,10 +1372,10 @@ function_arg (cum, mode, type, named)
switch (cum->nbytes / UNITS_PER_WORD)
{
case 0:
result = gen_rtx (REG, mode, 0);
result = gen_rtx_REG (mode, 0);
break;
case 1:
result = gen_rtx (REG, mode, 1);
result = gen_rtx_REG (mode, 1);
break;
default:
result = 0;

16
gcc/config/mn10200/mn10200.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Matsushita MN10200 series
Copyright (C) 1997 Free Software Foundation, Inc.
Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
@ -528,12 +528,12 @@ extern struct rtx_def *mn10200_va_arg();
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), TYPE_MODE (VALTYPE) == PSImode ? 4 : 0)
gen_rtx_REG (TYPE_MODE (VALTYPE), TYPE_MODE (VALTYPE) == PSImode ? 4 : 0)
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, (MODE) == PSImode ? 4 : 0)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, (MODE) == PSImode ? 4 : 0)
/* 1 if N is a possible register number for a function value. */
@ -594,9 +594,9 @@ extern struct rtx_def *mn10200_va_arg();
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, PSImode, plus_constant ((TRAMP), 20)), \
emit_move_insn (gen_rtx_MEM (PSImode, plus_constant ((TRAMP), 20)), \
(CXT)); \
emit_move_insn (gen_rtx (MEM, PSImode, plus_constant ((TRAMP), 24)), \
emit_move_insn (gen_rtx_MEM (PSImode, plus_constant ((TRAMP), 24)), \
(FNADDR)); \
}
@ -605,7 +605,7 @@ extern struct rtx_def *mn10200_va_arg();
#define RETURN_ADDR_RTX(COUNT, FRAME) \
((COUNT == 0) \
? gen_rtx (MEM, Pmode, frame_pointer_rtx) \
? gen_rtx_MEM (Pmode, frame_pointer_rtx) \
: (rtx) 0)
@ -1051,9 +1051,9 @@ do { char dstr[30]; \
#define INIT_TARGET_OPTABS \
do { \
sdiv_optab->handlers[(int) HImode].libfunc \
= gen_rtx (SYMBOL_REF, Pmode, DIVHI3_LIBCALL); \
= gen_rtx_SYMBOL_REF (Pmode, DIVHI3_LIBCALL); \
smod_optab->handlers[(int) HImode].libfunc \
= gen_rtx (SYMBOL_REF, Pmode, MODHI3_LIBCALL); \
= gen_rtx_SYMBOL_REF (Pmode, MODHI3_LIBCALL); \
} while (0)
/* The assembler op to get a word. */

66
gcc/config/mn10200/mn10200.md
View File

@ -1,6 +1,5 @@
;; GCC machine description for Matsushita MN10200
;; Copyright (C) 1997, 1998 Free Software Foundation, Inc.
;; Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
;; Contributed by Jeff Law (law@cygnus.com).
;; This file is part of GNU CC.
@ -401,13 +400,13 @@
rtx ret, insns;
start_sequence ();
ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__addsi3\"),
ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__addsi3\"),
NULL_RTX, 1, SImode, 2, operands[1],
SImode, operands[2], SImode);
insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, operands[0], ret,
gen_rtx (PLUS, SImode, operands[1], operands[2]));
gen_rtx_PLUS (SImode, operands[1], operands[2]));
DONE;
}
else
@ -478,13 +477,13 @@
rtx ret, insns;
start_sequence ();
ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__subsi3\"),
ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__subsi3\"),
NULL_RTX, 1, SImode, 2, operands[1],
SImode, operands[2], SImode);
insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, operands[0], ret,
gen_rtx (MINUS, SImode, operands[1], operands[2]));
gen_rtx_MINUS (SImode, operands[1], operands[2]));
DONE;
}
else
@ -1275,9 +1274,9 @@
emit_move_insn (operands[0], operands[1]);
while (count > 0)
{
emit_insn (gen_rtx (SET, HImode, operands[0],
gen_rtx (ASHIFT, HImode,
operands[0], GEN_INT (1))));
emit_insn (gen_rtx_SET (HImode, operands[0],
gen_rtx_ASHIFT (HImode,
operands[0], GEN_INT (1))));
count--;
}
DONE;
@ -1314,9 +1313,10 @@
emit_move_insn (operands[0], operands[1]);
while (count > 0)
{
emit_insn (gen_rtx (SET, HImode, operands[0],
gen_rtx (LSHIFTRT, HImode,
operands[0], GEN_INT (1))));
emit_insn (gen_rtx_SET (HImode, operands[0],
gen_rtx_LSHIFTRT (HImode,
operands[0],
GEN_INT (1))));
count--;
}
DONE;
@ -1353,9 +1353,9 @@
emit_move_insn (operands[0], operands[1]);
while (count > 0)
{
emit_insn (gen_rtx (SET, HImode, operands[0],
gen_rtx (ASHIFTRT, HImode,
operands[0], GEN_INT (1))));
emit_insn (gen_rtx_SET (HImode, operands[0],
gen_rtx_ASHIFTRT (HImode, operands[0],
GEN_INT (1))));
count--;
}
DONE;
@ -1407,9 +1407,9 @@
emit_move_insn (operands[0], operands[1]);
while (count > 0)
{
emit_insn (gen_rtx (SET, PSImode, operands[0],
gen_rtx (ASHIFT, PSImode,
operands[0], GEN_INT (1))));
emit_insn (gen_rtx_SET (PSImode, operands[0],
gen_rtx_ASHIFT (PSImode,
operands[0], GEN_INT (1))));
count--;
}
DONE;
@ -1484,9 +1484,9 @@
emit_move_insn (operands[0], operands[1]);
while (count > 0)
{
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (ASHIFT, SImode,
operands[0], GEN_INT (1))));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_ASHIFT (SImode,
operands[0], GEN_INT (1))));
count--;
}
DONE;
@ -1498,13 +1498,13 @@
rtx ret, insns;
start_sequence ();
ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__ashlsi3\"),
ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__ashlsi3\"),
NULL_RTX, 1, SImode, 2, operands[1],
SImode, operands[2], HImode);
insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, operands[0], ret,
gen_rtx (ASHIFT, SImode, operands[1], operands[2]));
gen_rtx_ASHIFT (SImode, operands[1], operands[2]));
DONE;
}
else
@ -1542,9 +1542,9 @@
emit_move_insn (operands[0], operands[1]);
while (count > 0)
{
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (LSHIFTRT, SImode,
operands[0], GEN_INT (1))));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_LSHIFTRT (SImode, operands[0],
GEN_INT (1))));
count--;
}
DONE;
@ -1556,13 +1556,13 @@
rtx ret, insns;
start_sequence ();
ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__lshrsi3\"),
ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__lshrsi3\"),
NULL_RTX, 1, SImode, 2, operands[1],
SImode, operands[2], HImode);
insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, operands[0], ret,
gen_rtx (LSHIFTRT, SImode, operands[1], operands[2]));
gen_rtx_LSHIFTRT (SImode, operands[1], operands[2]));
DONE;
}
else
@ -1600,9 +1600,9 @@
emit_move_insn (operands[0], operands[1]);
while (count > 0)
{
emit_insn (gen_rtx (SET, SImode, operands[0],
gen_rtx (ASHIFTRT, SImode,
operands[0], GEN_INT (1))));
emit_insn (gen_rtx_SET (SImode, operands[0],
gen_rtx_ASHIFTRT (SImode, operands[0],
GEN_INT (1))));
count--;
}
DONE;
@ -1614,13 +1614,13 @@
rtx ret, insns;
start_sequence ();
ret = emit_library_call_value (gen_rtx (SYMBOL_REF, Pmode, \"__ashrsi3\"),
ret = emit_library_call_value (gen_rtx_SYMBOL_REF (Pmode, \"__ashrsi3\"),
NULL_RTX, 1, SImode, 2, operands[1],
SImode, operands[2], HImode);
insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, operands[0], ret,
gen_rtx (ASHIFTRT, SImode, operands[1], operands[2]));
gen_rtx_ASHIFTRT (SImode, operands[1], operands[2]));
DONE;
}
else

9
gcc/config/mn10200/xm-mn10200.h
View File

@ -1,5 +1,5 @@
/* Configuration for Matsushita MN10200.
Copyright (C) 1997 Free Software Foundation, Inc.
Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
@ -38,10 +38,3 @@ Boston, MA 02111-1307, USA. */
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
#ifndef __STDC__
extern char *malloc (), *realloc (), *calloc ();
#else
extern void *malloc (), *realloc (), *calloc ();
#endif
extern void free ();

32
gcc/config/mn10300/mn10300.c
View File

@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Matsushita MN10300 series
Copyright (C) 1996, 1997 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
@ -20,7 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#include "config.h"
#include <stdio.h>
#include "system.h"
#include "rtl.h"
#include "tree.h"
#include "regs.h"
@ -233,7 +233,7 @@ print_operand (file, x, code)
case 'A':
fputc ('(', file);
if (GET_CODE (XEXP (x, 0)) == REG)
output_address (gen_rtx (PLUS, SImode, XEXP (x, 0), GEN_INT (0)));
output_address (gen_rtx_PLUS (SImode, XEXP (x, 0), GEN_INT (0)));
else
output_address (XEXP (x, 0));
fputc (')', file);
@ -314,9 +314,9 @@ print_operand_address (file, addr)
{
case REG:
if (addr == stack_pointer_rtx)
print_operand_address (file, gen_rtx (PLUS, SImode,
stack_pointer_rtx,
GEN_INT (0)));
print_operand_address (file, gen_rtx_PLUS (SImode,
stack_pointer_rtx,
GEN_INT (0)));
else
print_operand (file, addr, 0);
break;
@ -376,14 +376,12 @@ expand_prologue ()
need to be flushed back to the stack. */
if (current_function_varargs)
{
emit_move_insn (gen_rtx (MEM, SImode,
gen_rtx (PLUS, Pmode, stack_pointer_rtx,
GEN_INT (4))),
gen_rtx (REG, SImode, 0));
emit_move_insn (gen_rtx (MEM, SImode,
gen_rtx (PLUS, Pmode, stack_pointer_rtx,
GEN_INT (8))),
gen_rtx (REG, SImode, 1));
emit_move_insn (gen_rtx_MEM (SImode,
plus_constant (stack_pointer_rtx, 4)),
gen_rtx_REG (SImode, 0));
emit_move_insn (gen_rtx_MEM (SImode,
plus_constant (stack_pointer_rtx, 8)),
gen_rtx_REG (SImode, 1));
}
/* And now store all the registers onto the stack with a
@ -747,10 +745,10 @@ function_arg (cum, mode, type, named)
switch (cum->nbytes / UNITS_PER_WORD)
{
case 0:
result = gen_rtx (REG, mode, 0);
result = gen_rtx_REG (mode, 0);
break;
case 1:
result = gen_rtx (REG, mode, 1);
result = gen_rtx_REG (mode, 1);
break;
default:
result = 0;
@ -995,7 +993,7 @@ legitimize_address (x, oldx, mode)
regy2 = force_reg (Pmode, force_operand (XEXP (y, 1), 0));
regx1 = force_reg (Pmode,
gen_rtx (GET_CODE (y), Pmode, regx1, regy2));
return force_reg (Pmode, gen_rtx (PLUS, Pmode, regx1, regy1));
return force_reg (Pmode, gen_rtx_PLUS (Pmode, regx1, regy1));
}
}
return x;

12
gcc/config/mn10300/mn10300.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. Matsushita MN10300 series
Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GNU CC.
@ -485,12 +485,12 @@ extern struct rtx_def *function_arg ();
otherwise, FUNC is 0. */
#define FUNCTION_VALUE(VALTYPE, FUNC) \
gen_rtx (REG, TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0)
gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) ? 4 : 0)
/* Define how to find the value returned by a library function
assuming the value has mode MODE. */
#define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
/* 1 if N is a possible register number for a function value. */
@ -544,9 +544,9 @@ extern struct rtx_def *function_arg ();
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 0x14)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \
(CXT)); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant ((TRAMP), 0x18)), \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \
(FNADDR)); \
}
/* A C expression whose value is RTL representing the value of the return
@ -560,7 +560,7 @@ extern struct rtx_def *function_arg ();
#define RETURN_ADDR_RTX(COUNT, FRAME) \
((COUNT == 0) \
? gen_rtx (MEM, Pmode, arg_pointer_rtx) \
? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
: (rtx) 0)
/* Emit code for a call to builtin_saveregs. We must emit USE insns which

21
gcc/config/mn10300/mn10300.md
View File

@ -1,7 +1,6 @@
;; GCC machine description for Matsushita MN10300
;; Copyright (C) 1996, 1997 Free Software Foundation, Inc.
;; Contributed by Jeff Law (law@cygnus.com).
;; Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
;; Contributed by Jeff Law (law@cygnus.com).
;; This file is part of GNU CC.
@ -159,8 +158,9 @@
&& (GET_MODE_SIZE (GET_MODE (XEXP (operands[1], 1)))
> GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (operands[1], 1))))))
emit_move_insn (operands[2],
gen_rtx (ZERO_EXTEND, GET_MODE (XEXP (operands[1], 1)),
SUBREG_REG (XEXP (operands[1], 1))));
gen_rtx_ZERO_EXTEND
(GET_MODE (XEXP (operands[1], 1)),
SUBREG_REG (XEXP (operands[1], 1))));
else
emit_move_insn (operands[2], XEXP (operands[1], 1));
emit_move_insn (operands[0], XEXP (operands[1], 0));
@ -171,8 +171,9 @@
&& (GET_MODE_SIZE (GET_MODE (XEXP (operands[1], 0)))
> GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (operands[1], 0))))))
emit_move_insn (operands[2],
gen_rtx (ZERO_EXTEND, GET_MODE (XEXP (operands[1], 0)),
SUBREG_REG (XEXP (operands[1], 0))));
gen_rtx_ZERO_EXTEND
(GET_MODE (XEXP (operands[1], 0)),
SUBREG_REG (XEXP (operands[1], 0))));
else
emit_move_insn (operands[2], XEXP (operands[1], 0));
emit_move_insn (operands[0], XEXP (operands[1], 1));
@ -344,7 +345,7 @@
if (GET_CODE (temp) != REG)
abort ();
if (reg_overlap_mentioned_p (gen_rtx (REG, SImode, REGNO (temp)),
if (reg_overlap_mentioned_p (gen_rtx_REG (SImode, REGNO (temp)),
XEXP (operands[1], 0)))
return \"mov %H1,%H0\;mov %L1,%L0\";
else
@ -476,7 +477,7 @@
if (GET_CODE (temp) != REG)
abort ();
if (reg_overlap_mentioned_p (gen_rtx (REG, SImode, REGNO (temp)),
if (reg_overlap_mentioned_p (gen_rtx_REG (SImode, REGNO (temp)),
XEXP (operands[1], 0)))
return \"mov %H1,%H0\;mov %L1,%L0\";
else
@ -586,7 +587,7 @@
&& GET_CODE (operands[2]) != CONST_INT)
{
rtx temp = gen_reg_rtx (SImode);
emit_move_insn (temp, gen_rtx (PLUS, SImode, operands[1], operands[2]));
emit_move_insn (temp, gen_rtx_PLUS (SImode, operands[1], operands[2]));
emit_move_insn (operands[0], temp);
DONE;
}

9
gcc/config/mn10300/xm-mn10300.h
View File

@ -1,5 +1,5 @@
/* Configuration for Matsushita MN10300.
Copyright (C) 1996 Free Software Foundation, Inc.
Copyright (C) 1996, 1998, 1999 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
@ -38,10 +38,3 @@ Boston, MA 02111-1307, USA. */
tm.h is a symbolic link to the actual target specific file. */
#include "tm.h"
#ifndef __STDC__
extern char *malloc (), *realloc (), *calloc ();
#else
extern void *malloc (), *realloc (), *calloc ();
#endif
extern void free ();

25
gcc/config/ns32k/ns32k.c
View File

@ -1,5 +1,5 @@
/* Subroutines for assembler code output on the NS32000.
Copyright (C) 1988, 1994, 1995, 1996, 1997 Free Software Foundation, Inc.
Copyright (C) 1988, 94, 95, 96, 97, 98, 1999 Free Software Foundation, Inc.
This file is part of GNU CC.
@ -18,7 +18,6 @@ along with GNU CC; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
/* Some output-actions in ns32k.md need these. */
#include "config.h"
#include "system.h"
#include "rtl.h"
@ -208,10 +207,10 @@ gen_indexed_expr (base, index, scale)
/* This generates an invalid addressing mode, if BASE is
fp or sp. This is handled by PRINT_OPERAND_ADDRESS. */
if (GET_CODE (base) != REG && GET_CODE (base) != CONST_INT)
base = gen_rtx (MEM, SImode, base);
addr = gen_rtx (MULT, SImode, index,
GEN_INT (1 << INTVAL (scale)));
addr = gen_rtx (PLUS, SImode, base, addr);
base = gen_rtx_MEM (SImode, base);
addr = gen_rtx_MULT (SImode, index,
GEN_INT (1 << INTVAL (scale)));
addr = gen_rtx_PLUS (SImode, base, addr);
return addr;
}
@ -246,8 +245,8 @@ split_di (operands, num, lo_half, hi_half)
{
if (GET_CODE (operands[num]) == REG)
{
lo_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]));
hi_half[num] = gen_rtx (REG, SImode, REGNO (operands[num]) + 1);
lo_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]));
hi_half[num] = gen_rtx_REG (SImode, REGNO (operands[num]) + 1);
}
else if (CONSTANT_P (operands[num]))
{
@ -324,14 +323,14 @@ output_move_double (operands)
operands in OPERANDS to be suitable for the low-numbered word. */
if (optype0 == REGOP)
latehalf[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
latehalf[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
else if (optype0 == OFFSOP)
latehalf[0] = adj_offsettable_operand (operands[0], 4);
else
latehalf[0] = operands[0];
if (optype1 == REGOP)
latehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
latehalf[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
else if (optype1 == OFFSOP)
latehalf[1] = adj_offsettable_operand (operands[1], 4);
else if (optype1 == CNSTOP)
@ -382,7 +381,7 @@ output_move_double (operands)
xops[0] = XEXP (operands[1], 0);
xops[1] = operands[0];
output_asm_insn ("addr %a0,%1", xops);
operands[1] = gen_rtx (MEM, DImode, operands[0]);
operands[1] = gen_rtx_MEM (DImode, operands[0]);
latehalf[1] = adj_offsettable_operand (operands[1], 4);
/* The first half has the overlap, Do the late half first. */
output_asm_insn (singlemove_string (latehalf), latehalf);
@ -968,7 +967,7 @@ print_operand_address (file, addr)
case CONST_INT:
case LABEL_REF:
if (offset)
offset = gen_rtx (PLUS, SImode, tmp, offset);
offset = gen_rtx_PLUS (SImode, tmp, offset);
else
offset = tmp;
break;
@ -1063,7 +1062,7 @@ print_operand_address (file, addr)
case SYMBOL_REF:
case LABEL_REF:
if (offset)
offset = gen_rtx (PLUS, SImode, tmp, offset);
offset = gen_rtx_PLUS (SImode, tmp, offset);
else
offset = tmp;
break;

12
gcc/config/ns32k/ns32k.h
View File

@ -1,5 +1,5 @@
/* Definitions of target machine for GNU compiler. NS32000 version.
Copyright (C) 1988, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
Copyright (C) 1988, 93, 94-98, 1999 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com)
This file is part of GNU CC.
@ -587,8 +587,8 @@ enum reg_class
or perhaps F0 is there is fp support. */
#define LIBCALL_VALUE(MODE) \
gen_rtx (REG, MODE, \
FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM)
gen_rtx_REG (MODE, \
FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM)
/* Define this if PCC uses the nonreentrant convention for returning
structure and union values. */
@ -653,7 +653,7 @@ enum reg_class
It exists only to test register calling conventions. */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0)
/* For an arg passed partly in registers and partly in memory,
this is the number of registers used.
@ -941,8 +941,8 @@ operands on the 32k are stored). */
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
{ \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 12)), CXT); \
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 16)), FNADDR); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
}
/* This is the library routine that is used

39
gcc/config/ns32k/ns32k.md
View File

@ -1,5 +1,5 @@
;;- Machine description for GNU compiler, ns32000 Version
;; Copyright (C) 1988, 1994, 1996, 1999 Free Software Foundation, Inc.
;; Copyright (C) 1988, 1994, 1996, 1998, 1999 Free Software Foundation, Inc.
;; Contributed by Michael Tiemann (tiemann@cygnus.com)
;; This file is part of GNU CC.
@ -221,7 +221,7 @@
if (REG_P (operands[1]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"movd %1,tos\", xoperands);
output_asm_insn (\"movd %1,tos\", operands);
return \"movl tos,%0\";
@ -233,7 +233,7 @@
if (REG_P (operands[0]))
{
output_asm_insn (\"movl %1,tos\;movd tos,%0\", operands);
operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return \"movd tos,%0\";
}
else
@ -277,7 +277,7 @@
convrt.i[1] = CONST_DOUBLE_HIGH (operands[1]);
convrt.f = convrt.d;
/* Is there a better machine-independent way to do this? */
/* Is there a better machine-independent way to to this? */
operands[1] = GEN_INT (convrt.i[0]);
return \"movd %1,%0\";
}
@ -304,7 +304,7 @@
if (REG_P (operands[1]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn (\"movd %1,tos\", xoperands);
output_asm_insn (\"movd %1,tos\", operands);
return \"movl tos,%0\";
@ -316,7 +316,7 @@
if (REG_P (operands[0]))
{
output_asm_insn (\"movl %1,tos\;movd tos,%0\", operands);
operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return \"movd tos,%0\";
}
else
@ -357,8 +357,7 @@
&& REGNO (operands[0]) == FRAME_POINTER_REGNUM)
return \"lprd fp,%1\";
if (GET_CODE (operands[1]) == CONST_DOUBLE)
operands[1]
= GEN_INT (CONST_DOUBLE_LOW (operands[1]));
operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1]));
if (GET_CODE (operands[1]) == CONST_INT)
{
int i = INTVAL (operands[1]);
@ -437,8 +436,7 @@
if (i <= 7 && i >= -8)
{
if (INTVAL (operands[1]) > 7)
operands[1] =
GEN_INT (i);
operands[1] = GEN_INT (i);
return \"movqw %1,%0\";
}
return \"movw %1,%0\";
@ -483,8 +481,7 @@
if (char_val <= 7 && char_val >= -8)
{
if (INTVAL (operands[1]) > 7)
operands[1] =
GEN_INT (char_val);
operands[1] = GEN_INT (char_val);
return \"movqb %1,%0\";
}
return \"movb %1,%0\";
@ -1784,7 +1781,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1809,7 +1806,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1834,7 +1831,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1862,7 +1859,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1887,7 +1884,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1912,7 +1909,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1962,7 +1959,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -1987,7 +1984,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""
@ -2012,7 +2009,7 @@
"
{
if (GET_CODE (operands[2]) != CONST_INT)
operands[2] = gen_rtx (NEG, SImode, negate_rtx (SImode, operands[2]));
operands[2] = gen_rtx_NEG (SImode, negate_rtx (SImode, operands[2]));
}")
(define_insn ""

120
gcc/config/pa/pa.c
View File

@ -21,7 +21,6 @@ Boston, MA 02111-1307, USA. */
#include "config.h"
#include "system.h"
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
@ -662,8 +661,9 @@ legitimize_pic_address (orig, mode, reg)
}
else
pic_ref = gen_rtx_MEM (Pmode,
gen_rtx_PLUS (Pmode,
pic_offset_table_rtx, orig));
gen_rtx_PLUS (Pmode, pic_offset_table_rtx,
orig));
current_function_uses_pic_offset_table = 1;
RTX_UNCHANGING_P (pic_ref) = 1;
emit_move_insn (reg, pic_ref);
@ -803,16 +803,14 @@ hppa_legitimize_address (x, oldx, mode)
if (! VAL_14_BITS_P (newoffset)
&& GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
{
rtx const_part
= gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (Pmode,
XEXP (x, 0),
GEN_INT (newoffset)));
rtx const_part = plus_constant (XEXP (x, 0), newoffset);
rtx tmp_reg
= force_reg (Pmode,
gen_rtx_HIGH (Pmode, const_part));
ptr_reg
= force_reg (Pmode,
gen_rtx_LO_SUM (Pmode, tmp_reg, const_part));
gen_rtx_LO_SUM (Pmode,
tmp_reg, const_part));
}
else
{
@ -850,8 +848,9 @@ hppa_legitimize_address (x, oldx, mode)
reg2 = force_reg (Pmode, force_operand (reg2, 0));
return force_reg (Pmode, gen_rtx_PLUS (Pmode,
gen_rtx_MULT (Pmode, reg2,
GEN_INT (val)),
gen_rtx_MULT (Pmode,
reg2,
GEN_INT (val)),
reg1));
}
@ -926,11 +925,12 @@ hppa_legitimize_address (x, oldx, mode)
reg1 = force_reg (Pmode, gen_rtx_PLUS (Pmode, reg1, GEN_INT (val)));
/* We can now generate a simple scaled indexed address. */
return force_reg (Pmode,
gen_rtx_PLUS (Pmode,
gen_rtx_MULT (Pmode, reg1,
XEXP (XEXP (idx, 0), 1)),
base));
return
force_reg
(Pmode, gen_rtx_PLUS (Pmode,
gen_rtx_MULT (Pmode, reg1,
XEXP (XEXP (idx, 0), 1)),
base));
}
/* If B + C is still a valid base register, then add them. */
@ -948,7 +948,8 @@ hppa_legitimize_address (x, oldx, mode)
reg2 = force_reg (Pmode, force_operand (reg2, 0));
return force_reg (Pmode, gen_rtx_PLUS (Pmode,
gen_rtx_MULT (Pmode, reg2,
gen_rtx_MULT (Pmode,
reg2,
GEN_INT (val)),
reg1));
}
@ -1034,9 +1035,10 @@ hppa_legitimize_address (x, oldx, mode)
return force_reg (Pmode,
gen_rtx_PLUS (Pmode,
gen_rtx_MULT (Pmode, reg2,
gen_rtx_MULT (Pmode,
reg2,
GEN_INT (val)),
reg1));
reg1));
}
else if ((mode == DFmode || mode == SFmode)
&& GET_CODE (XEXP (y, 0)) == SYMBOL_REF
@ -1054,12 +1056,12 @@ hppa_legitimize_address (x, oldx, mode)
regx2 = force_reg (Pmode, force_operand (regx2, 0));
regx2 = force_reg (Pmode, gen_rtx_fmt_ee (GET_CODE (y), Pmode,
regx2, regx1));
return force_reg (Pmode,
gen_rtx_PLUS (Pmode,
gen_rtx_MULT (Pmode, regx2,
XEXP (XEXP (x, 0),
1)),
force_reg (Pmode, XEXP (y, 0))));
return
force_reg (Pmode,
gen_rtx_PLUS (Pmode,
gen_rtx_MULT (Pmode, regx2,
XEXP (XEXP (x, 0), 1)),
force_reg (Pmode, XEXP (y, 0))));
}
else if (GET_CODE (XEXP (y, 1)) == CONST_INT
&& INTVAL (XEXP (y, 1)) >= -4096
@ -1201,8 +1203,8 @@ emit_move_sequence (operands, mode, scratch_reg)
}
else
emit_move_insn (scratch_reg, XEXP (operand1, 0));
emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_MEM (mode,
scratch_reg)));
emit_insn (gen_rtx_SET (VOIDmode, operand0,
gen_rtx_MEM (mode, scratch_reg)));
return 1;
}
else if (fp_reg_operand (operand1, mode)
@ -1266,7 +1268,8 @@ emit_move_sequence (operands, mode, scratch_reg)
emit_move_sequence (xoperands, Pmode, 0);
/* Now load the destination register. */
emit_insn (gen_rtx_SET (mode, operand0, gen_rtx_MEM (mode, scratch_reg)));
emit_insn (gen_rtx_SET (mode, operand0,
gen_rtx_MEM (mode, scratch_reg)));
return 1;
}
/* Handle secondary reloads for SAR. These occur when trying to load
@ -1495,7 +1498,8 @@ emit_move_sequence (operands, mode, scratch_reg)
if (ishighonly)
set = gen_rtx_SET (mode, operand0, temp);
else
set = gen_rtx_SET (VOIDmode, operand0,
set = gen_rtx_SET (VOIDmode,
operand0,
gen_rtx_LO_SUM (mode, temp, operand1));
emit_insn (gen_rtx_SET (VOIDmode,
@ -2515,18 +2519,16 @@ remove_useless_addtr_insns (insns, check_notes)
Note in DISP > 8k case, we will leave the high part of the address
in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/
static void
store_reg (reg, disp, base)
int reg, disp, base;
{
if (VAL_14_BITS_P (disp))
{
emit_move_insn (gen_rtx_MEM (word_mode,
gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode, base),
GEN_INT (disp))),
gen_rtx_REG (word_mode, reg));
}
emit_move_insn (gen_rtx_MEM (word_mode,
plus_constant (gen_rtx_REG (Pmode, base),
disp)),
gen_rtx_REG (word_mode, reg));
else
{
emit_move_insn (gen_rtx_REG (Pmode, 1),
@ -2545,18 +2547,16 @@ store_reg (reg, disp, base)
Note in DISP > 8k case, we will leave the high part of the address
in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/
static void
load_reg (reg, disp, base)
int reg, disp, base;
{
if (VAL_14_BITS_P (disp))
{
emit_move_insn (gen_rtx_REG (word_mode, reg),
gen_rtx_MEM (word_mode,
gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode, base),
GEN_INT (disp))));
}
emit_move_insn (gen_rtx_REG (word_mode, reg),
gen_rtx_MEM (word_mode,
plus_constant (gen_rtx_REG (Pmode, base),
disp)));
else
{
emit_move_insn (gen_rtx_REG (Pmode, 1),
@ -2575,17 +2575,14 @@ load_reg (reg, disp, base)
Note in DISP > 8k case, we will leave the high part of the address
in %r1. There is code in expand_hppa_{prologue,epilogue} that knows this.*/
static void
set_reg_plus_d(reg, base, disp)
set_reg_plus_d (reg, base, disp)
int reg, base, disp;
{
if (VAL_14_BITS_P (disp))
{
emit_move_insn (gen_rtx_REG (Pmode, reg),
gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode, base),
GEN_INT (disp)));
}
emit_move_insn (gen_rtx_REG (Pmode, reg),
plus_constant (gen_rtx_REG (Pmode, base), disp));
else
{
emit_move_insn (gen_rtx_REG (Pmode, 1),
@ -2839,7 +2836,8 @@ hppa_expand_prologue()
place to get the expected results. sprintf here is just to
put something in the name. */
sprintf(hp_profile_label_name, "LP$%04d", -1);
hp_profile_label_rtx = gen_rtx_SYMBOL_REF (Pmode, hp_profile_label_name);
hp_profile_label_rtx = gen_rtx_SYMBOL_REF (Pmode,
hp_profile_label_name);
if (current_function_returns_struct)
store_reg (STRUCT_VALUE_REGNUM, - 12 - offsetadj, basereg);
if (current_function_needs_context)
@ -6392,11 +6390,12 @@ pa_combine_instructions (insns)
|| anchor_attr == PA_COMBINE_TYPE_FMPY))
{
/* Emit the new instruction and delete the old anchor. */
emit_insn_before (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2,
PATTERN (anchor),
PATTERN (floater))),
anchor);
emit_insn_before (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2, PATTERN (anchor),
PATTERN (floater))),
anchor);
PUT_CODE (anchor, NOTE);
NOTE_LINE_NUMBER (anchor) = NOTE_INSN_DELETED;
NOTE_SOURCE_FILE (anchor) = 0;
@ -6413,10 +6412,13 @@ pa_combine_instructions (insns)
{
rtx temp;
/* Emit the new_jump instruction and delete the old anchor. */
temp = emit_jump_insn_before (gen_rtx_PARALLEL (VOIDmode,
gen_rtvec (2, PATTERN (anchor),
PATTERN (floater))),
anchor);
temp
= emit_jump_insn_before (gen_rtx_PARALLEL
(VOIDmode,
gen_rtvec (2, PATTERN (anchor),
PATTERN (floater))),
anchor);
JUMP_LABEL (temp) = JUMP_LABEL (anchor);
PUT_CODE (anchor, NOTE);
NOTE_LINE_NUMBER (anchor) = NOTE_INSN_DELETED;

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