re PR target/42113 (Internal Compiler error with -O3, breaking commit known)
PR target/42113 * config/alpha/alpha.md (*cmp_sadd_si): Change mode of scratch register to DImode. Split to DImode comparison operator. Use SImode subreg of scratch register in the multiplication. (*cmp_sadd_sidi): Ditto. (*cmp_ssub_si): Ditto. (*cmp_ssub_sidi): Ditto. From-SVN: r157759
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@ -1,3 +1,13 @@
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2010-03-26 Uros Bizjak <ubizjak@gmail.com>
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PR target/42113
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* config/alpha/alpha.md (*cmp_sadd_si): Change mode
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of scratch register to DImode. Split to DImode comparison operator.
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Use SImode subreg of scratch register in the multiplication.
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(*cmp_sadd_sidi): Ditto.
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(*cmp_ssub_si): Ditto.
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(*cmp_ssub_sidi): Ditto.
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2010-03-26 Uros Bizjak <ubizjak@gmail.com>
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PR target/43524
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@ -4186,20 +4186,22 @@
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(match_operand:SI 3 "const48_operand" "I")
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(const_int 0))
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(match_operand:SI 4 "sext_add_operand" "rIO")))
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(clobber (match_scratch:SI 5 "=r"))]
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(clobber (match_scratch:DI 5 "=r"))]
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""
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"#"
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""
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[(set (match_dup 5)
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(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
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(match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
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(set (match_dup 0)
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(plus:SI (mult:SI (match_dup 5) (match_dup 3))
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(plus:SI (mult:SI (match_dup 6) (match_dup 3))
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(match_dup 4)))]
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{
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if (can_create_pseudo_p ())
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operands[5] = gen_reg_rtx (SImode);
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operands[5] = gen_reg_rtx (DImode);
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else if (reg_overlap_mentioned_p (operands[5], operands[4]))
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operands[5] = operands[0];
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operands[5] = gen_lowpart (DImode, operands[0]);
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operands[6] = gen_lowpart (SImode, operands[5]);
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})
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(define_insn_and_split "*cmp_sadd_sidi"
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@ -4212,20 +4214,22 @@
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(match_operand:SI 3 "const48_operand" "I")
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(const_int 0))
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(match_operand:SI 4 "sext_add_operand" "rIO"))))
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(clobber (match_scratch:SI 5 "=r"))]
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(clobber (match_scratch:DI 5 "=r"))]
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""
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"#"
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""
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[(set (match_dup 5)
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(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
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(match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
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(set (match_dup 0)
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(sign_extend:DI (plus:SI (mult:SI (match_dup 5) (match_dup 3))
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(sign_extend:DI (plus:SI (mult:SI (match_dup 6) (match_dup 3))
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(match_dup 4))))]
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{
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if (can_create_pseudo_p ())
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operands[5] = gen_reg_rtx (SImode);
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operands[5] = gen_reg_rtx (DImode);
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else if (reg_overlap_mentioned_p (operands[5], operands[4]))
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operands[5] = gen_lowpart (SImode, operands[0]);
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operands[5] = operands[0];
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operands[6] = gen_lowpart (SImode, operands[5]);
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})
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(define_insn_and_split "*cmp_ssub_di"
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@ -4262,20 +4266,22 @@
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(match_operand:SI 3 "const48_operand" "I")
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(const_int 0))
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(match_operand:SI 4 "reg_or_8bit_operand" "rI")))
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(clobber (match_scratch:SI 5 "=r"))]
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(clobber (match_scratch:DI 5 "=r"))]
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""
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"#"
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""
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[(set (match_dup 5)
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(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
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(match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
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(set (match_dup 0)
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(minus:SI (mult:SI (match_dup 5) (match_dup 3))
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(minus:SI (mult:SI (match_dup 6) (match_dup 3))
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(match_dup 4)))]
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{
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if (can_create_pseudo_p ())
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operands[5] = gen_reg_rtx (SImode);
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operands[5] = gen_reg_rtx (DImode);
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else if (reg_overlap_mentioned_p (operands[5], operands[4]))
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operands[5] = operands[0];
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operands[5] = gen_lowpart (DImode, operands[0]);
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operands[6] = gen_lowpart (SImode, operands[5]);
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})
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(define_insn_and_split "*cmp_ssub_sidi"
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@ -4288,20 +4294,22 @@
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(match_operand:SI 3 "const48_operand" "I")
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(const_int 0))
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(match_operand:SI 4 "reg_or_8bit_operand" "rI"))))
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(clobber (match_scratch:SI 5 "=r"))]
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(clobber (match_scratch:DI 5 "=r"))]
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""
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"#"
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""
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[(set (match_dup 5)
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(match_op_dup:SI 1 [(match_dup 2) (const_int 0)]))
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(match_op_dup:DI 1 [(match_dup 2) (const_int 0)]))
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(set (match_dup 0)
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(sign_extend:DI (minus:SI (mult:SI (match_dup 5) (match_dup 3))
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(sign_extend:DI (minus:SI (mult:SI (match_dup 6) (match_dup 3))
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(match_dup 4))))]
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{
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if (can_create_pseudo_p ())
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operands[5] = gen_reg_rtx (SImode);
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operands[5] = gen_reg_rtx (DImode);
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else if (reg_overlap_mentioned_p (operands[5], operands[4]))
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operands[5] = gen_lowpart (SImode, operands[0]);
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operands[5] = operands[0];
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operands[6] = gen_lowpart (SImode, operands[5]);
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})
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;; Here are the CALL and unconditional branch insns. Calls on NT and OSF
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