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re PR target/77874 (two problems with gcc.target/i386/avx-1.c) 

PR target/77874
	* config/i386/sse.md (<mask_codefor><code><mode>3<mask_name>):
	Remove wrong assert.
	(<floatsuffix>float<sseintvecmodelower><mode>2<mask_name><round_name>:
	Use <round_constraint> as operand 1 constraint.

From-SVN: r240814
This commit is contained in:
Uros Bizjak 2016-10-06 00:02:05 +02:00 committed by Uros Bizjak
parent 50b01e1d46
commit c617339332
2 changed files with 9 additions and 3 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2016-10-05 Uros Bizjak <ubizjak@gmail.com>
PR target/77874
* config/i386/sse.md (<mask_codefor><code><mode>3<mask_name>):
Remove wrong assert.
(<floatsuffix>float<sseintvecmodelower><mode>2<mask_name><round_name>:
Use <round_constraint> as operand 1 constraint.
2016-10-05 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/66343

4
gcc/config/i386/sse.md
View File

@ -4666,7 +4666,7 @@
(define_insn "<floatsuffix>float<sseintvecmodelower><mode>2<mask_name><round_name>"
[(set (match_operand:VF2_AVX512VL 0 "register_operand" "=v")
(any_float:VF2_AVX512VL
(match_operand:<sseintvecmode> 1 "nonimmediate_operand" "vm")))]
(match_operand:<sseintvecmode> 1 "nonimmediate_operand" "<round_constraint>")))]
"TARGET_AVX512DQ"
"vcvt<floatsuffix>qq2pd\t{<round_mask_op2>%1, %0<mask_operand2>|%0<mask_operand2>, %1<round_mask_op2>}"
[(set_attr "type" "ssecvt")
@ -11302,7 +11302,6 @@
gcc_assert (TARGET_AVX);
case MODE_V4SF:
gcc_assert (TARGET_SSE);
tmp = "andnps";
break;
@ -11420,7 +11419,6 @@
gcc_assert (TARGET_AVX);
case MODE_V4SF:
gcc_assert (TARGET_SSE);
gcc_assert (!<mask_applied>);
tmp = "<logic>ps";
break;