i386-387-7.c, [...]: Skip x86 tests for -m64.
* gcc.dg/i386-387-7.c, gcc.dg/i386-3dnowA-1.c, gcc.dg/i386-3dnowA-2.c, gcc.dg/pr12092-1.c: Skip x86 tests for -m64. * gcc.dg/loop-3.c, gcc.dg/short-compare-1.c, gcc.dg/short-compare-2.c, gcc.dg/smod-1.c, gcc.dg/torture/badshift.c: Don't give 32-bit options for x86 -m64. From-SVN: r97731
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@ -1,3 +1,12 @@
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2005-04-06 Joseph S. Myers <joseph@codesourcery.com>
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* gcc.dg/i386-387-7.c, gcc.dg/i386-3dnowA-1.c,
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gcc.dg/i386-3dnowA-2.c, gcc.dg/pr12092-1.c: Skip x86 tests for
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-m64.
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* gcc.dg/loop-3.c, gcc.dg/short-compare-1.c,
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gcc.dg/short-compare-2.c, gcc.dg/smod-1.c,
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gcc.dg/torture/badshift.c: Don't give 32-bit options for x86 -m64.
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2005-04-06 Mark Mitchell <mark@codesourcery.com>
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PR c++/20212
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/* Verify that 387 fsincos instruction is generated. */
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/* { dg-do compile { target "i?86-*-*" } } */
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/* { dg-require-effective-target ilp32 } */
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/* { dg-options "-O -ffast-math -march=i686" } */
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/* { dg-final { scan-assembler "fsincos" } } */
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@ -1,4 +1,5 @@
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/* { dg-do assemble { target i?86-*-* } } */
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/* { dg-require-effective-target ilp32 } */
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/* { dg-options "-O2 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
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/* Test that the intrinsics compile with optimization. All of them are
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/* { dg-do assemble { target i?86-*-* } } */
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/* { dg-require-effective-target ilp32 } */
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/* { dg-options "-O0 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
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/* Test that the intrinsics compile without optimization. All of them are
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@ -3,7 +3,7 @@
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/* { dg-do compile } */
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/* { dg-options "-O3" } */
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/* { dg-options "-O3 -mtune=i386" { target i?86-*-* } } */
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/* { dg-options "-O3 -mtune=i386" { target { i?86-*-* && ilp32 } } } */
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#if defined(STACK_SIZE) && (STACK_SIZE < 65536)
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# define BYTEMEM_SIZE 10000L
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/* PR rtl-optimization/12092 */
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/* Test case reduced by Andrew Pinski <pinskia@physics.uc.edu> */
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/* { dg-do compile { target i?86-*-* } } */
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/* { dg-require-effective-target ilp32 } */
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/* { dg-options "-O2 -mtune=i486 -march=pentium4 -fprefetch-loop-arrays" } */
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void DecodeAC(int index,int *matrix)
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/* { dg-do run } */
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/* { dg-options "-O" } */
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/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
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/* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
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/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
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extern void abort(void);
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/* { dg-do run } */
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/* { dg-options "-O" } */
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/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
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/* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
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/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
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extern void abort();
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/* { dg-do run } */
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/* { dg-options "-std=c99" } */
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/* { dg-options "-std=c99 -mtune=i486" { target i?86-*-* } } */
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/* { dg-options "-std=c99 -mtune=i486" { target { i?86-*-* && ilp32 } } } */
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#include <limits.h>
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/* { dg-do run } */
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/* { dg-options "" } */
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/* { dg-options "-march=i386" { target i?86-*-* } } */
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/* { dg-options "-march=i386" { target { i?86-*-* && ilp32 } } } */
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/* We used to optimize the DImode shift-by-32 to zero because in combine
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we turned:
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