i386-387-7.c, [...]: Skip x86 tests for -m64.

* gcc.dg/i386-387-7.c, gcc.dg/i386-3dnowA-1.c,
	gcc.dg/i386-3dnowA-2.c, gcc.dg/pr12092-1.c: Skip x86 tests for
	-m64.
	* gcc.dg/loop-3.c, gcc.dg/short-compare-1.c,
	gcc.dg/short-compare-2.c, gcc.dg/smod-1.c,
	gcc.dg/torture/badshift.c: Don't give 32-bit options for x86 -m64.

From-SVN: r97731
This commit is contained in:
Joseph Myers 2005-04-06 18:07:08 +01:00 committed by Joseph Myers
parent f652d14b64
commit c634366a35
10 changed files with 18 additions and 5 deletions

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@ -1,3 +1,12 @@
2005-04-06 Joseph S. Myers <joseph@codesourcery.com>
* gcc.dg/i386-387-7.c, gcc.dg/i386-3dnowA-1.c,
gcc.dg/i386-3dnowA-2.c, gcc.dg/pr12092-1.c: Skip x86 tests for
-m64.
* gcc.dg/loop-3.c, gcc.dg/short-compare-1.c,
gcc.dg/short-compare-2.c, gcc.dg/smod-1.c,
gcc.dg/torture/badshift.c: Don't give 32-bit options for x86 -m64.
2005-04-06 Mark Mitchell <mark@codesourcery.com>
PR c++/20212

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@ -1,5 +1,6 @@
/* Verify that 387 fsincos instruction is generated. */
/* { dg-do compile { target "i?86-*-*" } } */
/* { dg-require-effective-target ilp32 } */
/* { dg-options "-O -ffast-math -march=i686" } */
/* { dg-final { scan-assembler "fsincos" } } */

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@ -1,4 +1,5 @@
/* { dg-do assemble { target i?86-*-* } } */
/* { dg-require-effective-target ilp32 } */
/* { dg-options "-O2 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
/* Test that the intrinsics compile with optimization. All of them are

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@ -1,4 +1,5 @@
/* { dg-do assemble { target i?86-*-* } } */
/* { dg-require-effective-target ilp32 } */
/* { dg-options "-O0 -Werror-implicit-function-declaration -m3dnow -march=athlon" } */
/* Test that the intrinsics compile without optimization. All of them are

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@ -3,7 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-O3" } */
/* { dg-options "-O3 -mtune=i386" { target i?86-*-* } } */
/* { dg-options "-O3 -mtune=i386" { target { i?86-*-* && ilp32 } } } */
#if defined(STACK_SIZE) && (STACK_SIZE < 65536)
# define BYTEMEM_SIZE 10000L

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@ -1,6 +1,7 @@
/* PR rtl-optimization/12092 */
/* Test case reduced by Andrew Pinski <pinskia@physics.uc.edu> */
/* { dg-do compile { target i?86-*-* } } */
/* { dg-require-effective-target ilp32 } */
/* { dg-options "-O2 -mtune=i486 -march=pentium4 -fprefetch-loop-arrays" } */
void DecodeAC(int index,int *matrix)

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@ -3,7 +3,7 @@
/* { dg-do run } */
/* { dg-options "-O" } */
/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
/* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
extern void abort(void);

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@ -4,7 +4,7 @@
/* { dg-do run } */
/* { dg-options "-O" } */
/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
/* { dg-options "-O -mtune=i686" { target { i?86-*-* && ilp32 } } } */
/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
extern void abort();

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@ -3,7 +3,7 @@
/* { dg-do run } */
/* { dg-options "-std=c99" } */
/* { dg-options "-std=c99 -mtune=i486" { target i?86-*-* } } */
/* { dg-options "-std=c99 -mtune=i486" { target { i?86-*-* && ilp32 } } } */
#include <limits.h>

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@ -2,7 +2,7 @@
/* { dg-do run } */
/* { dg-options "" } */
/* { dg-options "-march=i386" { target i?86-*-* } } */
/* { dg-options "-march=i386" { target { i?86-*-* && ilp32 } } } */
/* We used to optimize the DImode shift-by-32 to zero because in combine
we turned: