[RS6000] Rename NON_SPECIAL_REGS to GEN_OR_FLOAT_REGS
* config/rs6000/rs6000.h: Rename NON_SPECIAL_REGS to GEN_OR_FLOAT_REGS throughout file. * config/rs6000/darwin.h: Likewise. * config/rs6000/rs6000.c: Likewise. From-SVN: r269960
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@ -1,3 +1,10 @@
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2019-03-27 Alan Modra <amodra@gmail.com>
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* config/rs6000/rs6000.h: Rename NON_SPECIAL_REGS to GEN_OR_FLOAT_REGS
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throughout file.
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* config/rs6000/darwin.h: Likewise.
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* config/rs6000/rs6000.c: Likewise.
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2019-03-27 Alan Modra <amodra@gmail.com>
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* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Always
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@ -346,7 +346,7 @@ extern int darwin_emit_branch_islands;
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&& reg_class_subset_p (BASE_REGS, (CLASS))) \
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? BASE_REGS \
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: (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
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&& (CLASS) == NON_SPECIAL_REGS) \
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&& (CLASS) == GEN_OR_FLOAT_REGS) \
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? GENERAL_REGS \
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: (CLASS))
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@ -20236,7 +20236,7 @@ rs6000_preferred_reload_class (rtx x, enum reg_class rclass)
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return NO_REGS;
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}
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if (GET_MODE_CLASS (mode) == MODE_INT && rclass == NON_SPECIAL_REGS)
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if (GET_MODE_CLASS (mode) == MODE_INT && rclass == GEN_OR_FLOAT_REGS)
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return GENERAL_REGS;
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return rclass;
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@ -20384,7 +20384,7 @@ rs6000_secondary_reload_class (enum reg_class rclass, machine_mode mode,
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/* Constants, memory, and FP registers can go into FP registers. */
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if ((regno == -1 || FP_REGNO_P (regno))
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&& (rclass == FLOAT_REGS || rclass == NON_SPECIAL_REGS))
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&& (rclass == FLOAT_REGS || rclass == GEN_OR_FLOAT_REGS))
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return (mode != SDmode || lra_in_progress) ? NO_REGS : GENERAL_REGS;
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/* Memory, and AltiVec registers can go into AltiVec registers. */
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@ -36154,7 +36154,7 @@ rs6000_libcall_value (machine_mode mode)
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}
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/* Compute register pressure classes. We implement the target hook to avoid
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IRA picking something like NON_SPECIAL_REGS as a pressure class, which can
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IRA picking something like GEN_OR_FLOAT_REGS as a pressure class, which can
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lead to incorrect estimates of number of available registers and therefor
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increased register pressure/spill. */
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static int
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@ -1138,7 +1138,7 @@ enum reg_class
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VRSAVE_REGS,
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VSCR_REGS,
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SPR_REGS,
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NON_SPECIAL_REGS,
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GEN_OR_FLOAT_REGS,
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LINK_REGS,
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CTR_REGS,
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LINK_OR_CTR_REGS,
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@ -1167,7 +1167,7 @@ enum reg_class
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"VRSAVE_REGS", \
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"VSCR_REGS", \
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"SPR_REGS", \
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"NON_SPECIAL_REGS", \
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"GEN_OR_FLOAT_REGS", \
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"LINK_REGS", \
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"CTR_REGS", \
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"LINK_OR_CTR_REGS", \
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@ -1204,7 +1204,7 @@ enum reg_class
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{ 0x00000000, 0x00000000, 0x00000000, 0x00004000 }, \
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/* SPR_REGS. */ \
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{ 0x00000000, 0x00000000, 0x00000000, 0x00010000 }, \
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/* NON_SPECIAL_REGS. */ \
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/* GEN_OR_FLOAT_REGS. */ \
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{ 0xffffffff, 0xffffffff, 0x00000008, 0x00008000 }, \
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/* LINK_REGS. */ \
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{ 0x00000000, 0x00000000, 0x00000002, 0x00000000 }, \
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