From c6d66e907784830a1039d130ad35d500ea6dc005 Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Wed, 28 Sep 2016 15:26:32 +0200 Subject: [PATCH] [ARC] Add simple shift/rotate ops. 2016-09-29 Claudiu Zissulescu * config/arc/arc.md (*rotrsi3_cnt1): New pattern, (*ashlsi2_cnt1, *lshrsi3_cnt1, *ashrsi3_cnt1): Likewise. From-SVN: r240576 --- gcc/ChangeLog | 5 +++++ gcc/config/arc/arc.md | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e1e8bc385cb..51afcec0737 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2016-09-29 Claudiu Zissulescu + + * config/arc/arc.md (*rotrsi3_cnt1): New pattern. + (*ashlsi2_cnt1, *lshrsi3_cnt1, *ashrsi3_cnt1): Likewise. + 2016-09-28 Nathan Sidwell * gimple-pretty-print.c (dump_gimple_call_args): Simplify "' " diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index ac7346bc0a6..715da315d76 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -6190,6 +6190,46 @@ (zero_extract:SI (match_dup 1) (match_dup 5) (match_dup 7)))]) (match_dup 1)]) +(define_insn "*rotrsi3_cnt1" + [(set (match_operand:SI 0 "dest_reg_operand" "=w") + (rotatert:SI (match_operand:SI 1 "register_operand" "c") + (const_int 1)))] + "" + "ror %0,%1%&" + [(set_attr "type" "shift") + (set_attr "predicable" "no") + (set_attr "length" "4")]) + +(define_insn "*ashlsi2_cnt1" + [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w") + (ashift:SI (match_operand:SI 1 "register_operand" "Rcqq,c") + (const_int 1)))] + "" + "asl%? %0,%1%&" + [(set_attr "type" "shift") + (set_attr "iscompact" "maybe,false") + (set_attr "predicable" "no,no")]) + +(define_insn "*lshrsi3_cnt1" + [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w") + (lshiftrt:SI (match_operand:SI 1 "register_operand" "Rcqq,c") + (const_int 1)))] + "" + "lsr%? %0,%1%&" + [(set_attr "type" "shift") + (set_attr "iscompact" "maybe,false") + (set_attr "predicable" "no,no")]) + +(define_insn "*ashrsi3_cnt1" + [(set (match_operand:SI 0 "dest_reg_operand" "=Rcqq,w") + (ashiftrt:SI (match_operand:SI 1 "register_operand" "Rcqq,c") + (const_int 1)))] + "" + "asr%? %0,%1%&" + [(set_attr "type" "shift") + (set_attr "iscompact" "maybe,false") + (set_attr "predicable" "no,no")]) + ;; include the arc-FPX instructions (include "fpx.md")