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Minor BRIG/HSAIL frontend updates and bug fixes: 

* brig-builtins.def: Added a builtin for class_f64.
* builtin-types.def: Added a builtin type needed by class_f64.
* brigfrontend/brig-code-entry-handler.cc
 (brig_code_entry_handler::build_address_operand): Fix a bug
 with reg+offset addressing on 32b segments. In large mode,
 the offset is treated as 32bits unless it's global, readonly or
 kernarg address space.
* rt/workitems.c: Removed a leftover comment.
* rt/arithmetic.c (__hsail_class_f32, __hsail_class_f64): Fix the
 check for signaling/non-signalling NaN. Add class_f64 default
 implementation.

From-SVN: r247576
This commit is contained in:
Pekka Jääskeläinen 2017-05-04 05:50:21 +00:00
parent 1738af6048
commit c6e334cdb1
8 changed files with 75 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
gcc/ChangeLog
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@ -1,3 +1,8 @@
2017-05-04 Pekka Jääskeläinen <pekka.jaaskelainen@parmance.com>
* brig-builtins.def: Added a builtin for class_f64.
* builtin-types.def: Added a builtin type needed by class_f64.
2017-05-03 Jason Merrill <jason@redhat.com>
* timevar.def: Add TV_CONSTEXPR.
@ -71,6 +76,7 @@
* ipa-inline.h (inline_summary): Add ctor.
(create_ggc): Do not use ggc_cleared_alloc.
>>>>>>> .r247575
2017-05-03 Jeff Downs <heydowns@somuchpressure.net>
Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>

4
gcc/brig-builtins.def
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@ -222,6 +222,10 @@ DEF_HSAIL_BUILTIN (BUILT_IN_HSAIL_CLASS_F32, BRIG_OPCODE_CLASS,
BRIG_TYPE_F32, "__hsail_class_f32", BT_FN_UINT_FLOAT_UINT,
ATTR_PURE_NOTHROW_LEAF_LIST)
DEF_HSAIL_BUILTIN (BUILT_IN_HSAIL_CLASS_F64, BRIG_OPCODE_CLASS,
BRIG_TYPE_F64, "__hsail_class_f64", BT_FN_UINT_DOUBLE_UINT,
ATTR_PURE_NOTHROW_LEAF_LIST)
DEF_HSAIL_BUILTIN (BUILT_IN_HSAIL_CLASS_F32_F16, BRIG_OPCODE_CLASS,
BRIG_TYPE_F16, "__hsail_class_f32_f16", BT_FN_UINT_FLOAT_UINT,
ATTR_PURE_NOTHROW_LEAF_LIST)

8
gcc/brig/ChangeLog
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@ -1,3 +1,11 @@
2017-05-03 Pekka Jääskeläinen <visit0r@kamu>
* brigfrontend/brig-code-entry-handler.cc
(brig_code_entry_handler::build_address_operand): Fix a bug
with reg+offset addressing on 32b segments. In large mode,
the offset is treated as 32bits unless it's global, readonly or
kernarg address space.
2016-02-01 Pekka Jääskeläinen <pekka.jaaskelainen@parmance.com>
* brigfrontend/brig-code-entry-handler.cc: fix address

23
gcc/brig/brigfrontend/brig-code-entry-handler.cc
View File

@ -464,7 +464,24 @@ brig_code_entry_handler::build_address_operand
uint64_t offs = gccbrig_to_uint64_t (addr_operand.offset);
if (offs > 0 || addr == NULL_TREE)
{
tree const_offset_2 = build_int_cst (size_type_node, offs);
/* In large mode, the offset is treated as 32bits unless it's
global, readonly or kernarg address space.
See:
http://www.hsafoundation.com/html_spec111/HSA_Library.htm
#PRM/Topics/02_ProgModel/small_and_large_machine_models.htm
#table_machine_model_data_sizes */
int is64b_offset = segment == BRIG_SEGMENT_GLOBAL
|| segment == BRIG_SEGMENT_READONLY
|| segment == BRIG_SEGMENT_KERNARG;
/* The original offset is signed and should be sign
extended for the pointer arithmetics. */
tree const_offset_2 = is64b_offset
? build_int_cst (size_type_node, offs)
: convert (long_integer_type_node,
build_int_cst (integer_type_node, offs));
if (addr == NULL_TREE)
addr = const_offset_2;
else
@ -1265,6 +1282,10 @@ brig_code_entry_handler::build_operands (const BrigInstBase &brig_inst)
operand_type = uint32_type_node;
half_to_float = false;
}
else if (brig_inst.opcode == BRIG_OPCODE_ACTIVELANEPERMUTE && i == 4)
{
operand_type = uint32_type_node;
}
else if (half_to_float)
/* Treat the operands as the storage type at this point. */
operand_type = half_storage_type;

2
gcc/builtin-types.def
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@ -348,6 +348,8 @@ DEF_FUNCTION_TYPE_2 (BT_FN_INT_INT_INT,
BT_INT, BT_INT, BT_INT)
DEF_FUNCTION_TYPE_2 (BT_FN_UINT_FLOAT_UINT,
BT_UINT, BT_FLOAT, BT_UINT)
DEF_FUNCTION_TYPE_2 (BT_FN_UINT_DOUBLE_UINT,
BT_UINT, BT_DOUBLE, BT_UINT)
DEF_FUNCTION_TYPE_2 (BT_FN_FLOAT_UINT_UINT,
BT_FLOAT, BT_UINT, BT_UINT)
DEF_FUNCTION_TYPE_2 (BT_FN_ULONG_UINT_UINT,

7
libhsail-rt/ChangeLog
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@ -1,3 +1,10 @@
2017-05-03 Pekka Jääskeläinen <pekka.jaaskelainen@parmance.com>
* rt/workitems.c: Removed a leftover comment.
* rt/arithmetic.c (__hsail_class_f32, __hsail_class_f64): Fix the
check for signaling/non-signalling NaN. Add class_f64 default
implementation.
2017-02-01 Jakub Jelinek <jakub@redhat.com>
* configure.tgt: Fix i?86-*-linux* entry.

36
libhsail-rt/rt/arithmetic.c
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@ -424,18 +424,34 @@ __hsail_fract_f64 (double a)
uint32_t
__hsail_class_f32 (float a, uint32_t flags)
{
return (flags & 0x0001 && isnan (a) && !(*(uint32_t *) &a & 0x40000000))
|| (flags & 0x0002 && isnan (a) && (*(uint32_t *) &a & 0x40000000))
|| (flags & 0x0004 && isinf (a) && a < 0.0f)
|| (flags & 0x0008 && isnormal (a) && signbit (a))
|| (flags & 0x0010 && a < 0.0f && a > -FLT_MIN)
|| (flags & 0x0020 && a == 0.0f && signbit (a))
|| (flags & 0x0040 && a == 0.0f && !signbit (a))
|| (flags & 0x0080 && a > 0.0f && a < FLT_MIN)
|| (flags & 0x0100 && isnormal (a) && !signbit (a))
|| (flags & 0x0200 && isinf (a) && a >= 0.0f);
return (flags & 0x0001 && isnan (a) && !(*(uint32_t *) &a & (1ul << 22)))
|| (flags & 0x0002 && isnan (a) && (*(uint32_t *) &a & (1ul << 22)))
|| (flags & 0x0004 && isinf (a) && a < 0.0f)
|| (flags & 0x0008 && isnormal (a) && signbit (a))
|| (flags & 0x0010 && a < 0.0f && a > -FLT_MIN)
|| (flags & 0x0020 && a == 0.0f && signbit (a))
|| (flags & 0x0040 && a == 0.0f && !signbit (a))
|| (flags & 0x0080 && a > 0.0f && a < FLT_MIN)
|| (flags & 0x0100 && isnormal (a) && !signbit (a))
|| (flags & 0x0200 && isinf (a) && a >= 0.0f);
}
uint32_t
__hsail_class_f64 (double a, uint32_t flags)
{
return (flags & 0x0001 && isnan (a) && !(*(uint64_t *) &a & (1ul << 51)))
|| (flags & 0x0002 && isnan (a) && (*(uint64_t *) &a & (1ul << 51)))
|| (flags & 0x0004 && isinf (a) && a < 0.0f)
|| (flags & 0x0008 && isnormal (a) && signbit (a))
|| (flags & 0x0010 && a < 0.0f && a > -FLT_MIN)
|| (flags & 0x0020 && a == 0.0f && signbit (a))
|| (flags & 0x0040 && a == 0.0f && !signbit (a))
|| (flags & 0x0080 && a > 0.0f && a < FLT_MIN)
|| (flags & 0x0100 && isnormal (a) && !signbit (a))
|| (flags & 0x0200 && isinf (a) && a >= 0.0f);
}
/* 'class' for a f32-converted f16 which should otherwise be treated like f32
except for its limits. */

4
libhsail-rt/rt/workitems.c
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@ -63,10 +63,6 @@ static clock_t start_time;
#define FIBER_STACK_SIZE (64*1024)
#define GROUP_SEGMENT_ALIGN 256
/* HSA requires WGs to be executed in flat work-group id order. Enabling
the following macro can reveal test cases that rely on the ordering,
but is not useful for much else. */
uint32_t __hsail_workitemabsid (uint32_t dim, PHSAWorkItem *context);
uint32_t __hsail_workitemid (uint32_t dim, PHSAWorkItem *context);