forwprop-28.c: Adjust for ARC LOGICAL_OP_NON_SHORT_CIRCUIT definition.
* gcc.dg/tree-ssa/forwprop-28.c: Adjust for ARC LOGICAL_OP_NON_SHORT_CIRCUIT definition. * gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise. * gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise. * gcc.dg/tree-ssa/vrp47.c: Likewise. * gcc.dg/tree-ssa/vrp87.c: Likewise. From-SVN: r204681
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@ -1,3 +1,15 @@
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2013-11-11 Joern Rennecke <joern.rennecke@embecosm.com>
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* gcc.dg/tree-ssa/forwprop-28.c: Adjust for ARC
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LOGICAL_OP_NON_SHORT_CIRCUIT definition.
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* gcc.dg/tree-ssa/ssa-dom-thread-4.c: Likewise.
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* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c: Likewise.
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* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c: Likewise.
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* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c: Likewise.
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* gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c: Likewise.
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* gcc.dg/tree-ssa/vrp47.c: Likewise.
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* gcc.dg/tree-ssa/vrp87.c: Likewise.
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2013-11-08 Joseph Myers <joseph@codesourcery.com>
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* gcc.dg/atomic/stdatomic-compare-exchange-1.c,
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@ -1,4 +1,4 @@
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
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/* { dg-options "-O2 -fdump-tree-forwprop1" } */
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extern char *frob (void);
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@ -61,7 +61,7 @@ bitmap_ior_and_compl (bitmap dst, const_bitmap a, const_bitmap b,
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zero. */
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/* ARM Cortex-M0 defined LOGICAL_OP_NON_SHORT_CIRCUIT to false,
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so skip below test. */
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/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1" { target { ! { { mips*-*-* avr-*-* } || { arm_cortex_m && arm_thumb1 } } } } } } */
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/* { dg-final { scan-tree-dump-times "Threaded" 3 "dom1" { target { ! { { mips*-*-* avr-*-* arc*-*-* } || { arm_cortex_m && arm_thumb1 } } } } } } */
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/* MIPS defines LOGICAL_OP_NON_SHORT_CIRCUIT to 0, so we split both
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"a_elt || b_elt" and "b_elt && kill_elt" into two conditions each,
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rather than using "(var1 != 0) op (var2 != 0)". Also, as on other targets,
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@ -81,8 +81,9 @@ bitmap_ior_and_compl (bitmap dst, const_bitmap a, const_bitmap b,
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-> "kill_elt->indx == b_elt->indx" in the second condition,
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skipping the known-true "b_elt && kill_elt" in the second
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condition. */
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/* Likewise for arc. */
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/* For avr, BRANCH_COST is by default 0, so the default
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LOGICAL_OP_NON_SHORT_CIRCUIT definition also computes as 0. */
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/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-* avr-*-* } } } */
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/* { dg-final { scan-tree-dump-times "Threaded" 6 "dom1" { target mips*-*-* avr-*-* arc*-*-* } } } */
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/* { dg-final { cleanup-tree-dump "dom1" } } */
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@ -1,4 +1,4 @@
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
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/* { dg-options "-O2 -g -fdump-tree-optimized" } */
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/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
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@ -1,4 +1,4 @@
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
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/* { dg-options "-O2 -g -fdump-tree-optimized" } */
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/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
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@ -1,4 +1,4 @@
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
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/* { dg-options "-O2 -g -fdump-tree-optimized" } */
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/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
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/* { dg-options "-O2 -g -fdump-tree-optimized" } */
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/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
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@ -1,9 +1,9 @@
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/* Skip on MIPS, where LOGICAL_OP_NON_SHORT_CIRCUIT inhibits the setcc
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/* Skip on MIPS/ARC, where LOGICAL_OP_NON_SHORT_CIRCUIT inhibits the setcc
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optimizations that expose the VRP opportunity. */
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/* Skip on S/390 and avr. Lower values in BRANCH_COST lead to two conditional
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jumps when evaluating an && condition. VRP is not able to optimize
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this. */
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/* { dg-do compile { target { ! "mips*-*-* s390*-*-* avr-*-* mn10300-*-*" } } } */
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/* { dg-do compile { target { ! "mips*-*-* arc*-*-* s390*-*-* avr-*-* mn10300-*-*" } } } */
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/* { dg-options "-O2 -fdump-tree-vrp1 -fdump-tree-dom1 -fdump-tree-vrp2" } */
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/* { dg-additional-options "-march=i586" { target { { i?86-*-* x86_64-*-* } && ia32 } } } */
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/* Skip on ARM Cortex-M0, where LOGICAL_OP_NON_SHORT_CIRCUIT is set to false,
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@ -1,4 +1,4 @@
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
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/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
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/* { dg-options "-O2 -fdump-tree-vrp2-details -fdump-tree-cddce2-details" } */
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/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
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