m32r.c (move_src_operand): Fix 32-bit int test.
* config/m32r/m32r.c (move_src_operand): Fix 32-bit int test. * config/m32r/m32r.md (and ior xor splitters): Swap operands to match insn patterns. From-SVN: r48679
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@ -1,3 +1,9 @@
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2002-01-09 Richard Henderson <rth@redhat.com>
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* config/m32r/m32r.c (move_src_operand): Fix 32-bit int test.
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* config/m32r/m32r.md (and ior xor splitters): Swap operands
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to match insn patterns.
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2002-01-09 Richard Henderson <rth@redhat.com>
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* regrename.c (find_oldest_value_reg): Use gen_rtx_raw_REG.
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@ -793,7 +793,13 @@ move_src_operand (op, mode)
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loadable with one insn, and split the rest into two. The instances
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where this would help should be rare and the current way is
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simpler. */
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return UINT32_P (INTVAL (op));
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if (HOST_BITS_PER_WIDE_INT > 32)
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{
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HOST_WIDE_INT rest = INTVAL (op) >> 31;
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return (rest == 0 || rest == -1);
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}
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else
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return 1;
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case LABEL_REF :
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return TARGET_ADDR24;
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case CONST_DOUBLE :
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@ -1032,7 +1032,7 @@
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(match_operand:SI 2 "int8_operand" "")))]
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"optimize_size && m32r_not_same_reg (operands[0], operands[1])"
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[(set (match_dup 0) (match_dup 2))
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(set (match_dup 0) (and:SI (match_dup 1) (match_dup 0)))]
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(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))]
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"")
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(define_insn "iorsi3"
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@ -1064,7 +1064,7 @@
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(match_operand:SI 2 "int8_operand" "")))]
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"optimize_size && m32r_not_same_reg (operands[0], operands[1])"
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[(set (match_dup 0) (match_dup 2))
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(set (match_dup 0) (ior:SI (match_dup 1) (match_dup 0)))]
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(set (match_dup 0) (ior:SI (match_dup 0) (match_dup 1)))]
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"")
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(define_insn "xorsi3"
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@ -1096,7 +1096,7 @@
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(match_operand:SI 2 "int8_operand" "")))]
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"optimize_size && m32r_not_same_reg (operands[0], operands[1])"
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[(set (match_dup 0) (match_dup 2))
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(set (match_dup 0) (xor:SI (match_dup 1) (match_dup 0)))]
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(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))]
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"")
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(define_insn "negsi2"
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