Doubleword version of and;cmp to not;test optimization on x86.
This patch extends the earlier and;cmp to not;test optimization to also perform this transformation for TImode on TARGET_64BIT and DImode on -m32, One motivation for this is that it's a step to fixing the current failure of gcc.target/i386/pr65105-5.c on -m32. A more direct benefit for x86_64 is that the following code: int foo(__int128 x, __int128 y) { return (x & y) == y; } improves with -O2 from 15 instructions: movq %rdi, %r8 movq %rsi, %rax movq %rax, %rdi movq %r8, %rsi movq %rdx, %r8 andq %rdx, %rsi andq %rcx, %rdi movq %rsi, %rax movq %rdi, %rdx xorq %r8, %rax xorq %rcx, %rdx orq %rdx, %rax sete %al movzbl %al, %eax ret to the slightly better 13 instructions: movq %rdi, %r8 movq %rsi, %rax movq %r8, %rsi movq %rax, %rdi notq %rsi notq %rdi andq %rdx, %rsi andq %rcx, %rdi movq %rsi, %rax orq %rdi, %rax sete %al movzbl %al, %eax ret 2022-07-05 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/i386/i386.cc (ix86_rtx_costs) <COMPARE>: Provide costs for double word comparisons and tests (comparisons against zero). * config/i386/i386.md (*test<mode>_not_doubleword): Split DWI and;cmp into andn;cmp $0 as a pre-reload splitter. (*andn<dwi>3_doubleword_bmi): Use <dwi> instead of <mode> in name. (*<any_or><dwi>3_doubleword): Likewise. gcc/testsuite/ChangeLog * gcc.target/i386/testnot-3.c: New test case.
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@ -20982,6 +20982,19 @@ ix86_rtx_costs (rtx x, machine_mode mode, int outer_code_i, int opno,
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return true;
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}
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if (SCALAR_INT_MODE_P (GET_MODE (op0))
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&& GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD)
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{
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if (op1 == const0_rtx)
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*total = cost->add
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+ rtx_cost (op0, GET_MODE (op0), outer_code, opno, speed);
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else
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*total = 3*cost->add
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+ rtx_cost (op0, GET_MODE (op0), outer_code, opno, speed)
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+ rtx_cost (op1, GET_MODE (op0), outer_code, opno, speed);
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return true;
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}
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/* The embedded comparison operand is completely free. */
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if (!general_operand (op0, GET_MODE (op0)) && op1 == const0_rtx)
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*total = 0;
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@ -9792,7 +9792,25 @@
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(set (reg:CCZ FLAGS_REG)
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(compare:CCZ (and:SWI (match_dup 2) (match_dup 1))
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(const_int 0)))]
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"operands[2] = gen_reg_rtx (<MODE>mode);")
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;; Split and;cmp (as optimized by combine) into andn;cmp $0
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(define_insn_and_split "*test<mode>_not_doubleword"
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[(set (reg:CCZ FLAGS_REG)
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(compare:CCZ
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(and:DWI
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(not:DWI (match_operand:DWI 0 "nonimmediate_operand"))
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(match_operand:DWI 1 "nonimmediate_operand"))
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(const_int 0)))]
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"ix86_pre_reload_split ()"
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"#"
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"&& 1"
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[(parallel
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[(set (match_dup 2) (and:DWI (not:DWI (match_dup 0)) (match_dup 1)))
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(clobber (reg:CC FLAGS_REG))])
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(set (reg:CCZ FLAGS_REG) (compare:CCZ (match_dup 2) (const_int 0)))]
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{
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operands[0] = force_reg (<MODE>mode, operands[0]);
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operands[2] = gen_reg_rtx (<MODE>mode);
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})
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@ -10404,7 +10422,7 @@
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operands[2] = gen_int_mode (INTVAL (operands[2]), QImode);
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})
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(define_insn_and_split "*andn<mode>3_doubleword_bmi"
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(define_insn_and_split "*andn<dwi>3_doubleword_bmi"
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[(set (match_operand:<DWI> 0 "register_operand" "=r")
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(and:<DWI>
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(not:<DWI> (match_operand:<DWI> 1 "register_operand" "r"))
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@ -10618,7 +10636,7 @@
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DONE;
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})
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(define_insn_and_split "*<code><mode>3_doubleword"
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(define_insn_and_split "*<code><dwi>3_doubleword"
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[(set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,r")
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(any_or:<DWI>
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(match_operand:<DWI> 1 "nonimmediate_operand" "%0,0")
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9
gcc/testsuite/gcc.target/i386/testnot-3.c
Normal file
9
gcc/testsuite/gcc.target/i386/testnot-3.c
Normal file
@ -0,0 +1,9 @@
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/* { dg-do compile { target int128 } } */
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/* { dg-options "-O2" } */
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int foo(__int128 x, __int128 y)
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{
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return (x & y) == y;
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}
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/* { dg-final { scan-assembler-not "xorq" } } */
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