flow.c (verify_local_live_at_start): Back out last change.
* flow.c (verify_local_live_at_start): Back out last change. * combine.c (distribute_notes): When parts of a hard reg are neither set nor referenced in PLACE, search backwards for a place to put a REG_UNUSED note; if none found, ask for flow info refresh. From-SVN: r37284
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@ -1,3 +1,11 @@
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Tue Nov 7 06:24:02 2000 J"orn Rennecke <amylaar@redhat.com>
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* flow.c (verify_local_live_at_start): Back out last change.
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* combine.c (distribute_notes): When parts of a hard reg are
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neither set nor referenced in PLACE, search backwards for a
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place to put a REG_UNUSED note; if none found, ask for flow
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info refresh.
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Mon Nov 6 20:08:13 2000 J"orn Rennecke <amylaar@redhat.com>
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* reload1.c (eliminate_regs_in_insn): Allow a set to be a PARALLEL
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@ -12499,6 +12499,7 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1)
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i += HARD_REGNO_NREGS (i, reg_raw_mode[i]))
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{
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rtx piece = gen_rtx_REG (reg_raw_mode[i], i);
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basic_block bb = BASIC_BLOCK (this_basic_block);
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if (! dead_or_set_p (place, piece)
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&& ! reg_bitfield_target_p (piece,
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@ -12510,6 +12511,34 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1)
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distribute_notes (new_note, place, place,
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NULL_RTX, NULL_RTX, NULL_RTX);
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}
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else if (! refers_to_regno_p (i, i + 1,
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PATTERN (place), 0)
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&& ! find_regno_fusage (place, USE, i))
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for (tem = PREV_INSN (place); ;
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tem = PREV_INSN (tem))
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{
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if (! INSN_P (tem))
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{
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if (tem == bb->head)
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{
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SET_BIT (refresh_blocks,
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this_basic_block);
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need_refresh = 1;
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break;
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}
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continue;
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}
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if (dead_or_set_p (tem, piece)
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|| reg_bitfield_target_p (piece,
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PATTERN (tem)))
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{
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REG_NOTES (tem)
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= gen_rtx_EXPR_LIST (REG_DEAD, piece,
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REG_NOTES (tem));
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break;
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}
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}
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}
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place = 0;
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21
gcc/flow.c
21
gcc/flow.c
@ -2888,24 +2888,11 @@ verify_local_live_at_start (new_live_at_start, bb)
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EXECUTE_IF_SET_IN_REG_SET (new_live_at_start, 0, i,
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{
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/* No pseudo registers should die. */
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/* No registers should die. */
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if (REGNO_REG_SET_P (bb->global_live_at_start, i))
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{
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/* But hard regs can reasonably die, e.g. when we combine
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(insn 6 30 7 (set (reg/v:DI 83)
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(reg:DI 5 r5)) (nil)
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(expr_list:REG_DEAD (reg:DI 5 r5) (nil)))
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... and ...
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(insn 17 15 18 (set (reg:SI 5 r5)
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(subreg:SI (reg/v:DI 83) 1)) (insn_list 6 (nil))
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(expr_list:REG_DEAD (reg/v:DI 83) (nil))) . */
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if (i >= FIRST_PSEUDO_REGISTER)
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abort ();
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}
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else
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/* Verify that the now-live register is wider than word_mode. */
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verify_wide_reg (i, bb->head, bb->end);
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abort ();
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/* Verify that the now-live register is wider than word_mode. */
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verify_wide_reg (i, bb->head, bb->end);
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});
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}
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}
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