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From-SVN: r13988
This commit is contained in:
Jason Merrill 1997-04-29 18:44:29 +00:00
parent 7740d00c6f
commit c82ba1b505
1 changed files with 4 additions and 8 deletions
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12
gcc/config/mips/iris6.h
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@ -226,12 +226,6 @@ Boston, MA 02111-1307, USA. */
#define CTORS_SECTION_ASM_OP ".section\t.ctors,1,2,0,4" #define CTORS_SECTION_ASM_OP ".section\t.ctors,1,2,0,4"
#define DTORS_SECTION_ASM_OP ".section\t.dtors,1,2,0,4" #define DTORS_SECTION_ASM_OP ".section\t.dtors,1,2,0,4"
/* This is the pseudo-op used to generate a 32-bit word of data with a
specific value in some section. This is the same for all known svr4
assemblers. */
#define INT_ASM_OP ".word"
/* A default list of other sections which we might be "in" at any given /* A default list of other sections which we might be "in" at any given
time. For targets that use additional sections (e.g. .tdesc) you time. For targets that use additional sections (e.g. .tdesc) you
should override this definition in the target-specific file which should override this definition in the target-specific file which
@ -300,7 +294,8 @@ dtors_section () \
#define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME) \ #define ASM_OUTPUT_CONSTRUCTOR(FILE,NAME) \
do { \ do { \
ctors_section (); \ ctors_section (); \
fprintf (FILE, "\t%s\t ", INT_ASM_OP); \ fprintf (FILE, "\t%s\t ", \
TARGET_LONG64 ? ".dword" : ".word"); \
assemble_name (FILE, NAME); \ assemble_name (FILE, NAME); \
fprintf (FILE, "\n"); \ fprintf (FILE, "\n"); \
} while (0) } while (0)
@ -310,7 +305,8 @@ dtors_section () \
#define ASM_OUTPUT_DESTRUCTOR(FILE,NAME) \ #define ASM_OUTPUT_DESTRUCTOR(FILE,NAME) \
do { \ do { \
dtors_section (); \ dtors_section (); \
fprintf (FILE, "\t%s\t ", INT_ASM_OP); \ fprintf (FILE, "\t%s\t ", \
TARGET_LONG64 ? ".dword" : ".word"); \
assemble_name (FILE, NAME); \ assemble_name (FILE, NAME); \
fprintf (FILE, "\n"); \ fprintf (FILE, "\n"); \
} while (0) } while (0)