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predicates.md (register_ssemem_operand): New predicate.

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* config/i386/predicates.md (register_ssemem_operand): New predicate.
	* config/i386/i386.md (*cmpi<FPCMP:unord><MODEF:mode>): Merge from
	*cmpi<FPCMP:unord><MODEF:mode>_mixed and
	*cmpi<FPCMP:unord><X87MODEF:mode>_i387.  Disable unsupported
	alternatives using "enabled" attribute.  Use register_ssemem_operand
	as operand 1 predicate.
	(*cmpi<unord>xf_i387): Split XFmode pattern from
	*cmpi<FPCMP:unord><X87MODEF:mode>_i387.
	(*absneg<mode>2): Merge from *absneg<mode>2_mixed and
	*absneg<mode>2_i387.  Disable unsupported alternatives using
	"enabled" attribute.

From-SVN: r235782
This commit is contained in:
Uros Bizjak 2016-05-02 20:52:33 +02:00 committed by Uros Bizjak
parent 778864283e
commit c8802daf94
3 changed files with 59 additions and 27 deletions
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16
gcc/ChangeLog
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@ -1,3 +1,17 @@
2016-05-02 Uros Bizjak <ubizjak@gmail.com>
* config/i386/predicates.md (register_ssemem_operand): New predicate.
* config/i386/i386.md (*cmpi<FPCMP:unord><MODEF:mode>): Merge from
*cmpi<FPCMP:unord><MODEF:mode>_mixed and
*cmpi<FPCMP:unord><X87MODEF:mode>_i387. Disable unsupported
alternatives using "enabled" attribute. Use register_ssemem_operand
as operand 1 predicate.
(*cmpi<unord>xf_i387): Split XFmode pattern from
*cmpi<FPCMP:unord><X87MODEF:mode>_i387.
(*absneg<mode>2): Merge from *absneg<mode>2_mixed and
*absneg<mode>2_i387. Disable unsupported alternatives using
"enabled" attribute.
2016-05-02 Nathan Sidwell <nathan@codesourcery.com>
* omp-low.c (lower_oacc_head_tail): Assert there is at least one
@ -97,8 +111,6 @@
Disable unsupported alternatives using "enabled" attribute. Use
nonimm_ssenomem_operand as operand 1 predicate. Also check
X87_ENABLE_ARITH for TARGET_MIX_SSE_I387 alternatives.
* config/i386/predicates.md (nonimm_ssenomem_operand): New predicate.
(register_mixssei387nonimm_operand): Remove predicate.
2016-05-02 Richard Sandiford <richard.sandiford@arm.com>

63
gcc/config/i386/i386.md
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@ -1665,12 +1665,13 @@
(define_mode_iterator FPCMP [CCFP CCFPU])
(define_mode_attr unord [(CCFP "") (CCFPU "u")])
(define_insn "*cmpi<FPCMP:unord><MODEF:mode>_mixed"
(define_insn "*cmpi<FPCMP:unord><MODEF:mode>"
[(set (reg:FPCMP FLAGS_REG)
(compare:FPCMP
(match_operand:MODEF 0 "register_operand" "f,v")
(match_operand:MODEF 1 "nonimmediate_operand" "f,vm")))]
"SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH"
(match_operand:MODEF 1 "register_ssemem_operand" "f,vm")))]
"(SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH)
|| (TARGET_80387 && TARGET_CMOVE)"
"* return output_fp_compare (insn, operands, true,
<FPCMP:MODE>mode == CCFPUmode);"
[(set_attr "type" "fcmp,ssecomi")
@ -1689,22 +1690,27 @@
(set_attr "bdver1_decode" "double")
(set_attr "znver1_decode" "double")
(set (attr "enabled")
(cond [(eq_attr "alternative" "0")
(symbol_ref "TARGET_MIX_SSE_I387")
]
(symbol_ref "true")))])
(if_then_else
(match_test ("SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH"))
(if_then_else
(eq_attr "alternative" "0")
(symbol_ref "TARGET_MIX_SSE_I387")
(symbol_ref "true"))
(if_then_else
(eq_attr "alternative" "0")
(symbol_ref "true")
(symbol_ref "false"))))])
(define_insn "*cmpi<FPCMP:unord><X87MODEF:mode>_i387"
(define_insn "*cmpi<unord>xf_i387"
[(set (reg:FPCMP FLAGS_REG)
(compare:FPCMP
(match_operand:X87MODEF 0 "register_operand" "f")
(match_operand:X87MODEF 1 "register_operand" "f")))]
"TARGET_80387 && TARGET_CMOVE
&& !(SSE_FLOAT_MODE_P (<X87MODEF:MODE>mode) && TARGET_SSE_MATH)"
(match_operand:XF 0 "register_operand" "f")
(match_operand:XF 1 "register_operand" "f")))]
"TARGET_80387 && TARGET_CMOVE"
"* return output_fp_compare (insn, operands, true,
<FPCMP:MODE>mode == CCFPUmode);"
<MODE>mode == CCFPUmode);"
[(set_attr "type" "fcmp")
(set_attr "mode" "<X87MODEF:MODE>")
(set_attr "mode" "XF")
(set_attr "athlon_decode" "vector")
(set_attr "amdfam10_decode" "direct")
(set_attr "bdver1_decode" "double")
@ -9235,27 +9241,34 @@
"TARGET_80387 || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
"ix86_expand_fp_absneg_operator (<CODE>, <MODE>mode, operands); DONE;")
(define_insn "*absneg<mode>2_mixed"
(define_insn "*absneg<mode>2"
[(set (match_operand:MODEF 0 "register_operand" "=x,x,f,!r")
(match_operator:MODEF 3 "absneg_operator"
[(match_operand:MODEF 1 "register_operand" "0,x,0,0")]))
(use (match_operand:<ssevecmode> 2 "nonimmediate_operand" "xm,0,X,X"))
(clobber (reg:CC FLAGS_REG))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
"(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
|| TARGET_80387"
"#"
[(set (attr "enabled")
(cond [(eq_attr "alternative" "2")
(symbol_ref "TARGET_MIX_SSE_I387")
]
(symbol_ref "true")))])
(if_then_else
(match_test ("SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"))
(if_then_else
(eq_attr "alternative" "2")
(symbol_ref "TARGET_MIX_SSE_I387")
(symbol_ref "true"))
(if_then_else
(eq_attr "alternative" "2,3")
(symbol_ref "true")
(symbol_ref "false"))))])
(define_insn "*absneg<mode>2_i387"
[(set (match_operand:X87MODEF 0 "register_operand" "=f,!r")
(match_operator:X87MODEF 3 "absneg_operator"
[(match_operand:X87MODEF 1 "register_operand" "0,0")]))
(define_insn "*absnegxf2_i387"
[(set (match_operand:XF 0 "register_operand" "=f,!r")
(match_operator:XF 3 "absneg_operator"
[(match_operand:XF 1 "register_operand" "0,0")]))
(use (match_operand 2))
(clobber (reg:CC FLAGS_REG))]
"TARGET_80387 && !(SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)"
"TARGET_80387"
"#")
(define_expand "<code>tf2"

7
gcc/config/i386/predicates.md
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@ -121,6 +121,13 @@
(match_operand 0 "nonmemory_operand")
(match_operand 0 "general_operand")))
;; Match register operands, but include memory operands for TARGET_SSE_MATH.
(define_predicate "register_ssemem_operand"
(if_then_else
(match_test "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH")
(match_operand 0 "nonimmediate_operand")
(match_operand 0 "register_operand")))
;; Match nonimmediate operands, but exclude memory operands
;; for TARGET_SSE_MATH if TARGET_MIX_SSE_I387 is not enabled.
(define_predicate "nonimm_ssenomem_operand"