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re PR target/79544 (vec_sra (unsigned long long,foo) generating vsrd instead of vsrad) 

PR target/79544
	* config/rs6000/rs6000-c.c (struct altivec_builtin_types): Use VSRAD
	for arithmetic shift of unsigned V2DI.
	* gcc.target/powerpc/pr79544.c: New.

From-SVN: r245762
This commit is contained in:
Pat Haugen 2017-02-27 16:06:13 +00:00 committed by Pat Haugen
parent 470c35ae22
commit c8f28a3c7a
4 changed files with 28 additions and 2 deletions
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6
gcc/ChangeLog
View File

@ -1,3 +1,9 @@
2017-02-27 Pat Haugen <pthaugen@us.ibm.com>
PR target/79544
* config/rs6000/rs6000-c.c (struct altivec_builtin_types): Use VSRAD
for arithmetic shift of unsigned V2DI.
2017-02-27 Claudiu Zissulescu <claziss@synopsys.com>
* config.gcc (arc*-): Clean up, use arc/big.h, arc/elf.h, and

4
gcc/config/rs6000/rs6000-c.c
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@ -2444,7 +2444,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
{ ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
{ ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRD,
{ ALTIVEC_BUILTIN_VEC_SRA, P8V_BUILTIN_VSRAD,
RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
{ ALTIVEC_BUILTIN_VEC_VSRAW, ALTIVEC_BUILTIN_VSRAW,
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
@ -5012,7 +5012,7 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
{ P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,
RS6000_BTI_V2DI, RS6000_BTI_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
{ P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRD,
{ P8V_BUILTIN_VEC_VSRAD, P8V_BUILTIN_VSRAD,
RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, RS6000_BTI_unsigned_V2DI, 0 },
{ P8V_BUILTIN_VEC_VSUBCUQ, P8V_BUILTIN_VSUBCUQ,

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2017-02-27 Pat Haugen <pthaugen@us.ibm.com>
PR target/79544
* gcc.target/powerpc/pr79544.c: New.
2017-02-27 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/79414

15
gcc/testsuite/gcc.target/powerpc/pr79544.c Normal file
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@ -0,0 +1,15 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
/* { dg-options "-mcpu=power8 -O2" } */
#include <altivec.h>
vector unsigned long long
test_sra (vector unsigned long long x, vector unsigned long long y)
{
return vec_sra (x, y);
}
/* { dg-final { scan-assembler "vsrad" } } */