arm.md (storehi): Avoid use of explicit subreg.
* arm.md (storehi): Avoid use of explicit subreg. (storehi_bigend, storeinthi, movhi_bigend): Likewise. From-SVN: r73496
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@ -1,3 +1,8 @@
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2003-11-12 Richard Earnshaw <rearnsha@arm.com>
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* arm.md (storehi): Avoid use of explicit subreg.
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(storehi_bigend, storeinthi, movhi_bigend): Likewise.
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2003-11-12 J"orn Rennecke <joern.rennecke@superh.com>
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* config/sh/sh.md (prefetch): New pattern.
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@ -4007,7 +4007,7 @@
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(set (match_dup 2)
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(ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
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;; store the high byte
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(set (match_dup 4) (subreg:QI (match_dup 2) 0))] ;explicit subreg safe
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(set (match_dup 4) (match_dup 5))]
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"TARGET_ARM"
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"
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{
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@ -4024,6 +4024,7 @@
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operands[3] = gen_lowpart (QImode, operands[0]);
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operands[0] = gen_lowpart (SImode, operands[0]);
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operands[2] = gen_reg_rtx (SImode);
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operands[5] = gen_lowpart (QImode, operands[2]);
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}"
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)
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@ -4031,7 +4032,7 @@
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[(set (match_dup 4) (match_dup 3))
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(set (match_dup 2)
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(ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
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(set (match_operand 1 "" "") (subreg:QI (match_dup 2) 3))]
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(set (match_operand 1 "" "") (match_dup 5))]
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"TARGET_ARM"
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"
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{
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@ -4048,13 +4049,14 @@
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operands[3] = gen_lowpart (QImode, operands[0]);
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operands[0] = gen_lowpart (SImode, operands[0]);
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operands[2] = gen_reg_rtx (SImode);
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operands[5] = gen_lowpart (QImode, operands[2]);
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}"
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)
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;; Subroutine to store a half word integer constant into memory.
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(define_expand "storeinthi"
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[(set (match_operand 0 "" "")
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(subreg:QI (match_operand 1 "" "") 0))
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(match_operand 1 "" ""))
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(set (match_dup 3) (match_dup 2))]
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"TARGET_ARM"
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"
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@ -4095,6 +4097,7 @@
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operands[3] = adjust_address (op0, QImode, 1);
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operands[0] = adjust_address (operands[0], QImode, 0);
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operands[2] = gen_lowpart (QImode, operands[2]);
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operands[1] = gen_lowpart (QImode, operands[1]);
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}"
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)
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@ -4415,11 +4418,12 @@
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(set (match_dup 3)
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(ashiftrt:SI (match_dup 2) (const_int 16)))
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(set (match_operand:HI 0 "s_register_operand" "")
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(subreg:HI (match_dup 3) 0))]
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(match_dup 4))]
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"TARGET_ARM"
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"
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operands[2] = gen_reg_rtx (SImode);
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operands[3] = gen_reg_rtx (SImode);
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operands[4] = gen_lowpart (HImode, operands[3]);
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"
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)
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