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t-rtems-eabi: Add mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard...

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2014-07-23  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/arm/t-rtems-eabi: Add
	mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard,
	mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard,
	mbig-endian/mthumb/march=armv7-r, and
	mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
	multilibs.

From-SVN: r212936
This commit is contained in:
Sebastian Huber 2014-07-23 13:59:41 +00:00 committed by Joel Sherrill
parent 00020ddac1
commit c971914821
2 changed files with 131 additions and 2 deletions
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@ -1,3 +1,12 @@
2014-07-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
* config/arm/t-rtems-eabi: Add
mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard,
mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard,
mbig-endian/mthumb/march=armv7-r, and
mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
multilibs.
2014-07-23 Sebastian Huber <sebastian.huber@embedded-brains.de>
Chris Johns <chrisj@rtems.org>
Joel Sherrill <joel.sherrill@oarcorp.com>

124
gcc/config/arm/t-rtems-eabi
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@ -1,47 +1,167 @@
# Custom RTEMS EABI multilibs
MULTILIB_OPTIONS = mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon mfloat-abi=hard
MULTILIB_DIRNAMES = thumb armv6-m armv7-a armv7-r armv7-m neon hard
MULTILIB_OPTIONS = mbig-endian mthumb march=armv6-m/march=armv7-a/march=armv7-r/march=armv7-m mfpu=neon/mfpu=vfpv3-d16/mfpu=fpv4-sp-d16 mfloat-abi=hard
MULTILIB_DIRNAMES = eb thumb armv6-m armv7-a armv7-r armv7-m neon vfpv3-d16 fpv4-sp-d16 hard
# Enumeration of multilibs
MULTILIB_EXCEPTIONS =
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv6-m
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-a
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=neon
# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-r
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/march=armv7-m
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/mthumb/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mthumb
MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv6-m
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-a
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-r
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/march=armv7-m
MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mfpu=neon
MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mbig-endian/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mbig-endian
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=neon
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv6-m/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb/march=armv6-m
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=neon
MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv7-a/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-a
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=neon
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv7-r/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-r
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=neon
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=vfpv3-d16
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mthumb/march=armv7-m/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb/march=armv7-m
MULTILIB_EXCEPTIONS += mthumb/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/mfpu=neon
MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mthumb/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mthumb/mfloat-abi=hard
# MULTILIB_EXCEPTIONS += mthumb
MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=neon
MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv6-m/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += march=armv6-m/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv6-m
MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=neon
MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-a/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += march=armv7-a/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-a
MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=neon
MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-r/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += march=armv7-r/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-r
MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=neon
MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-m/mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += march=armv7-m/mfloat-abi=hard
MULTILIB_EXCEPTIONS += march=armv7-m
MULTILIB_EXCEPTIONS += mfpu=neon/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mfpu=neon
MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mfpu=vfpv3-d16
MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16/mfloat-abi=hard
MULTILIB_EXCEPTIONS += mfpu=fpv4-sp-d16
MULTILIB_EXCEPTIONS += mfloat-abi=hard