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m68hc11.md ("cmpqi_1"): Fix constraints.

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* config/m68hc11/m68hc11.md ("cmpqi_1"): Fix constraints.
	("tsthi_1"): Avoid allocation in register y.
	("*movqi_68hc12"): Reorganize and fix constraints.
	("zero_extendqisi2"): Prefer d over x and y for operand 1.
	("addqi3"): Likewise.
	("addhi3"): Fix constraints.
	("*logicalhi3_zexthi"): Disparage soft registers.

From-SVN: r45908
This commit is contained in:
Stephane Carrez 2001-09-30 19:33:18 +02:00 committed by Stephane Carrez
parent 713b205815
commit c9b9c05cc1
2 changed files with 26 additions and 14 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2001-09-30 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/m68hc11/m68hc11.md ("cmpqi_1"): Fix constraints.
("tsthi_1"): Avoid allocation in register y.
("*movqi_68hc12"): Reorganize and fix constraints.
("zero_extendqisi2"): Prefer d over x and y for operand 1.
("addqi3"): Likewise.
("addhi3"): Fix constraints.
("*logicalhi3_zexthi"): Disparage soft registers.
2001-09-30 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/m68hc11/m68hc11.c (m68hc11_gen_movhi): Fix move of sp

30
gcc/config/m68hc11/m68hc11.md
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@ -170,7 +170,7 @@
(define_insn "tsthi_1"
[(set (cc0)
(match_operand:HI 0 "tst_operand" "dx,y"))]
(match_operand:HI 0 "tst_operand" "dx,*y"))]
""
"*
{
@ -484,8 +484,8 @@
(define_insn "cmpqi_1"
[(set (cc0)
(compare (match_operand:QI 0 "tst_operand" "d,m,d,!u,*B,d")
(match_operand:QI 1 "cmp_operand" "im,d,!u,d,?dim*B,*u")))]
(compare (match_operand:QI 0 "tst_operand" "d,m,d,!u,*B,d*B")
(match_operand:QI 1 "cmp_operand" "im,d,!u,d,dim*A,*u")))]
""
"*
{
@ -1002,8 +1002,10 @@
}")
(define_insn "*movqi_68hc12"
[(set (match_operand:QI 0 "nonimmediate_operand" "=d*AuU*q,d*A*qu,d*A*q,m,m")
(match_operand:QI 1 "general_operand" "rui*q,U,m,d*q,!A"))]
[(set (match_operand:QI 0 "nonimmediate_operand"
"=d*AU*q,d*A*q,*u,d*A*q,m,m")
(match_operand:QI 1 "general_operand"
"*ri*q,U,*ri*qU,m,d*q,!A"))]
"TARGET_M6812"
"*
{
@ -1270,9 +1272,9 @@
}")
(define_insn "zero_extendqisi2"
[(set (match_operand:SI 0 "non_push_operand" "=D,m,u")
[(set (match_operand:SI 0 "non_push_operand" "=D,D,m,m,u")
(zero_extend:SI
(match_operand:QI 1 "nonimmediate_operand" "dxymu,dxy,dxy")))]
(match_operand:QI 1 "nonimmediate_operand" "dmu,xy,d,xy,dxy")))]
""
"#")
@ -2307,7 +2309,7 @@
"")
(define_insn "*addhi3"
[(set (match_operand:HI 0 "hard_reg_operand" "=A,d,!A,d*A,!d")
[(set (match_operand:HI 0 "hard_reg_operand" "=A,d,!A,d*A,!d*A")
(plus:HI (match_operand:HI 1 "general_operand" "%0,0,0,0,0")
(match_operand:HI 2 "general_operand" "N,i,I,mi*A*d,!u*d*w")))]
"TARGET_M6811"
@ -2430,9 +2432,9 @@
"")
(define_insn "addqi3"
[(set (match_operand:QI 0 "nonimmediate_operand" "=!*rm,dq*A")
(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0")
(match_operand:QI 2 "general_operand" "N,ium*A*d")))]
[(set (match_operand:QI 0 "nonimmediate_operand" "=!d*rm,dq,!*A")
(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
(match_operand:QI 2 "general_operand" "N,ium*A*d,ium*A*d")))]
""
"*
{
@ -3451,11 +3453,11 @@
"#")
(define_insn "*logicalhi3_zexthi"
[(set (match_operand:HI 0 "register_operand" "=d")
[(set (match_operand:HI 0 "register_operand" "=d,d")
(match_operator:HI 3 "m68hc11_logical_operator"
[(zero_extend:HI
(match_operand:QI 1 "general_operand" "imud"))
(match_operand:HI 2 "general_operand" "dimu")]))]
(match_operand:QI 1 "general_operand" "imd*A,?u"))
(match_operand:HI 2 "general_operand" "dim,?dimu")]))]
""
"#")