rtlanal.c (refers_to_regno_p): Change return value from int to bool.
gcc/ * rtlanal.c (refers_to_regno_p): Change return value from int to bool. * rtl.h (refers_to_regno_p): Add overload. * cse.c: Use it. * bt-load.c: Likewise. * combine.c: Likewise. * df-scan.c: Likewise. * sched-deps.c: Likewise. * config/s390/s390.c: Likewise. * config/m32r/m32r.c: Likewise. * config/rs6000/spe.md: Likewise. * config/rs6000/rs6000.c: Likewise. * config/pa/pa.c: Likewise. * config/stormy16/stormy16.c: Likewise. * config/cris/cris.c: Likewise. * config/arc/arc.md: Likewise. * config/arc/arc.c: Likewise. * config/sh/sh.md: Likewise. * config/sh/sh.c: Likewise. * config/frv/frv.c: Likewise. From-SVN: r219203
This commit is contained in:
Oleg Endo
parent
fca4adf209
commit
c9bd6bcd5d
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@ -1,3 +1,25 @@
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2015-01-05 Oleg Endo <olegendo@gcc.gnu.org>
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* rtlanal.c (refers_to_regno_p): Change return value from int to bool.
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* rtl.h (refers_to_regno_p): Add overload.
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* cse.c: Use it.
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* bt-load.c: Likewise.
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* combine.c: Likewise.
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* df-scan.c: Likewise.
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* sched-deps.c: Likewise.
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* config/s390/s390.c: Likewise.
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* config/m32r/m32r.c: Likewise.
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* config/rs6000/spe.md: Likewise.
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* config/rs6000/rs6000.c: Likewise.
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* config/pa/pa.c: Likewise.
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* config/stormy16/stormy16.c: Likewise.
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* config/cris/cris.c: Likewise.
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* config/arc/arc.md: Likewise.
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* config/arc/arc.c: Likewise.
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* config/sh/sh.md: Likewise.
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* config/sh/sh.c: Likewise.
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* config/frv/frv.c: Likewise.
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2015-01-05 Jakub Jelinek <jakub@redhat.com>
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PR sanitizer/64265
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@ -533,8 +533,7 @@ compute_defs_uses_and_gen (btr_heap_t *all_btr_defs, btr_def *def_array,
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int reg;
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for (reg = first_btr; reg <= last_btr; reg++)
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if (TEST_HARD_REG_BIT (all_btrs, reg)
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&& refers_to_regno_p (reg, reg + 1, user->insn,
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NULL))
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&& refers_to_regno_p (reg, user->insn))
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{
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note_other_use_this_block (reg,
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info.users_this_bb);
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@ -597,7 +596,7 @@ compute_defs_uses_and_gen (btr_heap_t *all_btr_defs, btr_def *def_array,
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int regno;
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for (regno = first_btr; regno <= last_btr; regno++)
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if (refers_to_regno_p (regno, regno+1, insn, NULL))
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if (refers_to_regno_p (regno, insn))
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SET_HARD_REG_BIT (btrs_live_at_end[i], regno);
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}
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@ -710,8 +709,7 @@ link_btr_uses (btr_def *def_array, btr_user *use_array, sbitmap *bb_out,
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bitmap_clear (reaching_defs_of_reg);
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for (reg = first_btr; reg <= last_btr; reg++)
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if (TEST_HARD_REG_BIT (all_btrs, reg)
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&& refers_to_regno_p (reg, reg + 1, user->insn,
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NULL))
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&& refers_to_regno_p (reg, user->insn))
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bitmap_or_and (reaching_defs_of_reg,
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reaching_defs_of_reg,
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reaching_defs,
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@ -13842,7 +13842,7 @@ distribute_notes (rtx notes, rtx_insn *from_insn, rtx_insn *i3, rtx_insn *i2,
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unsigned int i;
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for (i = regno; i < endregno; i++)
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if ((! refers_to_regno_p (i, i + 1, PATTERN (place), 0)
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if ((! refers_to_regno_p (i, PATTERN (place))
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&& ! find_regno_fusage (place, USE, i))
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|| dead_or_set_regno_p (place, i))
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{
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@ -13872,8 +13872,7 @@ distribute_notes (rtx notes, rtx_insn *from_insn, rtx_insn *i3, rtx_insn *i2,
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NULL, NULL_RTX, NULL_RTX,
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NULL_RTX);
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}
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else if (! refers_to_regno_p (i, i + 1,
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PATTERN (place), 0)
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else if (! refers_to_regno_p (i, PATTERN (place))
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&& ! find_regno_fusage (place, USE, i))
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for (tem_insn = PREV_INSN (place); ;
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tem_insn = PREV_INSN (tem_insn))
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@ -9059,7 +9059,7 @@ arc_regno_use_in (unsigned int regno, rtx x)
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int i, j;
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rtx tem;
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if (REG_P (x) && refers_to_regno_p (regno, regno+1, x, (rtx *) 0))
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if (REG_P (x) && refers_to_regno_p (regno, x))
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return x;
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fmt = GET_RTX_FORMAT (GET_CODE (x));
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@ -952,8 +952,7 @@
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last. Otherwise, load it first. Note that we cannot have
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auto-increment in that case since the address register is known to be
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dead. */
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if (refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
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operands [1], 0))
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if (refers_to_regno_p (REGNO (operands[0]), operands[1]))
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return \"ld%V1 %R0,%R1\;ld%V1 %0,%1\";
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else switch (GET_CODE (XEXP(operands[1], 0)))
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{
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@ -2936,8 +2936,7 @@ cris_split_movdx (rtx *operands)
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/* If the high-address word is used in the address, we must load it
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last. Otherwise, load it first. */
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rtx addr = XEXP (src, 0);
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int reverse
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= (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
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int reverse = (refers_to_regno_p (dregno, addr) != 0);
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/* The original code implies that we can't do
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move.x [rN+],rM move.x [rN],rM+1
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@ -5035,7 +5035,7 @@ frv_split_double_load (rtx dest, rtx source)
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of the registers could affect the value of ADDRESS, so we must
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be careful which order we do them in. */
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if (GET_CODE (address) == PRE_MODIFY
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|| ! refers_to_regno_p (regno, regno + 1, address, NULL))
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|| ! refers_to_regno_p (regno, address))
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{
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/* It is safe to load the lower-numbered register first. */
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emit_move_insn (dest1, change_address (source, SImode, NULL));
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@ -1096,8 +1096,7 @@ gen_split_move_double (rtx operands[])
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{
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/* If the high-address word is used in the address, we must load it
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last. Otherwise, load it first. */
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int reverse
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= (refers_to_regno_p (dregno, dregno + 1, XEXP (src, 0), 0) != 0);
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int reverse = refers_to_regno_p (dregno, XEXP (src, 0));
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/* We used to optimize loads from single registers as
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@ -2649,8 +2649,7 @@ pa_output_move_double (rtx *operands)
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Handle mem -> register case first. */
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if (optype0 == REGOP
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&& (optype1 == MEMOP || optype1 == OFFSOP)
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&& refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
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operands[1], 0))
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&& refers_to_regno_p (REGNO (operands[0]), operands[1]))
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{
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/* Do the late half first. */
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if (addreg1)
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@ -16087,8 +16087,7 @@ rs6000_output_load_multiple (rtx operands[3])
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return "lwz %2,0(%1)";
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for (i = 0; i < words; i++)
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if (refers_to_regno_p (REGNO (operands[2]) + i,
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REGNO (operands[2]) + i + 1, operands[1], 0))
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if (refers_to_regno_p (REGNO (operands[2]) + i, operands[1]))
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{
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if (i == words-1)
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{
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@ -2421,8 +2421,7 @@
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it last. Otherwise, load it first. Note that we cannot have
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auto-increment in that case since the address register is
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known to be dead. */
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if (refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
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operands[1], 0))
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if (refers_to_regno_p (REGNO (operands[0]), operands[1]))
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{
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if (WORDS_BIG_ENDIAN)
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return \"lwz %L0,%L1\;lwz %0,%1\";
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@ -2465,8 +2464,7 @@
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else
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return \"evldd%X1 %Y0,%y1\;evmergehi %Z0,%Y0,%Y0\";
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}
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if (refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
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operands[1], 0))
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if (refers_to_regno_p (REGNO (operands[0]), operands[1]))
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{
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if (WORDS_BIG_ENDIAN)
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return \"lwz %Z0,%L1\;lwz %Y0,%1\";
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@ -5736,15 +5736,13 @@ reg_used_in_mem_p (int regno, rtx x)
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if (code == MEM)
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{
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if (refers_to_regno_p (regno, regno+1,
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XEXP (x, 0), 0))
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if (refers_to_regno_p (regno, XEXP (x, 0)))
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return true;
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}
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else if (code == SET
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&& GET_CODE (SET_DEST (x)) == PC)
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{
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if (refers_to_regno_p (regno, regno+1,
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SET_SRC (x), 0))
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if (refers_to_regno_p (regno, SET_SRC (x)))
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return true;
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}
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@ -5795,7 +5793,7 @@ addr_generation_dependency_p (rtx dep_rtx, rtx_insn *insn)
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pat = XVECEXP (pat, 0, 0);
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}
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gcc_assert (GET_CODE (pat) == SET);
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return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
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return refers_to_regno_p (regno, SET_SRC (pat));
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}
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else if (get_attr_atype (insn) == ATYPE_AGEN)
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return reg_used_in_mem_p (regno, PATTERN (insn));
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@ -1773,7 +1773,7 @@ prepare_move_operands (rtx operands[], machine_mode mode)
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reload will fail to find a spill register for rX, since r0 is already
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being used for the source. */
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else if (TARGET_SH1
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&& refers_to_regno_p (R0_REG, R0_REG + 1, operands[1], (rtx *)0)
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&& refers_to_regno_p (R0_REG, operands[1])
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&& MEM_P (operands[0])
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&& GET_CODE (XEXP (operands[0], 0)) == PLUS
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&& REG_P (XEXP (XEXP (operands[0], 0), 1)))
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@ -7808,8 +7808,7 @@ sh_expand_prologue (void)
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{
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offset_in_r0 = -1;
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sp_in_r0 = 0;
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gcc_assert (!refers_to_regno_p
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(R0_REG, R0_REG+1, mem_rtx, (rtx *) 0));
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gcc_assert (!refers_to_regno_p (R0_REG, mem_rtx));
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}
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if (*++tmp_pnt <= 0)
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@ -7253,8 +7253,7 @@ label:
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gcc_unreachable ();
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}
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if (regno == -1
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|| ! refers_to_regno_p (regno, regno + 1, operands[1], 0))
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if (regno == -1 || ! refers_to_regno_p (regno, operands[1]))
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{
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operands[2] = operand_subword (operands[0], 0, 0, DImode);
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operands[3] = operand_subword (operands[1], 0, 0, DImode);
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@ -7787,8 +7786,7 @@ label:
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alter_subreg (&word0, true);
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word1 = gen_rtx_SUBREG (SImode, regop, 4);
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alter_subreg (&word1, true);
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if (store_p || ! refers_to_regno_p (REGNO (word0),
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REGNO (word0) + 1, addr, 0))
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if (store_p || ! refers_to_regno_p (REGNO (word0), addr))
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{
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emit_insn (store_p
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? gen_movsi_ie (mem, word0)
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@ -8067,8 +8065,7 @@ label:
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gcc_unreachable ();
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}
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if (regno == -1
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|| ! refers_to_regno_p (regno, regno + 1, operands[1], 0))
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if (regno == -1 || ! refers_to_regno_p (regno, operands[1]))
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{
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operands[2] = operand_subword (operands[0], 0, 0, DFmode);
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operands[3] = operand_subword (operands[1], 0, 0, DFmode);
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@ -815,7 +815,7 @@ xstormy16_split_move (machine_mode mode, rtx dest, rtx src)
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gcc_assert (refers_to_regno_p (regno, regno + num_words,
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mem_operand, 0));
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if (refers_to_regno_p (regno, regno + 1, mem_operand, 0))
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if (refers_to_regno_p (regno, mem_operand))
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direction = -1;
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else if (refers_to_regno_p (regno + num_words - 1, regno + num_words,
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mem_operand, 0))
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@ -1982,8 +1982,7 @@ remove_invalid_refs (unsigned int regno)
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for (p = table[i]; p; p = next)
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{
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next = p->next_same_hash;
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if (!REG_P (p->exp)
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&& refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
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if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp))
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remove_from_table (p, i);
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}
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}
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@ -2011,7 +2010,7 @@ remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
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|| (((SUBREG_BYTE (exp)
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+ (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
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&& SUBREG_BYTE (exp) <= end))
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&& refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
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&& refers_to_regno_p (regno, p->exp))
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remove_from_table (p, i);
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}
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}
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@ -3173,8 +3173,7 @@ df_get_call_refs (struct df_collection_rec *collection_rec,
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&& !TEST_HARD_REG_BIT (defs_generated, i)
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&& (!is_sibling_call
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|| !bitmap_bit_p (df->exit_block_uses, i)
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|| refers_to_regno_p (i, i+1,
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crtl->return_rtx, NULL)))
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|| refers_to_regno_p (i, crtl->return_rtx)))
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df_ref_record (DF_REF_BASE, collection_rec, regno_reg_rtx[i],
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NULL, bb, insn_info, DF_REF_REG_DEF,
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DF_REF_MAY_CLOBBER | flags);
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@ -2837,7 +2837,7 @@ extern int reg_set_p (const_rtx, const_rtx);
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extern int multiple_sets (const_rtx);
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extern int set_noop_p (const_rtx);
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extern int noop_move_p (const_rtx);
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extern int refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *);
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extern bool refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *);
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extern int reg_overlap_mentioned_p (const_rtx, const_rtx);
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extern const_rtx set_of (const_rtx, const_rtx);
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extern void record_hard_reg_sets (rtx, const_rtx, void *);
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@ -2885,6 +2885,13 @@ extern bool tablejump_p (const rtx_insn *, rtx *, rtx_jump_table_data **);
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extern int computed_jump_p (const_rtx);
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extern bool tls_referenced_p (const_rtx);
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/* Overload for refers_to_regno_p for checking a single register. */
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inline bool
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refers_to_regno_p (unsigned int regnum, const_rtx x, rtx* loc = NULL)
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{
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return refers_to_regno_p (regnum, regnum + 1, x, loc);
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}
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/* Callback for for_each_inc_dec, to process the autoinc operation OP
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within MEM that sets DEST to SRC + SRCOFF, or SRC if SRCOFF is
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NULL. The callback is passed the same opaque ARG passed to
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@ -1402,7 +1402,7 @@ noop_move_p (const_rtx insn)
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References contained within the substructure at LOC do not count.
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LOC may be zero, meaning don't ignore anything. */
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int
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bool
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refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
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rtx *loc)
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{
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@ -1415,7 +1415,7 @@ refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
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/* The contents of a REG_NONNEG note is always zero, so we must come here
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upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
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if (x == 0)
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return 0;
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return false;
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code = GET_CODE (x);
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@ -1433,7 +1433,7 @@ refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
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#endif
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|| x_regno == FRAME_POINTER_REGNUM)
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&& regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
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return 1;
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return true;
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return endregno > x_regno && regno < END_REGNO (x);
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@ -1466,10 +1466,10 @@ refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
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SUBREG_REG (SET_DEST (x)), loc))
|
||||
|| (!REG_P (SET_DEST (x))
|
||||
&& refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
|
||||
return 1;
|
||||
return true;
|
||||
|
||||
if (code == CLOBBER || loc == &SET_SRC (x))
|
||||
return 0;
|
||||
return false;
|
||||
x = SET_SRC (x);
|
||||
goto repeat;
|
||||
|
||||
|
|
@ -1491,7 +1491,7 @@ refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
|
|||
}
|
||||
else
|
||||
if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
|
||||
return 1;
|
||||
return true;
|
||||
}
|
||||
else if (fmt[i] == 'E')
|
||||
{
|
||||
|
|
@ -1499,10 +1499,10 @@ refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
|
|||
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
|
||||
if (loc != &XVECEXP (x, i, j)
|
||||
&& refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
|
||||
return 1;
|
||||
return true;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
|
||||
|
|
|
|||
|
|
@ -3174,7 +3174,7 @@ sched_analyze_insn (struct deps_desc *deps, rtx x, rtx_insn *insn)
|
|||
{
|
||||
rtx other = XEXP (list, 0);
|
||||
if (INSN_CACHED_COND (other) != const_true_rtx
|
||||
&& refers_to_regno_p (i, i + 1, INSN_CACHED_COND (other), NULL))
|
||||
&& refers_to_regno_p (i, INSN_CACHED_COND (other)))
|
||||
INSN_CACHED_COND (other) = const_true_rtx;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue