Rework how prefixed instruction length is calculated.
2019-10-23 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/rs6000-protos.h (rs6000_adjust_insn_length): New declaration. * config/rs6000/rs6000.c (rs6000_insn_cost): Use num_insns insn attribute if it exists, rather than the insn size. If we use the insn size, adjust the size to remove the extra size that prefixed instructions take. (rs6000_adjust_insn_length): New function. * config/rs6000/rs6000.h (ADJUST_INSN_LENGTH): New target hook to update the instruction sized if prefixed instructions are used. * config/rs6000/rs6000.md (prefixed_length attribute): Delete. (non_prefixed_length attribute): Delete. (num_insns attribute): New insn attribute to return the number of instructions. (max_prefixed_insns attribute): New insn attribute to return the maximum number of prefixed instructions in an insn. (length attribute): Do not adjust for prefix instructions here, punt to ADJUST_INSN_LENGTH. (mov<mode>_64bit): Set max_prefixed_insns and num_insns. (movtd_64bit_nodm): Set max_prefixed_insns and num_insns. (mov<mode>_ppc64): Set max_prefixed_insns and num_insns. * config/rs6000/vsx.md: (vsx_mov<mode>_64bit): Set max_prefixed_insns and num_insns. From-SVN: r277352
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@ -1,5 +1,28 @@
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2019-10-23 Michael Meissner <meissner@linux.ibm.com>
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* config/rs6000/rs6000-protos.h (rs6000_adjust_insn_length): New
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declaration.
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* config/rs6000/rs6000.c (rs6000_insn_cost): Use num_insns insn
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attribute if it exists, rather than the insn size. If we use the
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insn size, adjust the size to remove the extra size that prefixed
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instructions take.
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(rs6000_adjust_insn_length): New function.
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* config/rs6000/rs6000.h (ADJUST_INSN_LENGTH): New target hook to
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update the instruction sized if prefixed instructions are used.
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* config/rs6000/rs6000.md (prefixed_length attribute): Delete.
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(non_prefixed_length attribute): Delete.
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(num_insns attribute): New insn attribute to return the number of
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instructions.
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(max_prefixed_insns attribute): New insn attribute to return the
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maximum number of prefixed instructions in an insn.
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(length attribute): Do not adjust for prefix instructions here,
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punt to ADJUST_INSN_LENGTH.
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(mov<mode>_64bit): Set max_prefixed_insns and num_insns.
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(movtd_64bit_nodm): Set max_prefixed_insns and num_insns.
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(mov<mode>_ppc64): Set max_prefixed_insns and num_insns.
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* config/rs6000/vsx.md: (vsx_mov<mode>_64bit): Set
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max_prefixed_insns and num_insns.
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* config/rs6000/rs6000.md (mov<mode>_64bit_dm): Reformat.
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(movtd_64bit_nodm): Reformat.
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(mov<mode>_32bit): Reformat.
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@ -194,6 +194,7 @@ extern bool prefixed_store_p (rtx_insn *);
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extern bool prefixed_paddi_p (rtx_insn *);
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extern void rs6000_asm_output_opcode (FILE *);
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extern void rs6000_final_prescan_insn (rtx_insn *, rtx [], int);
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extern int rs6000_adjust_insn_length (rtx_insn *, int);
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/* Return true if the address can be used for a prefixed load, store, or add
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immediate instructions that cannot be used with a non-prefixed instruction.
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@ -21076,14 +21076,32 @@ rs6000_insn_cost (rtx_insn *insn, bool speed)
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if (recog_memoized (insn) < 0)
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return 0;
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/* If we are optimizing for size, just use the length. */
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if (!speed)
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return get_attr_length (insn);
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/* Use the cost if provided. */
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int cost = get_attr_cost (insn);
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if (cost > 0)
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return cost;
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int n = get_attr_length (insn) / 4;
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/* If the insn tells us how many insns there are, use that. Otherwise use
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the length/4. Adjust the insn length to remove the extra size that
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prefixed instructions take. */
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int n = get_attr_num_insns (insn);
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if (n == 0)
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{
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int length = get_attr_length (insn);
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if (get_attr_prefixed (insn) == PREFIXED_YES)
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{
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int adjust = 0;
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ADJUST_INSN_LENGTH (insn, adjust);
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length -= adjust;
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}
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n = length / 4;
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}
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enum attr_type type = get_attr_type (insn);
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switch (type)
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@ -25087,6 +25105,37 @@ rs6000_asm_output_opcode (FILE *stream)
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return;
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}
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/* Adjust the length of an INSN. LENGTH is the currently-computed length and
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should be adjusted to reflect any required changes. This macro is used when
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there is some systematic length adjustment required that would be difficult
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to express in the length attribute.
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In the PowerPC, we use this to adjust the length of an instruction if one or
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more prefixed instructions are generated, using the attribute
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num_prefixed_insns. A prefixed instruction is 8 bytes instead of 4, but the
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hardware requires that a prefied instruciton does not cross a 64-byte
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boundary. This means the compiler has to assume the length of the first
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prefixed instruction is 12 bytes instead of 8 bytes. Since the length is
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already set for the non-prefixed instruction, we just need to udpate for the
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difference. */
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int
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rs6000_adjust_insn_length (rtx_insn *insn, int length)
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{
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if (TARGET_PREFIXED_ADDR && NONJUMP_INSN_P (insn))
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{
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rtx pattern = PATTERN (insn);
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if (GET_CODE (pattern) != USE && GET_CODE (pattern) != CLOBBER
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&& get_attr_prefixed (insn) == PREFIXED_YES)
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{
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int num_prefixed = get_attr_max_prefixed_insns (insn);
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length += 4 * (num_prefixed + 1);
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}
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}
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return length;
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}
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#ifdef HAVE_GAS_HIDDEN
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# define USE_HIDDEN_LINKONCE 1
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@ -1847,9 +1847,19 @@ extern scalar_int_mode rs6000_pmode;
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/* Adjust the length of an INSN. LENGTH is the currently-computed length and
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should be adjusted to reflect any required changes. This macro is used when
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there is some systematic length adjustment required that would be difficult
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to express in the length attribute. */
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to express in the length attribute.
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/* #define ADJUST_INSN_LENGTH(X,LENGTH) */
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In the PowerPC, we use this to adjust the length of an instruction if one or
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more prefixed instructions are generated, using the attribute
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num_prefixed_insns. A prefixed instruction is 8 bytes instead of 4, but the
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hardware requires that a prefied instruciton does not cross a 64-byte
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boundary. This means the compiler has to assume the length of the first
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prefixed instruction is 12 bytes instead of 8 bytes. Since the length is
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already set for the non-prefixed instruction, we just need to udpate for the
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difference. */
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#define ADJUST_INSN_LENGTH(INSN,LENGTH) \
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(LENGTH) = rs6000_adjust_insn_length ((INSN), (LENGTH))
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/* Given a comparison code (EQ, NE, etc.) and the first operand of a
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COMPARE, return the mode to be used for the comparison. For
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@ -285,20 +285,24 @@
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(const_string "no")))
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;; Length in bytes of instructions that use prefixed addressing and length in
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;; bytes of instructions that does not use prefixed addressing. This allows
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;; both lengths to be defined as constants, and the length attribute can pick
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;; the size as appropriate.
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(define_attr "prefixed_length" "" (const_int 12))
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(define_attr "non_prefixed_length" "" (const_int 4))
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;; Return the number of real hardware instructions in a combined insn. If it
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;; is 0, just use the length / 4.
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(define_attr "num_insns" "" (const_int 0))
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;; Length of the instruction (in bytes). Prefixed insns are 8 bytes, but the
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;; assembler might issue need to issue a NOP so that the prefixed instruction
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;; does not cross a cache boundary, which makes them possibly 12 bytes.
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(define_attr "length" ""
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(if_then_else (eq_attr "prefixed" "yes")
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(attr "prefixed_length")
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(attr "non_prefixed_length")))
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;; If an insn is prefixed, return the maximum number of prefixed instructions
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;; in the insn. The macro ADJUST_INSN_LENGTH uses this number to adjust the
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;; insn length.
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(define_attr "max_prefixed_insns" "" (const_int 1))
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;; Length of the instruction (in bytes). This length does not consider the
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;; length for prefixed instructions. The macro ADJUST_INSN_LENGTH will adjust
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;; the length if there are prefixed instructions.
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;;
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;; While it might be tempting to use num_insns to calculate the length, it can
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;; be problematical unless all insn lengths are adjusted to use num_insns
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;; (i.e. if num_insns is 0, it will get the length, which in turn will get
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;; num_insns and recurse).
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(define_attr "length" "" (const_int 4))
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;; Processor type -- this attribute must exactly match the processor_type
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;; enumeration in rs6000-opts.h.
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@ -7766,7 +7770,9 @@
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DONE;
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}
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[(set_attr "length" "8")
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(set_attr "isa" "*,*,*,*,*,*,*,*,p8v,p8v")])
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(set_attr "isa" "*,*,*,*,*,*,*,*,p8v,p8v")
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(set_attr "max_prefixed_insns" "2")
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(set_attr "num_insns" "2")])
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(define_insn_and_split "*movtd_64bit_nodm"
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[(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,Y,r,r")
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@ -7781,7 +7787,9 @@
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rs6000_split_multireg_move (operands[0], operands[1]);
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DONE;
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}
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[(set_attr "length" "8,8,8,12,12,8")])
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[(set_attr "length" "8,8,8,12,12,8")
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(set_attr "max_prefixed_insns" "2")
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(set_attr "num_insns" "2,2,2,3,3,2")])
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(define_insn_and_split "*mov<mode>_32bit"
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[(set (match_operand:FMOVE128_FPR 0 "nonimmediate_operand" "=m,d,d,d,Y,r,r")
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@ -8990,7 +8998,8 @@
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return rs6000_output_move_128bit (operands);
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}
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[(set_attr "type" "store,store,load,load,*,*")
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(set_attr "length" "8")])
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(set_attr "length" "8")
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(set_attr "max_prefixed_insns" "2")])
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(define_split
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[(set (match_operand:TI2 0 "int_reg_operand")
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"vecstore, vecload, vecsimple, mffgpr, mftgpr, load,
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store, load, store, *, vecsimple, vecsimple,
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vecsimple, *, *, vecstore, vecload")
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(set_attr "num_insns"
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"*, *, *, 2, *, 2,
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2, 2, 2, 2, *, *,
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*, 5, 2, *, *")
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(set_attr "max_prefixed_insns"
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"*, *, *, *, *, 2,
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2, 2, 2, 2, *, *,
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*, *, *, *, *")
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(set_attr "length"
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"*, *, *, 8, *, 8,
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8, 8, 8, 8, *, *,
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