alpha.c (alpha_use_dfa_pipeline_interface): Remove.
* config/alpha/alpha.c (alpha_use_dfa_pipeline_interface): Remove. (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1. * config/arm/arm.c (arm_use_dfa_pipeline_interface): Remove. (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1. * config/frv/frv.c (frv_use_dfa_pipeline_interface): Remove. (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1. * config/i386/i386.c (ia32_use_dfa_pipeline_interface): Remove. (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1. * config/ia64/ia64.c (ia64_use_dfa_pipeline_interface): Remove. (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1. * config/pa/pa.c (hhpa_use_dfa_pipeline_interface): Remove. (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1. * config/sparc/sparc.c (sparc_use_dfa_pipeline_interface): Remove. (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1. * config/v850/v850.c (v850_use_dfa_pipeline_interface): Remove. (TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1. From-SVN: r84170
This commit is contained in:
parent
9845387984
commit
ca4f3d1319
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@ -1,3 +1,22 @@
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2004-07-06 Steven Bosscher <stevenb@suse.de>
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* config/alpha/alpha.c (alpha_use_dfa_pipeline_interface): Remove.
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(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1.
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* config/arm/arm.c (arm_use_dfa_pipeline_interface): Remove.
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(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1.
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* config/frv/frv.c (frv_use_dfa_pipeline_interface): Remove.
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(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1.
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* config/i386/i386.c (ia32_use_dfa_pipeline_interface): Remove.
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(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1.
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* config/ia64/ia64.c (ia64_use_dfa_pipeline_interface): Remove.
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(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1.
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* config/pa/pa.c (hhpa_use_dfa_pipeline_interface): Remove.
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(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1.
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* config/sparc/sparc.c (sparc_use_dfa_pipeline_interface): Remove.
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(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1.
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* config/v850/v850.c (v850_use_dfa_pipeline_interface): Remove.
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(TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE): Define to hook_int_void_1.
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2004-07-06 Daniel Berlin <dberlin@dberlin.org>
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* dojump.c (do_jump): REFERENCE_EXPR is dead.
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@ -5047,12 +5047,6 @@ alpha_issue_rate (void)
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return (alpha_cpu == PROCESSOR_EV4 ? 2 : 4);
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}
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static int
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alpha_use_dfa_pipeline_interface (void)
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{
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return true;
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}
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/* How many alternative schedules to try. This should be as wide as the
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scheduling freedom in the DFA, but no wider. Making this value too
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large results extra work for the scheduler.
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@ -10130,8 +10124,7 @@ alpha_init_libfuncs (void)
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#undef TARGET_SCHED_ISSUE_RATE
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#define TARGET_SCHED_ISSUE_RATE alpha_issue_rate
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#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE \
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alpha_use_dfa_pipeline_interface
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
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#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
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#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \
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alpha_multipass_dfa_lookahead
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@ -117,7 +117,6 @@ static void thumb_output_function_prologue (FILE *, HOST_WIDE_INT);
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static int arm_comp_type_attributes (tree, tree);
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static void arm_set_default_type_attributes (tree);
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static int arm_adjust_cost (rtx, rtx, rtx, int);
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static int arm_use_dfa_pipeline_interface (void);
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static int count_insns_for_constant (HOST_WIDE_INT, int);
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static int arm_get_strip_length (int);
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static bool arm_function_ok_for_sibcall (tree, tree);
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@ -213,7 +212,7 @@ static bool arm_cookie_has_size (void);
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#define TARGET_SCHED_ADJUST_COST arm_adjust_cost
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#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE arm_use_dfa_pipeline_interface
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
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#undef TARGET_ENCODE_SECTION_INFO
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#ifdef ARM_PE
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@ -4129,12 +4128,6 @@ arm_address_cost (rtx x)
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return TARGET_ARM ? arm_arm_address_cost (x) : arm_thumb_address_cost (x);
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}
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static int
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arm_use_dfa_pipeline_interface (void)
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{
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return true;
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}
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static int
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arm_adjust_cost (rtx insn, rtx link, rtx dep, int cost)
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{
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@ -262,7 +262,6 @@ static void frv_registers_update (rtx, unsigned char [],
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static int frv_registers_used_p (rtx, unsigned char [], int);
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static int frv_registers_set_p (rtx, unsigned char [], int);
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static int frv_issue_rate (void);
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static int frv_use_dfa_pipeline_interface (void);
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static void frv_pack_insns (void);
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static void frv_function_prologue (FILE *, HOST_WIDE_INT);
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static void frv_function_epilogue (FILE *, HOST_WIDE_INT);
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@ -318,7 +317,7 @@ static rtx frv_struct_value_rtx (tree, int);
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#undef TARGET_SCHED_ISSUE_RATE
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#define TARGET_SCHED_ISSUE_RATE frv_issue_rate
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#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE frv_use_dfa_pipeline_interface
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
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#undef TARGET_FUNCTION_OK_FOR_SIBCALL
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#define TARGET_FUNCTION_OK_FOR_SIBCALL frv_function_ok_for_sibcall
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@ -8366,15 +8365,6 @@ frv_issue_rate (void)
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return 4;
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}
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}
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/* Implement TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE. */
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static int
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frv_use_dfa_pipeline_interface (void)
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{
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return true;
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}
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/* Update the register state information, to know about which registers are set
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or clobbered. */
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@ -866,7 +866,6 @@ static rtx ix86_expand_aligntest (rtx, int);
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static void ix86_expand_strlensi_unroll_1 (rtx, rtx, rtx);
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static int ix86_issue_rate (void);
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static int ix86_adjust_cost (rtx, rtx, rtx, int);
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static int ia32_use_dfa_pipeline_interface (void);
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static int ia32_multipass_dfa_lookahead (void);
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static void ix86_init_mmx_sse_builtins (void);
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static rtx x86_this_parameter (tree);
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#undef TARGET_SCHED_ISSUE_RATE
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#define TARGET_SCHED_ISSUE_RATE ix86_issue_rate
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#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE \
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ia32_use_dfa_pipeline_interface
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
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#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
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#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \
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ia32_multipass_dfa_lookahead
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return cost;
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}
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static int
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ia32_use_dfa_pipeline_interface (void)
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{
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if (TARGET_PENTIUM
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|| TARGET_PENTIUMPRO
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|| TARGET_K6
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|| TARGET_ATHLON_K8)
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return 1;
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return 0;
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}
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/* How many alternative schedules to try. This should be as wide as the
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scheduling freedom in the DFA, but no wider. Making this value too
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large results extra work for the scheduler. */
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@ -164,7 +164,6 @@ struct ia64_frame_info
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/* Current frame information calculated by ia64_compute_frame_size. */
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static struct ia64_frame_info current_frame_info;
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static int ia64_use_dfa_pipeline_interface (void);
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static int ia64_first_cycle_multipass_dfa_lookahead (void);
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static void ia64_dependencies_evaluation_hook (rtx, rtx);
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static void ia64_init_dfa_pre_cycle_insn (void);
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#define TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK ia64_dependencies_evaluation_hook
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#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE ia64_use_dfa_pipeline_interface
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
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#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
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#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD ia64_first_cycle_multipass_dfa_lookahead
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/* If the following function returns TRUE, we will use the the DFA
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insn scheduler. */
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static int
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ia64_use_dfa_pipeline_interface (void)
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{
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return 1;
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}
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/* If the following function returns TRUE, we will use the the DFA
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insn scheduler. */
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@ -48,16 +48,8 @@ Boston, MA 02111-1307, USA. */
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#include "target.h"
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#include "target-def.h"
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static int hppa_use_dfa_pipeline_interface (void);
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#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hppa_use_dfa_pipeline_interface
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static int
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hppa_use_dfa_pipeline_interface (void)
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{
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return 1;
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}
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
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/* Return nonzero if there is a bypass for the output of
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OUT_INSN and the fp store IN_INSN. */
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@ -161,7 +161,6 @@ static void sparc_elf_asm_named_section (const char *, unsigned int);
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static int sparc_adjust_cost (rtx, rtx, rtx, int);
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static int sparc_issue_rate (void);
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static void sparc_sched_init (FILE *, int, int);
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static int sparc_use_dfa_pipeline_interface (void);
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static int sparc_use_sched_lookahead (void);
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static void emit_soft_tfmode_libcall (const char *, int, rtx *);
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#undef TARGET_SCHED_INIT
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#define TARGET_SCHED_INIT sparc_sched_init
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#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE sparc_use_dfa_pipeline_interface
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
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#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
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#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD sparc_use_sched_lookahead
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{
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}
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static int
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sparc_use_dfa_pipeline_interface (void)
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{
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if ((1 << sparc_cpu) &
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((1 << PROCESSOR_ULTRASPARC) | (1 << PROCESSOR_CYPRESS) |
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(1 << PROCESSOR_SUPERSPARC) | (1 << PROCESSOR_HYPERSPARC) |
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(1 << PROCESSOR_SPARCLITE86X) | (1 << PROCESSOR_TSC701) |
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(1 << PROCESSOR_ULTRASPARC3)))
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return 1;
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return 0;
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}
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static int
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sparc_use_sched_lookahead (void)
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{
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@ -64,7 +64,6 @@ static void v850_insert_attributes (tree, tree *);
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static void v850_select_section (tree, int, unsigned HOST_WIDE_INT);
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static void v850_encode_data_area (tree, rtx);
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static void v850_encode_section_info (tree, rtx, int);
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static int v850_use_dfa_pipeline_interface (void);
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static bool v850_return_in_memory (tree, tree);
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static void v850_setup_incoming_varargs (CUMULATIVE_ARGS *, enum machine_mode,
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tree, int *, int);
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#define TARGET_ADDRESS_COST hook_int_rtx_0
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#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE v850_use_dfa_pipeline_interface
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#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE hook_int_void_1
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#undef TARGET_MACHINE_DEPENDENT_REORG
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#define TARGET_MACHINE_DEPENDENT_REORG v850_reorg
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v850_encode_data_area (decl, XEXP (rtl, 0));
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}
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static int
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v850_use_dfa_pipeline_interface (void)
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{
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return 1;
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}
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/* Return true if the given RTX is a register which can be restored
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by a function epilogue. */
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int
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