lib1funcs.asm (init_trampoline): New entry point.
* config/sh/lib1funcs.asm (init_trampoline): New entry point. * sh-protos.h (sh_initialize_trampoline): Declare. * sh.c (sh_initialize_trampoline): New function. * sh.h (TRAMPOLINE_SIZE): Only 24 for TARGET_SHMEDIA32. (TRAMPOLINE_ALIGNMENT): Need cache-line alignment for TARGET_SHMEDIA. (INITIALIZE_TRAMPOLINE): Call sh_initialize_trampoline. (TRAMPOLINE_ADJUST_ADDRESS): Not needed for SHcompact. * sh.md (initialize_trampoline, double_shori): New patterns. (initialize_trampoline_compact): Likewise. (shmedia32_initialize_trampoline_big): Remove. (shmedia32_initialize_trampoline_little): Likewise. From-SVN: r55529
This commit is contained in:
J"orn Rennecke
Joern Rennecke
parent
0ac785173d
commit
ca903bba77
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@ -1,4 +1,16 @@
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Wed Jul 17 14:04:10 2002 J"orn Rennecke <joern.rennecke@superh.com>
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Wed Jul 17 16:28:53 2002 J"orn Rennecke <joern.rennecke@superh.com>
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* config/sh/lib1funcs.asm (init_trampoline): New entry point.
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* sh-protos.h (sh_initialize_trampoline): Declare.
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* sh.c (sh_initialize_trampoline): New function.
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* sh.h (TRAMPOLINE_SIZE): Only 24 for TARGET_SHMEDIA32.
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(TRAMPOLINE_ALIGNMENT): Need cache-line alignment for TARGET_SHMEDIA.
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(INITIALIZE_TRAMPOLINE): Call sh_initialize_trampoline.
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(TRAMPOLINE_ADJUST_ADDRESS): Not needed for SHcompact.
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* sh.md (initialize_trampoline, double_shori): New patterns.
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(initialize_trampoline_compact): Likewise.
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(shmedia32_initialize_trampoline_big): Remove.
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(shmedia32_initialize_trampoline_little): Likewise.
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* sh-protos.h (binary_float_operator): Remove declaration.
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* sh-protos.h (binary_float_operator): Remove declaration.
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(sh_expand_unop_v2sf, sh_expand_binop_v2sf): Declare.
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(sh_expand_unop_v2sf, sh_expand_binop_v2sf): Declare.
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@ -1821,6 +1821,22 @@ LOCAL(set_fpscr_L1):
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.mode SHmedia
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.mode SHmedia
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.section .text..SHmedia32,"ax"
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.section .text..SHmedia32,"ax"
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.align 2
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.align 2
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.global GLOBAL(init_trampoline)
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GLOBAL(init_trampoline):
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st.l r0,8,r2
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#ifdef __LITTLE_ENDIAN__
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movi 9,r20
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shori 0x402b,r20
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shori 0xd101,r20
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shori 0xd002,r20
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#else
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movi 0xffffffffffffd002,r20
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shori 0xd101,r20
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shori 0x402b,r20
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shori 9,r20
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#endif
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st.q r0,0,r20
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st.l r0,12,r3
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.global GLOBAL(ic_invalidate)
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.global GLOBAL(ic_invalidate)
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GLOBAL(ic_invalidate):
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GLOBAL(ic_invalidate):
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ocbwb r0,0
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ocbwb r0,0
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@ -125,6 +125,7 @@ extern int fldi_ok PARAMS ((void));
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extern int sh_pr_n_sets PARAMS ((void));
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extern int sh_pr_n_sets PARAMS ((void));
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extern int sh_hard_regno_rename_ok PARAMS ((unsigned int, unsigned int));
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extern int sh_hard_regno_rename_ok PARAMS ((unsigned int, unsigned int));
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extern int sh_cfun_interrupt_handler_p (void);
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extern int sh_cfun_interrupt_handler_p (void);
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extern void sh_initialize_trampoline (rtx, rtx, rtx);
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#ifdef HARD_CONST
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#ifdef HARD_CONST
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extern void fpscr_set_from_mem PARAMS ((int, HARD_REG_SET));
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extern void fpscr_set_from_mem PARAMS ((int, HARD_REG_SET));
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@ -7113,6 +7113,177 @@ sh_strip_name_encoding (str)
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return str;
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return str;
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}
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}
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/*
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On the SH1..SH4, the trampoline looks like
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2 0002 D202 mov.l l2,r2
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1 0000 D301 mov.l l1,r3
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3 0004 422B jmp @r2
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4 0006 0009 nop
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5 0008 00000000 l1: .long area
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6 000c 00000000 l2: .long function
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SH5 (compact) uses r1 instead of r3 for the static chain. */
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/* Emit RTL insns to initialize the variable parts of a trampoline.
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FNADDR is an RTX for the address of the function's pure code.
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CXT is an RTX for the static chain value for the function. */
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void
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sh_initialize_trampoline (tramp, fnaddr, cxt)
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rtx tramp, fnaddr, cxt;
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{
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if (TARGET_SHMEDIA64)
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{
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rtx tramp_templ;
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int fixed_len;
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rtx movi1 = GEN_INT (0xcc000010);
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rtx shori1 = GEN_INT (0xc8000010);
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rtx src, dst;
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/* The following trampoline works within a +- 128 KB range for cxt:
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ptb/u cxt,tr1; movi fnaddr >> 48,r0; shori fnaddr >> 32,r0;
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shori fnaddr >> 16,r0; shori fnaddr,r0; ptabs/l r0,tr0
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gettr tr1,r1; blink tr0,r63 */
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/* Address rounding makes it hard to compute the exact bounds of the
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offset for this trampoline, but we have a rather generous offset
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range, so frame_offset should do fine as an upper bound. */
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if (cxt == virtual_stack_vars_rtx && frame_offset < 0x20000)
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{
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/* ??? could optimize this trampoline initialization
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by writing DImode words with two insns each. */
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rtx mask = force_reg (DImode, GEN_INT (0x3fffc00));
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rtx insn = gen_rtx_MINUS (DImode, cxt, tramp);
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insn = gen_rtx_ASHIFT (DImode, insn, GEN_INT (10-2));
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insn = gen_rtx_AND (DImode, insn, mask);
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/* Or in ptb/u .,tr1 pattern */
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insn = gen_rtx_IOR (DImode, insn, gen_int_mode (0xec000010, SImode));
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insn = force_operand (insn, NULL_RTX);
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insn = gen_lowpart (SImode, insn);
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emit_move_insn (gen_rtx_MEM (SImode, tramp), insn);
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insn = gen_rtx_LSHIFTRT (DImode, fnaddr, GEN_INT (38));
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insn = gen_rtx_AND (DImode, insn, mask);
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insn = force_operand (gen_rtx_IOR (DImode, movi1, insn), NULL_RTX);
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insn = gen_lowpart (SImode, insn);
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 4)), insn);
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insn = gen_rtx_LSHIFTRT (DImode, fnaddr, GEN_INT (22));
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insn = gen_rtx_AND (DImode, insn, mask);
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insn = force_operand (gen_rtx_IOR (DImode, shori1, insn), NULL_RTX);
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insn = gen_lowpart (SImode, insn);
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 8)), insn);
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insn = gen_rtx_LSHIFTRT (DImode, fnaddr, GEN_INT (6));
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insn = gen_rtx_AND (DImode, insn, mask);
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insn = force_operand (gen_rtx_IOR (DImode, shori1, insn), NULL_RTX);
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insn = gen_lowpart (SImode, insn);
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 12)),
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insn);
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insn = gen_rtx_ASHIFT (DImode, fnaddr, GEN_INT (10));
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insn = gen_rtx_AND (DImode, insn, mask);
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insn = force_operand (gen_rtx_IOR (DImode, shori1, insn), NULL_RTX);
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insn = gen_lowpart (SImode, insn);
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 16)),
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insn);
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 20)),
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GEN_INT (0x6bf10600));
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 24)),
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GEN_INT (0x4415fc10));
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 28)),
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GEN_INT (0x4401fff0));
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emit_insn (gen_ic_invalidate_line (tramp));
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return;
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}
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tramp_templ = gen_rtx_SYMBOL_REF (Pmode,"__GCC_nested_trampoline");
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fixed_len = TRAMPOLINE_SIZE - 2 * GET_MODE_SIZE (Pmode);
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tramp_templ = gen_datalabel_ref (tramp_templ);
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dst = gen_rtx_MEM (BLKmode, tramp);
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src = gen_rtx_MEM (BLKmode, tramp_templ);
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set_mem_align (dst, 256);
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set_mem_align (src, 64);
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emit_block_move (dst, src, GEN_INT (fixed_len));
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emit_move_insn (gen_rtx_MEM (Pmode, plus_constant (tramp, fixed_len)),
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fnaddr);
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emit_move_insn (gen_rtx_MEM (Pmode,
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plus_constant (tramp,
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fixed_len
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+ GET_MODE_SIZE (Pmode))),
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cxt);
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emit_insn (gen_ic_invalidate_line (tramp));
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return;
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}
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else if (TARGET_SHMEDIA)
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{
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/* movi fnaddr >> 16,r1; shori fnaddr,r1; ptabs/l r1,tr0
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movi cxt >> 16,r1; shori cxt,r1; blink tr0,r63 */
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rtx quad0 = gen_reg_rtx (DImode), cxtload = gen_reg_rtx (DImode);
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rtx quad1 = gen_reg_rtx (DImode), quad2 = gen_reg_rtx (DImode);
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/* movi 0,r1: 0xcc000010 shori 0,r1: c8000010 concatenated,
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rotated 10 right, and higer 16 bit of every 32 selected. */
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rtx movishori
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= force_reg (V2HImode, (simplify_gen_subreg
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(V2HImode, GEN_INT (0x4330432), SImode, 0)));
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rtx ptabs = force_reg (DImode, GEN_INT (0x6bf10600));
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rtx blink = force_reg (DImode, GEN_INT (0x4401fff0));
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tramp = force_reg (Pmode, tramp);
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fnaddr = force_reg (SImode, fnaddr);
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cxt = force_reg (SImode, cxt);
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emit_insn (gen_mshflo_w_x (gen_rtx_SUBREG (V4HImode, quad0, 0),
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gen_rtx_SUBREG (V2HImode, fnaddr, 0),
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movishori));
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emit_insn (gen_rotldi3_mextr (quad0, quad0,
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GEN_INT (TARGET_LITTLE_ENDIAN ? 24 : 56)));
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emit_insn (gen_ashldi3_media (quad0, quad0, GEN_INT (2)));
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emit_move_insn (gen_rtx_MEM (DImode, tramp), quad0);
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emit_insn (gen_mshflo_w_x (gen_rtx_SUBREG (V4HImode, cxtload, 0),
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gen_rtx_SUBREG (V2HImode, cxt, 0),
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movishori));
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emit_insn (gen_rotldi3_mextr (cxtload, cxtload,
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GEN_INT (TARGET_LITTLE_ENDIAN ? 24 : 56)));
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emit_insn (gen_ashldi3_media (cxtload, cxtload, GEN_INT (2)));
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if (TARGET_LITTLE_ENDIAN)
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{
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emit_insn (gen_mshflo_l_di (quad1, ptabs, cxtload));
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emit_insn (gen_mextr4 (quad2, cxtload, blink));
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}
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else
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{
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emit_insn (gen_mextr4 (quad1, cxtload, ptabs));
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emit_insn (gen_mshflo_l_di (quad2, blink, cxtload));
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}
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emit_move_insn (gen_rtx_MEM (DImode, plus_constant (tramp, 8)), quad1);
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emit_move_insn (gen_rtx_MEM (DImode, plus_constant (tramp, 16)), quad2);
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emit_insn (gen_ic_invalidate_line (tramp));
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return;
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}
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else if (TARGET_SHCOMPACT)
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{
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emit_insn (gen_initialize_trampoline (tramp, cxt, fnaddr));
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return;
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}
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emit_move_insn (gen_rtx_MEM (SImode, tramp),
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gen_int_mode (TARGET_LITTLE_ENDIAN ? 0xd301d202 : 0xd202d301,
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SImode));
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 4)),
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gen_int_mode (TARGET_LITTLE_ENDIAN ? 0x0009422b : 0x422b0009,
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SImode));
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 8)),
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cxt);
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (tramp, 12)),
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fnaddr);
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if (TARGET_HARVARD)
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{
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if (TARGET_USERMODE)
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emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__ic_invalidate"),
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0, VOIDmode, 1, tramp, SImode);
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else
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emit_insn (gen_ic_invalidate_line (tramp));
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}
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}
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/* Machine specific built-in functions. */
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/* Machine specific built-in functions. */
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@ -2082,64 +2082,25 @@ while (0)
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6 000c 00000000 l2: .long function */
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6 000c 00000000 l2: .long function */
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/* Length in units of the trampoline for entering a nested function. */
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/* Length in units of the trampoline for entering a nested function. */
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#define TRAMPOLINE_SIZE (TARGET_SHMEDIA64 ? 40 : TARGET_SH5 ? 32 : 16)
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#define TRAMPOLINE_SIZE (TARGET_SHMEDIA64 ? 40 : TARGET_SH5 ? 24 : 16)
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/* Alignment required for a trampoline in bits . */
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/* Alignment required for a trampoline in bits . */
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#define TRAMPOLINE_ALIGNMENT \
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#define TRAMPOLINE_ALIGNMENT \
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((CACHE_LOG < 3 || (TARGET_SMALLCODE && ! TARGET_HARVARD)) ? 32 : 64)
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((CACHE_LOG < 3 || (TARGET_SMALLCODE && ! TARGET_HARVARD)) ? 32 \
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: TARGET_SHMEDIA ? 256 : 64)
|
||||||
|
|
||||||
/* Emit RTL insns to initialize the variable parts of a trampoline.
|
/* Emit RTL insns to initialize the variable parts of a trampoline.
|
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FNADDR is an RTX for the address of the function's pure code.
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FNADDR is an RTX for the address of the function's pure code.
|
||||||
CXT is an RTX for the static chain value for the function. */
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CXT is an RTX for the static chain value for the function. */
|
||||||
|
|
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) do \
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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{ \
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sh_initialize_trampoline ((TRAMP), (FNADDR), (CXT))
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if (TARGET_SH5) \
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|
||||||
{ \
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|
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rtx tramp_templ = gen_rtx_SYMBOL_REF (Pmode, \
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|
||||||
"__GCC_nested_trampoline"); \
|
|
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int fixed_len = TRAMPOLINE_SIZE - 2 * GET_MODE_SIZE (Pmode); \
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\
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tramp_templ = gen_datalabel_ref (tramp_templ); \
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emit_block_move (gen_rtx_MEM (BLKmode, (TRAMP)), \
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gen_rtx_MEM (BLKmode, tramp_templ), \
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GEN_INT (fixed_len)); \
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emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), \
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||||||
fixed_len)), \
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||||||
(FNADDR)); \
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emit_move_insn (gen_rtx_MEM (Pmode, \
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|
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plus_constant ((TRAMP), \
|
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fixed_len \
|
|
||||||
+ GET_MODE_SIZE (Pmode))), \
|
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||||||
(CXT)); \
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emit_insn (gen_ic_invalidate_line (TRAMP)); \
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break; \
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|
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} \
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emit_move_insn (gen_rtx_MEM (SImode, (TRAMP)), \
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GEN_INT (trunc_int_for_mode \
|
|
||||||
(TARGET_LITTLE_ENDIAN ? 0xd301d202 : 0xd202d301,\
|
|
||||||
SImode))); \
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|
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 4)), \
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|
||||||
GEN_INT (TARGET_LITTLE_ENDIAN ? 0x0009422b : 0x422b0009));\
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|
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
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|
||||||
(CXT)); \
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||||||
emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
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|
||||||
(FNADDR)); \
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|
||||||
if (TARGET_HARVARD) \
|
|
||||||
{ \
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|
||||||
if (TARGET_USERMODE) \
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|
||||||
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__ic_invalidate"),\
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|
||||||
0, VOIDmode, 1, (TRAMP), SImode); \
|
|
||||||
else \
|
|
||||||
emit_insn (gen_ic_invalidate_line (TRAMP)); \
|
|
||||||
} \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
/* On SH5, trampolines are SHmedia code, so add 1 to the address. */
|
/* On SH5, trampolines are SHmedia code, so add 1 to the address. */
|
||||||
|
|
||||||
#define TRAMPOLINE_ADJUST_ADDRESS(TRAMP) do \
|
#define TRAMPOLINE_ADJUST_ADDRESS(TRAMP) do \
|
||||||
{ \
|
{ \
|
||||||
if (TARGET_SH5) \
|
if (TARGET_SHMEDIA) \
|
||||||
(TRAMP) = expand_simple_binop (Pmode, PLUS, (TRAMP), GEN_INT (1), \
|
(TRAMP) = expand_simple_binop (Pmode, PLUS, (TRAMP), GEN_INT (1), \
|
||||||
gen_reg_rtx (Pmode), 0, \
|
gen_reg_rtx (Pmode), 0, \
|
||||||
OPTAB_LIB_WIDEN); \
|
OPTAB_LIB_WIDEN); \
|
||||||
|
|
|
||||||
|
|
@ -3667,6 +3667,8 @@
|
||||||
[(set_attr "length" "8")
|
[(set_attr "length" "8")
|
||||||
(set_attr "insn_class" "cwb")])
|
(set_attr "insn_class" "cwb")])
|
||||||
|
|
||||||
|
;; ??? could make arg 0 an offsettable memory operand to allow to save
|
||||||
|
;; an add in the code that calculates the address.
|
||||||
(define_insn "ic_invalidate_line_media"
|
(define_insn "ic_invalidate_line_media"
|
||||||
[(unspec_volatile [(match_operand 0 "register_operand" "r")]
|
[(unspec_volatile [(match_operand 0 "register_operand" "r")]
|
||||||
UNSPEC_ICACHE)]
|
UNSPEC_ICACHE)]
|
||||||
|
|
@ -3685,6 +3687,37 @@
|
||||||
[(set_attr "type" "sfunc")
|
[(set_attr "type" "sfunc")
|
||||||
(set_attr "needs_delay_slot" "yes")])
|
(set_attr "needs_delay_slot" "yes")])
|
||||||
|
|
||||||
|
(define_expand "initialize_trampoline"
|
||||||
|
[(match_operand:SI 0 "" "")
|
||||||
|
(match_operand:SI 1 "" "")
|
||||||
|
(match_operand:SI 2 "" "")]
|
||||||
|
"TARGET_SHCOMPACT"
|
||||||
|
"
|
||||||
|
{
|
||||||
|
rtx sfun, tramp;
|
||||||
|
|
||||||
|
sfun = force_reg (Pmode, gen_rtx_SYMBOL_REF (Pmode, \"__init_trampoline\"));
|
||||||
|
tramp = gen_rtx_REG (SImode, R0_REG);
|
||||||
|
emit_move_insn (tramp, operands[0]);
|
||||||
|
emit_move_insn (gen_rtx_REG (SImode, R2_REG), operands[1]);
|
||||||
|
emit_move_insn (gen_rtx_REG (SImode, R3_REG), operands[2]);
|
||||||
|
|
||||||
|
emit_insn (gen_initialize_trampoline_compact (tramp, sfun));
|
||||||
|
DONE;
|
||||||
|
}")
|
||||||
|
|
||||||
|
(define_insn "initialize_trampoline_compact"
|
||||||
|
[(unspec_volatile [(match_operand:SI 0 "register_operand" "z")
|
||||||
|
(match_operand:SI 1 "register_operand" "r")
|
||||||
|
(reg:SI R2_REG) (reg:SI R3_REG)]
|
||||||
|
UNSPEC_INIT_TRAMP)
|
||||||
|
|
||||||
|
(clobber (reg:SI PR_REG))]
|
||||||
|
"TARGET_SHCOMPACT"
|
||||||
|
"jsr @%1%#"
|
||||||
|
[(set_attr "type" "sfunc")
|
||||||
|
(set_attr "needs_delay_slot" "yes")])
|
||||||
|
|
||||||
(define_insn "movqi_i"
|
(define_insn "movqi_i"
|
||||||
[(set (match_operand:QI 0 "general_movdst_operand" "=r,r,m,r,r,l")
|
[(set (match_operand:QI 0 "general_movdst_operand" "=r,r,m,r,r,l")
|
||||||
(match_operand:QI 1 "general_movsrc_operand" "ri,m,r,t,l,r"))]
|
(match_operand:QI 1 "general_movsrc_operand" "ri,m,r,t,l,r"))]
|
||||||
|
|
@ -7198,62 +7231,6 @@
|
||||||
"jsr @r0%#"
|
"jsr @r0%#"
|
||||||
[(set_attr "needs_delay_slot" "yes")])
|
[(set_attr "needs_delay_slot" "yes")])
|
||||||
|
|
||||||
;; ??? could make arg 0 an offsettable memory operand - and do likewise
|
|
||||||
;; for cache invalidation - to allow to save an add in the code that
|
|
||||||
;; calculates the address.
|
|
||||||
(define_insn "shmedia32_initialize_trampoline_big"
|
|
||||||
[(set (mem:BLK (match_operand:SI 0 "arith_reg_operand" "r"))
|
|
||||||
(unspec [(match_operand:SI 1 "arith_reg_operand" "r")
|
|
||||||
(match_operand:SI 2 "arith_reg_operand" "r")]
|
|
||||||
UNSPEC_INIT_TRAMP))
|
|
||||||
(clobber (match_scratch:SI 3 "=&r"))
|
|
||||||
(clobber (match_scratch:SI 4 "=&r"))]
|
|
||||||
"TARGET_SHMEDIA32 && ! TARGET_LITTLE_ENDIAN"
|
|
||||||
"movi 0x433,%3
|
|
||||||
shori 0x432,%3
|
|
||||||
mshflo.w %1,%3,%4
|
|
||||||
mextr7 %4,%4,%4
|
|
||||||
shlli %4,2,%4
|
|
||||||
st.q %0,0,%4
|
|
||||||
mshflo.w %2,%3,%4
|
|
||||||
shlli %4,10,%4
|
|
||||||
addi %4,0x10,%4
|
|
||||||
movi 0x6bf1,%3
|
|
||||||
shori 0x0600,%3
|
|
||||||
mextr4 %4,%3,%3
|
|
||||||
st.q %0,8,%3
|
|
||||||
shori 0x4401,%4
|
|
||||||
shori 0xfff0,%4
|
|
||||||
st.q %0,16,%4"
|
|
||||||
[(set_attr "length" "64")])
|
|
||||||
|
|
||||||
(define_insn "shmedia32_initialize_trampoline_little"
|
|
||||||
[(set (mem:BLK (match_operand:SI 0 "arith_reg_operand" "r"))
|
|
||||||
(unspec [(match_operand:SI 1 "arith_reg_operand" "r")
|
|
||||||
(match_operand:SI 2 "arith_reg_operand" "r")]
|
|
||||||
UNSPEC_INIT_TRAMP))
|
|
||||||
(clobber (match_scratch:SI 3 "=&r"))
|
|
||||||
(clobber (match_scratch:SI 4 "=&r"))]
|
|
||||||
"TARGET_SHMEDIA32 && TARGET_LITTLE_ENDIAN"
|
|
||||||
"movi 0x433,%3
|
|
||||||
shori 0x432,%3
|
|
||||||
mshflo.w %1,%3,%4
|
|
||||||
mextr3 %4,%4,%4
|
|
||||||
shlli %4,2,%4
|
|
||||||
st.q %0,0,%4
|
|
||||||
mshflo.w %2,%3,%4
|
|
||||||
shlli %4,10,%4
|
|
||||||
addi %4,0x10,%4
|
|
||||||
movi 0x6bf1,%3
|
|
||||||
shori 0x0600,%3
|
|
||||||
shori 0x4401,%3
|
|
||||||
shori 0xfff0,%3
|
|
||||||
st.l %0,16,%r4
|
|
||||||
st.l %0,20,%r3
|
|
||||||
mshfhi.l %3,%4,%4
|
|
||||||
st.q %0,8,%4"
|
|
||||||
[(set_attr "length" "68")])
|
|
||||||
|
|
||||||
(define_expand "prologue"
|
(define_expand "prologue"
|
||||||
[(const_int 0)]
|
[(const_int 0)]
|
||||||
""
|
""
|
||||||
|
|
@ -10263,6 +10240,29 @@
|
||||||
"mshflo.l %N2, %N1, %0"
|
"mshflo.l %N2, %N1, %0"
|
||||||
[(set_attr "type" "arith_media")])
|
[(set_attr "type" "arith_media")])
|
||||||
|
|
||||||
|
;; Combiner pattern for trampoline initialization.
|
||||||
|
(define_insn_and_split "*double_shori"
|
||||||
|
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
|
||||||
|
(ior:DI (ashift:DI (match_operand:DI 1 "arith_reg_operand" "0")
|
||||||
|
(const_int 32))
|
||||||
|
(match_operand:DI 2 "const_int_operand" "n")))]
|
||||||
|
"TARGET_SHMEDIA
|
||||||
|
&& INTVAL (operands[2]) == trunc_int_for_mode (INTVAL (operands[2]), SImode)"
|
||||||
|
"#"
|
||||||
|
"rtx_equal_p (operands[0], operands[1])"
|
||||||
|
[(const_int 0)]
|
||||||
|
"
|
||||||
|
{
|
||||||
|
HOST_WIDE_INT v = INTVAL (operands[2]);
|
||||||
|
|
||||||
|
emit_insn (gen_shori_media (operands[0], operands[0],
|
||||||
|
gen_int_mode (INTVAL (operands[2]) >> 16, HImode)));
|
||||||
|
emit_insn (gen_shori_media (operands[0], operands[0],
|
||||||
|
gen_int_mode (v, HImode)));
|
||||||
|
DONE;
|
||||||
|
}")
|
||||||
|
|
||||||
|
|
||||||
(define_insn "*mshflo_l_di_x"
|
(define_insn "*mshflo_l_di_x"
|
||||||
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
|
[(set (match_operand:DI 0 "arith_reg_dest" "=r")
|
||||||
(ior:DI (zero_extend:DI (match_operand:SI 1 "extend_reg_or_0_operand"
|
(ior:DI (zero_extend:DI (match_operand:SI 1 "extend_reg_or_0_operand"
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue