i386.md (fixsfsi2, fixdfdi2): Fix previous patch again.
* i386.md (fixsfsi2, fixdfdi2): Fix previous patch again. (sqrtsf2): Use TARGET_SSE instead of TARGET_SSE2) (sqrtsf2 patterns): Use 'x' instead of 'Y'. (sqrtextendsfdf2): Disable for SSE2. From-SVN: r39652
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@ -1,3 +1,17 @@
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Wed Feb 14 01:13:59 CET 2001 Jan Hubicka <jh@suse.cz>
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* i386.md (fixsfsi2, fixdfdi2): Fix previous patch again.
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(sqrtsf2): Use TARGET_SSE instead of TARGET_SSE2)
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(sqrtsf2 patterns): Use 'x' instead of 'Y'.
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(sqrtextendsfdf2): Disable for SSE2.
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Wed Feb 14 00:19:28 CET 2001 Jan Hubicka <jh@suse.cz>
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* i386.md (fixsfsi2, fixdfdi2): Fix previous patch again.
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(sqrtsf2): Use TARGET_SSE instead of TARGET_SSE2)
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(sqrtsf2 patterns): Use 'x' instead of 'Y'.
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(sqrtextendsfdf2): Disable for SSE2.
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Wed Feb 14 00:11:20 CET 2001 Jan Hubicka <jh@suse.cz>
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* i386.md (movsfcc_1): Support integer cmove instruction.
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@ -4097,7 +4097,7 @@
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{
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if (TARGET_SSE2)
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{
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rtx out = force_reg (SImode, operands[0]);
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rtx out = REG_P (operands[0]) ? operands[0] : gen_reg_rtx (SImode);
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emit_insn (gen_fix_truncdfsi_sse (out, operands[1]));
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if (out != operands[0])
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emit_move_insn (operands[0], out);
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@ -4121,7 +4121,7 @@
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{
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if (TARGET_SSE2)
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{
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rtx out = force_reg (SImode, operands[0]);
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rtx out = REG_P (operands[0]) ? operands[0] : gen_reg_rtx (SImode);
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emit_insn (gen_fix_truncdfsi_sse (out, operands[1]));
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if (out != operands[0])
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emit_move_insn (operands[0], out);
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@ -10860,7 +10860,7 @@
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operands[4] = ix86_force_to_memory (GET_MODE (operands[2]), operands[2]);
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operands[4] = gen_rtx_FLOAT (GET_MODE (operands[0]), operands[4]);
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emit_insn (gen_rtx_SET (VOIDmode, operands[0],
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gen_rtx_fmt_ee (GET_CODE (operands[3]),
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gen_rtx_fmt_ee (GET_CODE (operands[5]),
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GET_MODE (operands[3]),
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operands[1],
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operands[4])));
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@ -10873,7 +10873,7 @@
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(define_expand "sqrtsf2"
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[(set (match_operand:SF 0 "register_operand" "")
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(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "")))]
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"(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE2"
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"(! TARGET_NO_FANCY_MATH_387 && TARGET_80387) || TARGET_SSE"
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"
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{
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if (!TARGET_SSE)
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@ -10881,8 +10881,8 @@
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}")
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(define_insn "sqrtsf2_1"
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[(set (match_operand:SF 0 "register_operand" "=f#Y,Y#f")
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(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#Y,Ym#f")))]
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[(set (match_operand:SF 0 "register_operand" "=f#x,x#f")
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(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "0#x,xm#f")))]
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
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&& (TARGET_SSE && TARGET_MIX_SSE_I387)"
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"@
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@ -10893,8 +10893,8 @@
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(set_attr "athlon_decode" "direct,*")])
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(define_insn "sqrtsf2_1_sse_only"
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[(set (match_operand:SF 0 "register_operand" "=Y")
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(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "Ym")))]
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[(set (match_operand:SF 0 "register_operand" "=x")
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(sqrt:SF (match_operand:SF 1 "nonimmediate_operand" "xm")))]
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"TARGET_SSE && (!TARGET_80387 || !TARGET_MIX_SSE_I387)"
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"sqrtss\\t{%1, %0|%0, %1}"
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[(set_attr "type" "sse")
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@ -10956,7 +10956,7 @@
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[(set (match_operand:DF 0 "register_operand" "=f")
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(sqrt:DF (float_extend:DF
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(match_operand:SF 1 "register_operand" "0"))))]
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387"
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"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && !TARGET_SSE2"
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"fsqrt"
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[(set_attr "type" "fpspc")
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(set_attr "mode" "DF")
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