h8300-protos.h: Change emit_a_rotate to output_a_rotate.
* config/h8300/h8300-protos.h: Change emit_a_rotate to output_a_rotate. Add a prototype for compute_a_rotate_length. * config/h8300/h8300.c (emit_a_rotate): Change to output_a_rotate. (compute_a_rotate_length): New. (h8300_adjust_insn_length): Remove. * config/h8300/h8300.h (ADJUST_INSN_LENGTH): Remove. * config/h8300/h8300.md (adjust_length): Remove. (*rotlqi3_1): Use output_a_rotate and compute_a_rotate_length. (*rotlhi3_1): Likewise. (*rotlsi3_1): Likewise. From-SVN: r68528
This commit is contained in:
Kazu Hirata
Kazu Hirata
parent
2f54a1db5e
commit
caf7f21af6
@ -1,3 +1,17 @@
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2003-06-26 Kazu Hirata <kazu@cs.umass.edu>
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* config/h8300/h8300-protos.h: Change emit_a_rotate to
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output_a_rotate. Add a prototype for compute_a_rotate_length.
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* config/h8300/h8300.c (emit_a_rotate): Change to
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output_a_rotate.
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(compute_a_rotate_length): New.
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(h8300_adjust_insn_length): Remove.
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* config/h8300/h8300.h (ADJUST_INSN_LENGTH): Remove.
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* config/h8300/h8300.md (adjust_length): Remove.
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(*rotlqi3_1): Use output_a_rotate and compute_a_rotate_length.
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(*rotlhi3_1): Likewise.
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(*rotlsi3_1): Likewise.
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2003-06-26 Roger Sayle <roger@eyesopen.com>
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Richard Henderson <rth@redhat.com>
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@ -33,7 +33,8 @@ extern int compute_plussi_cc (rtx *);
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extern const char *output_a_shift (rtx *);
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extern unsigned int compute_a_shift_length (rtx, rtx *);
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extern int compute_a_shift_cc (rtx, rtx *);
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extern const char *emit_a_rotate (enum rtx_code, rtx *);
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extern const char *output_a_rotate (enum rtx_code, rtx *);
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extern unsigned int compute_a_rotate_length (rtx *);
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extern const char *output_simode_bld (int, rtx[]);
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extern void print_operand_address (FILE *, rtx);
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extern void print_operand (FILE *, rtx, int);
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@ -3822,7 +3822,7 @@ compute_a_shift_cc (rtx insn ATTRIBUTE_UNUSED, rtx *operands)
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/* A rotation by a non-constant will cause a loop to be generated, in
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which a rotation by one bit is used. A rotation by a constant,
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including the one in the loop, will be taken care of by
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emit_a_rotate () at the insn emit time. */
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output_a_rotate () at the insn emit time. */
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int
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expand_a_rotate (enum rtx_code code, rtx operands[])
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@ -3877,10 +3877,10 @@ expand_a_rotate (enum rtx_code code, rtx operands[])
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return 1;
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}
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/* Emit rotate insns. */
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/* Output rotate insns. */
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const char *
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emit_a_rotate (enum rtx_code code, rtx *operands)
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output_a_rotate (enum rtx_code code, rtx *operands)
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{
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rtx dst = operands[0];
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rtx rotate_amount = operands[2];
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@ -3985,6 +3985,55 @@ emit_a_rotate (enum rtx_code code, rtx *operands)
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return "";
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}
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unsigned int
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compute_a_rotate_length (rtx *operands)
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{
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rtx src = operands[1];
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enum machine_mode mode = GET_MODE (src);
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int amount;
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unsigned int length = 0;
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if (GET_CODE (XEXP (src, 1)) != CONST_INT)
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return 0;
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amount = INTVAL (XEXP (src, 1));
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/* Clean up AMOUNT. */
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if (amount < 0)
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amount = 0;
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if ((unsigned int) amount > GET_MODE_BITSIZE (mode))
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amount = GET_MODE_BITSIZE (mode);
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/* Determine the faster direction. After this phase, amount
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will be at most a half of GET_MODE_BITSIZE (mode). */
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if ((unsigned int) amount > GET_MODE_BITSIZE (mode) / (unsigned) 2)
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/* Flip the direction. */
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amount = GET_MODE_BITSIZE (mode) - amount;
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/* See if a byte swap (in HImode) or a word swap (in SImode) can
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boost up the rotation. */
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if ((mode == HImode && TARGET_H8300 && amount >= 5)
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|| (mode == HImode && TARGET_H8300H && amount >= 6)
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|| (mode == HImode && TARGET_H8300S && amount == 8)
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|| (mode == SImode && TARGET_H8300H && amount >= 10)
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|| (mode == SImode && TARGET_H8300S && amount >= 13))
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{
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/* Adjust AMOUNT and flip the direction. */
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amount = GET_MODE_BITSIZE (mode) / 2 - amount;
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length += 6;
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}
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/* We use 2-bit rotations on the H8S. */
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if (TARGET_H8300S)
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amount = amount / 2 + amount % 2;
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/* The H8/300 uses three insns to rotate one bit, taking 6
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length. */
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length += amount * ((TARGET_H8300 && mode == HImode) ? 6 : 2);
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return length;
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}
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/* Fix the operands of a gen_xxx so that it could become a bit
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operating insn. */
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@ -4299,81 +4348,6 @@ output_simode_bld (int bild, rtx operands[])
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return "";
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}
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/* Given INSN and its current length LENGTH, return the adjustment
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(in bytes) to correctly compute INSN's length.
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We use this to get the lengths of various memory references correct. */
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int
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h8300_adjust_insn_length (rtx insn, int length ATTRIBUTE_UNUSED)
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{
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rtx pat = PATTERN (insn);
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/* We must filter these out before calling get_attr_adjust_length. */
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if (GET_CODE (pat) == USE
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|| GET_CODE (pat) == CLOBBER
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|| GET_CODE (pat) == SEQUENCE
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|| GET_CODE (pat) == ADDR_VEC
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|| GET_CODE (pat) == ADDR_DIFF_VEC)
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return 0;
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if (get_attr_adjust_length (insn) == ADJUST_LENGTH_NO)
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return 0;
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/* Rotations need various adjustments. */
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if (GET_CODE (pat) == SET
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&& (GET_CODE (SET_SRC (pat)) == ROTATE
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|| GET_CODE (SET_SRC (pat)) == ROTATERT))
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{
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rtx src = SET_SRC (pat);
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enum machine_mode mode = GET_MODE (src);
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int amount;
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int states = 0;
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if (GET_CODE (XEXP (src, 1)) != CONST_INT)
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return 0;
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amount = INTVAL (XEXP (src, 1));
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/* Clean up AMOUNT. */
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if (amount < 0)
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amount = 0;
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if ((unsigned int) amount > GET_MODE_BITSIZE (mode))
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amount = GET_MODE_BITSIZE (mode);
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/* Determine the faster direction. After this phase, amount
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will be at most a half of GET_MODE_BITSIZE (mode). */
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if ((unsigned int) amount > GET_MODE_BITSIZE (mode) / (unsigned) 2)
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/* Flip the direction. */
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amount = GET_MODE_BITSIZE (mode) - amount;
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/* See if a byte swap (in HImode) or a word swap (in SImode) can
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boost up the rotation. */
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if ((mode == HImode && TARGET_H8300 && amount >= 5)
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|| (mode == HImode && TARGET_H8300H && amount >= 6)
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|| (mode == HImode && TARGET_H8300S && amount == 8)
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|| (mode == SImode && TARGET_H8300H && amount >= 10)
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|| (mode == SImode && TARGET_H8300S && amount >= 13))
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{
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/* Adjust AMOUNT and flip the direction. */
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amount = GET_MODE_BITSIZE (mode) / 2 - amount;
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states += 6;
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}
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/* We use 2-bit rotations on the H8S. */
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if (TARGET_H8300S)
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amount = amount / 2 + amount % 2;
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/* The H8/300 uses three insns to rotate one bit, taking 6
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states. */
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states += amount * ((TARGET_H8300 && mode == HImode) ? 6 : 2);
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return -(20 - states);
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}
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return 0;
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}
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#ifndef OBJECT_FORMAT_ELF
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static void
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h8300_asm_named_section (const char *name, unsigned int flags ATTRIBUTE_UNUSED)
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@ -1002,9 +1002,6 @@ struct cum_arg
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so give the MEM rtx a byte's mode. */
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#define FUNCTION_MODE QImode
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#define ADJUST_INSN_LENGTH(INSN, LENGTH) \
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LENGTH += h8300_adjust_insn_length (INSN, LENGTH);
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#define BRANCH_COST 0
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/* Tell final.c how to eliminate redundant test instructions. */
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@ -22,11 +22,9 @@
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;; the Free Software Foundation, 59 Temple Place - Suite 330,
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;; Boston, MA 02111-1307, USA.
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;; Some of the extend instructions accept a general_operand_src, which
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;; allows all the normal memory addressing modes. The length computations
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;; don't take this into account. The lengths in the MD file should be
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;; "worst case" and then be adjusted to their correct values by
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;; h8300_adjust_insn_length.
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;; We compute exact length on each instruction for most of the time.
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;; In some case, most notably bit operations that may involve memory
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;; operands, the lengths in this file are "worst case".
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;; On the H8/300H and H8S, adds/subs operate on the 32bit "er"
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;; registers. Right now GCC doesn't expose the "e" half to the
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@ -90,12 +88,6 @@
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(const_int 6)))]
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(const_int 200)))
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;; The necessity of instruction length adjustment.
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(define_attr "adjust_length" "yes,no"
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(cond [(eq_attr "type" "branch") (const_string "no")]
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(const_string "yes")))
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;; Condition code settings.
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;;
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;; none - insn does not affect cc
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@ -1180,7 +1172,6 @@
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and %X2,%X0
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bclr %W2,%R0"
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[(set_attr "length" "2,8")
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(set_attr "adjust_length" "no")
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(set_attr "cc" "set_znv,none_0hit")])
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(define_expand "andqi3"
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@ -1281,7 +1272,6 @@
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or\\t%X2,%X0
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bset\\t%V2,%R0"
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[(set_attr "length" "2,8")
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(set_attr "adjust_length" "no")
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(set_attr "cc" "set_znv,none_0hit")])
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(define_expand "iorqi3"
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@ -1323,7 +1313,6 @@
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xor\\t%X2,%X0
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bnot\\t%V2,%R0"
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[(set_attr "length" "2,8")
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(set_attr "adjust_length" "no")
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(set_attr "cc" "set_znv,none_0hit")])
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(define_expand "xorqi3"
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@ -2441,8 +2430,9 @@
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(rotate:QI (match_operand:QI 1 "register_operand" "0")
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(match_operand:QI 2 "immediate_operand" "")))]
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""
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"* return emit_a_rotate (ROTATE, operands);"
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[(set_attr "length" "20")
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"* return output_a_rotate (ROTATE, operands);"
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[(set (attr "length")
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(symbol_ref "compute_a_rotate_length (operands)"))
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(set_attr "cc" "clobber")])
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(define_expand "rotlhi3"
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@ -2457,8 +2447,9 @@
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(rotate:HI (match_operand:HI 1 "register_operand" "0")
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(match_operand:QI 2 "immediate_operand" "")))]
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""
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"* return emit_a_rotate (ROTATE, operands);"
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[(set_attr "length" "20")
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"* return output_a_rotate (ROTATE, operands);"
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[(set (attr "length")
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(symbol_ref "compute_a_rotate_length (operands)"))
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(set_attr "cc" "clobber")])
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(define_expand "rotlsi3"
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@ -2473,8 +2464,9 @@
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(rotate:SI (match_operand:SI 1 "register_operand" "0")
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(match_operand:QI 2 "immediate_operand" "")))]
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"TARGET_H8300H || TARGET_H8300S"
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"* return emit_a_rotate (ROTATE, operands);"
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[(set_attr "length" "20")
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"* return output_a_rotate (ROTATE, operands);"
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[(set (attr "length")
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(symbol_ref "compute_a_rotate_length (operands)"))
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(set_attr "cc" "clobber")])
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;; -----------------------------------------------------------------
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@ -2633,8 +2625,7 @@
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""
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"bld %Z2,%Y1\;b%c4 #0,%R0\;bst #0,%R0; bl1"
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[(set_attr "cc" "clobber")
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(set_attr "length" "6")
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(set_attr "adjust_length" "no")])
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(set_attr "length" "6")])
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(define_insn ""
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[(set (match_operand:HI 0 "bit_operand" "=Ur")
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@ -2648,8 +2639,7 @@
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""
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"bld %Z2,%Y1\;b%c5 %Z4,%Y3\;bst #0,%R0; bl3"
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[(set_attr "cc" "clobber")
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(set_attr "length" "6")
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(set_attr "adjust_length" "no")])
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(set_attr "length" "6")])
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;; -----------------------------------------------------------------
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;; COMBINE PATTERNS
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