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re PR rtl-optimization/12612 (ICE when using log function with -O3 -ffast-math)

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* i386.c (print_reg): Do not abort on certain registers.

	PR optimization/12612
	* reg-stack.c (subst_stack_regs_pat):  Use st(1) for clobbers.
	* i386.md (fpatan, fyl2x, fscale patterns and expanders): Use
	match_scratch; avoid bogus paralles.

	PR target/12674
	* i386.c (ix86_function_regparm): Disable implicit register passing
	conventions when profiling.

From-SVN: r72681
This commit is contained in:
Jan Hubicka 2003-10-19 20:00:12 +02:00 committed by Jan Hubicka
parent 707e58b1a7
commit cb0bc26338
4 changed files with 83 additions and 76 deletions
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13
gcc/ChangeLog
View File

@ -1,3 +1,16 @@
2003-10-19 Jan Hubicka <jh@suse.cz>
* i386.c (print_reg): Do not abort on certain registers.
PR optimization/12612
* reg-stack.c (subst_stack_regs_pat): Use st(1) for clobbers.
* i386.md (fpatan, fyl2x, fscale patterns and expanders): Use
match_scratch; avoid bogus paralles.
PR target/12674
* i386.c (ix86_function_regparm): Disable implicit register passing
conventions when profiling.
2003-10-19 Eric Botcazou <ebotcazou@libertysurf.fr> 2003-10-19 Eric Botcazou <ebotcazou@libertysurf.fr>
Richard Henderson <rth@redhat.com> Richard Henderson <rth@redhat.com>

8
gcc/config/i386/i386.c
View File

@ -1688,7 +1688,7 @@ ix86_function_regparm (tree type, tree decl)
/* Use register calling convention for local functions when possible. */ /* Use register calling convention for local functions when possible. */
if (!TARGET_64BIT && !user_convention && decl if (!TARGET_64BIT && !user_convention && decl
&& flag_unit_at_a_time) && flag_unit_at_a_time && !profile_flag)
{ {
struct cgraph_local_info *i = cgraph_local_info (decl); struct cgraph_local_info *i = cgraph_local_info (decl);
if (i && i->local) if (i && i->local)
@ -6884,12 +6884,6 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse,
void void
print_reg (rtx x, int code, FILE *file) print_reg (rtx x, int code, FILE *file)
{ {
if (REGNO (x) == ARG_POINTER_REGNUM
|| REGNO (x) == FRAME_POINTER_REGNUM
|| REGNO (x) == FLAGS_REG
|| REGNO (x) == FPSR_REG)
abort ();
if (ASSEMBLER_DIALECT == ASM_ATT || USER_LABEL_PREFIX[0] == 0) if (ASSEMBLER_DIALECT == ASM_ATT || USER_LABEL_PREFIX[0] == 0)
putc ('%', file); putc ('%', file);

136
gcc/config/i386/i386.md
View File

@ -15609,11 +15609,11 @@
(set_attr "mode" "XF")]) (set_attr "mode" "XF")])
(define_insn "atan2df3_1" (define_insn "atan2df3_1"
[(parallel [(set (match_operand:DF 0 "register_operand" "=f") [(set (match_operand:DF 0 "register_operand" "=f")
(unspec:DF [(match_operand:DF 2 "register_operand" "0") (unspec:DF [(match_operand:DF 2 "register_operand" "0")
(match_operand:DF 1 "register_operand" "u")] (match_operand:DF 1 "register_operand" "u")]
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_dup 1))])] (clobber (match_scratch:DF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
"fpatan" "fpatan"
@ -15634,11 +15634,11 @@
}) })
(define_insn "atan2sf3_1" (define_insn "atan2sf3_1"
[(parallel [(set (match_operand:SF 0 "register_operand" "=f") [(set (match_operand:SF 0 "register_operand" "=f")
(unspec:SF [(match_operand:SF 2 "register_operand" "0") (unspec:SF [(match_operand:SF 2 "register_operand" "0")
(match_operand:SF 1 "register_operand" "u")] (match_operand:SF 1 "register_operand" "u")]
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_dup 1))])] (clobber (match_scratch:SF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
"fpatan" "fpatan"
@ -15659,11 +15659,11 @@
}) })
(define_insn "atan2xf3_1" (define_insn "atan2xf3_1"
[(parallel [(set (match_operand:XF 0 "register_operand" "=f") [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 2 "register_operand" "0") (unspec:XF [(match_operand:XF 2 "register_operand" "0")
(match_operand:XF 1 "register_operand" "u")] (match_operand:XF 1 "register_operand" "u")]
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_dup 1))])] (clobber (match_scratch:XF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && ! TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && ! TARGET_128BIT_LONG_DOUBLE"
"fpatan" "fpatan"
@ -15684,11 +15684,11 @@
}) })
(define_insn "atan2tf3_1" (define_insn "atan2tf3_1"
[(parallel [(set (match_operand:TF 0 "register_operand" "=f") [(set (match_operand:TF 0 "register_operand" "=f")
(unspec:TF [(match_operand:TF 2 "register_operand" "0") (unspec:TF [(match_operand:TF 2 "register_operand" "0")
(match_operand:TF 1 "register_operand" "u")] (match_operand:TF 1 "register_operand" "u")]
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_dup 1))])] (clobber (match_scratch:TF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
"fpatan" "fpatan"
@ -15709,11 +15709,11 @@
}) })
(define_insn "*fyl2x_sfxf3" (define_insn "*fyl2x_sfxf3"
[(parallel [(set (match_operand:SF 0 "register_operand" "=f") [(set (match_operand:SF 0 "register_operand" "=f")
(unspec:SF [(match_operand:SF 2 "register_operand" "0") (unspec:SF [(match_operand:SF 2 "register_operand" "0")
(match_operand 1 "register_operand" "u")] (match_operand 1 "register_operand" "u")]
UNSPEC_FYL2X)) UNSPEC_FYL2X))
(clobber (match_dup 1))])] (clobber (match_scratch:SF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && flag_unsafe_math_optimizations
&& GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)" && GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)"
@ -15722,11 +15722,11 @@
(set_attr "mode" "SF")]) (set_attr "mode" "SF")])
(define_insn "*fyl2x_dfxf3" (define_insn "*fyl2x_dfxf3"
[(parallel [(set (match_operand:DF 0 "register_operand" "=f") [(set (match_operand:DF 0 "register_operand" "=f")
(unspec:DF [(match_operand:DF 2 "register_operand" "0") (unspec:DF [(match_operand:DF 2 "register_operand" "0")
(match_operand 1 "register_operand" "u")] (match_operand 1 "register_operand" "u")]
UNSPEC_FYL2X)) UNSPEC_FYL2X))
(clobber (match_dup 1))])] (clobber (match_scratch:DF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && flag_unsafe_math_optimizations
&& GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)" && GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)"
@ -15735,11 +15735,11 @@
(set_attr "mode" "DF")]) (set_attr "mode" "DF")])
(define_insn "*fyl2x_xf3" (define_insn "*fyl2x_xf3"
[(parallel [(set (match_operand:XF 0 "register_operand" "=f") [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 2 "register_operand" "0") (unspec:XF [(match_operand:XF 2 "register_operand" "0")
(match_operand:XF 1 "register_operand" "u")] (match_operand:XF 1 "register_operand" "u")]
UNSPEC_FYL2X)) UNSPEC_FYL2X))
(clobber (match_dup 1))])] (clobber (match_scratch:XF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
"fyl2x" "fyl2x"
@ -15747,11 +15747,11 @@
(set_attr "mode" "XF")]) (set_attr "mode" "XF")])
(define_insn "*fyl2x_tfxf3" (define_insn "*fyl2x_tfxf3"
[(parallel [(set (match_operand:TF 0 "register_operand" "=f") [(set (match_operand:TF 0 "register_operand" "=f")
(unspec:TF [(match_operand:TF 2 "register_operand" "0") (unspec:TF [(match_operand:TF 2 "register_operand" "0")
(match_operand:TF 1 "register_operand" "u")] (match_operand:TF 1 "register_operand" "u")]
UNSPEC_FYL2X)) UNSPEC_FYL2X))
(clobber (match_dup 1))])] (clobber (match_scratch:TF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
"fyl2x" "fyl2x"
@ -15762,7 +15762,7 @@
[(parallel [(set (match_operand:SF 0 "register_operand" "") [(parallel [(set (match_operand:SF 0 "register_operand" "")
(unspec:SF [(match_operand:SF 1 "register_operand" "") (unspec:SF [(match_operand:SF 1 "register_operand" "")
(match_dup 2)] UNSPEC_FYL2X)) (match_dup 2)] UNSPEC_FYL2X))
(clobber (match_dup 2))])] (clobber (match_scratch:SF 3 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
{ {
@ -15777,7 +15777,7 @@
[(parallel [(set (match_operand:DF 0 "register_operand" "") [(parallel [(set (match_operand:DF 0 "register_operand" "")
(unspec:DF [(match_operand:DF 1 "register_operand" "") (unspec:DF [(match_operand:DF 1 "register_operand" "")
(match_dup 2)] UNSPEC_FYL2X)) (match_dup 2)] UNSPEC_FYL2X))
(clobber (match_dup 2))])] (clobber (match_scratch:DF 3 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
{ {
@ -15792,7 +15792,7 @@
[(parallel [(set (match_operand:XF 0 "register_operand" "") [(parallel [(set (match_operand:XF 0 "register_operand" "")
(unspec:XF [(match_operand:XF 1 "register_operand" "") (unspec:XF [(match_operand:XF 1 "register_operand" "")
(match_dup 2)] UNSPEC_FYL2X)) (match_dup 2)] UNSPEC_FYL2X))
(clobber (match_dup 2))])] (clobber (match_scratch:XF 3 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
{ {
@ -15807,7 +15807,7 @@
[(parallel [(set (match_operand:TF 0 "register_operand" "") [(parallel [(set (match_operand:TF 0 "register_operand" "")
(unspec:TF [(match_operand:TF 1 "register_operand" "") (unspec:TF [(match_operand:TF 1 "register_operand" "")
(match_dup 2)] UNSPEC_FYL2X)) (match_dup 2)] UNSPEC_FYL2X))
(clobber (match_dup 2))])] (clobber (match_scratch:TF 3 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
{ {
@ -15819,11 +15819,11 @@
}) })
(define_insn "*fscale_sfxf3" (define_insn "*fscale_sfxf3"
[(parallel [(set (match_operand:SF 0 "register_operand" "=f") [(set (match_operand:SF 0 "register_operand" "=f")
(unspec:SF [(match_operand 2 "register_operand" "0") (unspec:SF [(match_operand 2 "register_operand" "0")
(match_operand 1 "register_operand" "u")] (match_operand 1 "register_operand" "u")]
UNSPEC_FSCALE)) UNSPEC_FSCALE))
(clobber (match_dup 1))])] (clobber (match_scratch:SF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && flag_unsafe_math_optimizations
&& GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode) && GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)
@ -15833,11 +15833,11 @@
(set_attr "mode" "SF")]) (set_attr "mode" "SF")])
(define_insn "*fscale_dfxf3" (define_insn "*fscale_dfxf3"
[(parallel [(set (match_operand:DF 0 "register_operand" "=f") [(set (match_operand:DF 0 "register_operand" "=f")
(unspec:DF [(match_operand 2 "register_operand" "0") (unspec:DF [(match_operand 2 "register_operand" "0")
(match_operand 1 "register_operand" "u")] (match_operand 1 "register_operand" "u")]
UNSPEC_FSCALE)) UNSPEC_FSCALE))
(clobber (match_dup 1))])] (clobber (match_scratch:DF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && flag_unsafe_math_optimizations
&& GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode) && GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)
@ -15847,11 +15847,11 @@
(set_attr "mode" "DF")]) (set_attr "mode" "DF")])
(define_insn "*fscale_xf3" (define_insn "*fscale_xf3"
[(parallel [(set (match_operand:XF 0 "register_operand" "=f") [(set (match_operand:XF 0 "register_operand" "=f")
(unspec:XF [(match_operand:XF 2 "register_operand" "0") (unspec:XF [(match_operand:XF 2 "register_operand" "0")
(match_operand:XF 1 "register_operand" "u")] (match_operand:XF 1 "register_operand" "u")]
UNSPEC_FSCALE)) UNSPEC_FSCALE))
(clobber (match_dup 1))])] (clobber (match_scratch:XF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
"fscale\;fstp\t%y1" "fscale\;fstp\t%y1"
@ -15859,11 +15859,11 @@
(set_attr "mode" "XF")]) (set_attr "mode" "XF")])
(define_insn "*fscale_tf3" (define_insn "*fscale_tf3"
[(parallel [(set (match_operand:TF 0 "register_operand" "=f") [(set (match_operand:TF 0 "register_operand" "=f")
(unspec:TF [(match_operand:TF 2 "register_operand" "0") (unspec:TF [(match_operand:TF 2 "register_operand" "0")
(match_operand:TF 1 "register_operand" "u")] (match_operand:TF 1 "register_operand" "u")]
UNSPEC_FSCALE)) UNSPEC_FSCALE))
(clobber (match_dup 1))])] (clobber (match_scratch:TF 3 "=1"))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
"fscale\;fstp\t%y1" "fscale\;fstp\t%y1"
@ -15920,7 +15920,7 @@
(set (match_dup 9) (plus:XF (match_dup 7) (match_dup 8))) (set (match_dup 9) (plus:XF (match_dup 7) (match_dup 8)))
(parallel [(set (match_operand:SF 0 "register_operand" "") (parallel [(set (match_operand:SF 0 "register_operand" "")
(unspec:SF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE)) (unspec:SF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE))
(clobber (match_dup 5))])] (clobber (match_scratch:SF 5 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
{ {
@ -15950,7 +15950,7 @@
(set (match_dup 9) (plus:TF (match_dup 7) (match_dup 8))) (set (match_dup 9) (plus:TF (match_dup 7) (match_dup 8)))
(parallel [(set (match_operand:SF 0 "register_operand" "") (parallel [(set (match_operand:SF 0 "register_operand" "")
(unspec:SF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE)) (unspec:SF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE))
(clobber (match_dup 5))])] (clobber (match_scratch:SF 5 ""))])]
"" ""
{ {
rtx temp; rtx temp;
@ -15973,7 +15973,7 @@
(set (match_dup 9) (plus:XF (match_dup 7) (match_dup 8))) (set (match_dup 9) (plus:XF (match_dup 7) (match_dup 8)))
(parallel [(set (match_operand:DF 0 "register_operand" "") (parallel [(set (match_operand:DF 0 "register_operand" "")
(unspec:DF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE)) (unspec:DF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE))
(clobber (match_dup 5))])] (clobber (match_scratch:DF 5 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
{ {
@ -16004,7 +16004,7 @@
(set (match_dup 9) (plus:TF (match_dup 7) (match_dup 8))) (set (match_dup 9) (plus:TF (match_dup 7) (match_dup 8)))
(parallel [(set (match_operand:DF 0 "register_operand" "") (parallel [(set (match_operand:DF 0 "register_operand" "")
(unspec:DF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE)) (unspec:DF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE))
(clobber (match_dup 5))])] (clobber (match_scratch:DF 5 ""))])]
"" ""
{ {
rtx temp; rtx temp;
@ -16026,7 +16026,7 @@
(set (match_dup 8) (plus:XF (match_dup 6) (match_dup 7))) (set (match_dup 8) (plus:XF (match_dup 6) (match_dup 7)))
(parallel [(set (match_operand:XF 0 "register_operand" "") (parallel [(set (match_operand:XF 0 "register_operand" "")
(unspec:XF [(match_dup 8) (match_dup 4)] UNSPEC_FSCALE)) (unspec:XF [(match_dup 8) (match_dup 4)] UNSPEC_FSCALE))
(clobber (match_dup 4))])] (clobber (match_scratch:XF 5 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
{ {
@ -16062,7 +16062,7 @@
(set (match_dup 8) (plus:TF (match_dup 6) (match_dup 7))) (set (match_dup 8) (plus:TF (match_dup 6) (match_dup 7)))
(parallel [(set (match_operand:TF 0 "register_operand" "") (parallel [(set (match_operand:TF 0 "register_operand" "")
(unspec:TF [(match_dup 8) (match_dup 4)] UNSPEC_FSCALE)) (unspec:TF [(match_dup 8) (match_dup 4)] UNSPEC_FSCALE))
(clobber (match_dup 4))])] (clobber (match_scratch:TF 5 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
{ {
@ -16081,7 +16081,7 @@
(unspec:DF [(match_dup 2) (unspec:DF [(match_dup 2)
(match_operand:DF 1 "register_operand" "")] (match_operand:DF 1 "register_operand" "")]
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_dup 1))])] (clobber (match_scratch:DF 3 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations" && flag_unsafe_math_optimizations"
{ {
@ -16094,7 +16094,7 @@
(unspec:XF [(match_dup 2) (unspec:XF [(match_dup 2)
(match_operand:XF 1 "register_operand" "")] (match_operand:XF 1 "register_operand" "")]
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_dup 1))])] (clobber (match_scratch:XF 3 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
{ {
@ -16107,7 +16107,7 @@
(unspec:TF [(match_dup 2) (unspec:TF [(match_dup 2)
(match_operand:TF 1 "register_operand" "")] (match_operand:TF 1 "register_operand" "")]
UNSPEC_FPATAN)) UNSPEC_FPATAN))
(clobber (match_dup 1))])] (clobber (match_scratch:TF 3 ""))])]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE" && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
{ {

2
gcc/reg-stack.c
View File

@ -1430,7 +1430,7 @@ subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
abort (); abort ();
} }
remove_note (insn, note); remove_note (insn, note);
replace_reg (dest, LAST_STACK_REG); replace_reg (dest, FIRST_STACK_REG + 1);
} }
else else
{ {