Remove -mfused-madd and add -mfma.
2011-07-13 H.J. Lu <hongjiu.lu@intel.com> * doc/invoke.texi (x86): Remove -mfused-madd and add -mfma. From-SVN: r176230
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@ -1,3 +1,7 @@
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2011-07-13 H.J. Lu <hongjiu.lu@intel.com>
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* doc/invoke.texi (x86): Remove -mfused-madd and add -mfma.
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2011-07-13 Richard Sandiford <richard.sandiford@linaro.org>
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2011-07-13 Richard Sandiford <richard.sandiford@linaro.org>
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* tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): Tighten
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* tree-vect-loop-manip.c (vect_create_cond_for_alias_checks): Tighten
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@ -600,7 +600,7 @@ Objective-C and Objective-C++ Dialects}.
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-mincoming-stack-boundary=@var{num} @gol
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-mincoming-stack-boundary=@var{num} @gol
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-mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip -mvzeroupper @gol
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-mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip -mvzeroupper @gol
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-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
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-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
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-maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfused-madd @gol
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-maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol
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-msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp @gol
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-msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp @gol
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-mthreads -mno-align-stringops -minline-all-stringops @gol
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-mthreads -mno-align-stringops -minline-all-stringops @gol
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-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
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-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
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@ -12587,6 +12587,8 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
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@itemx -mno-rdrnd
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@itemx -mno-rdrnd
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@itemx -mf16c
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@itemx -mf16c
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@itemx -mno-f16c
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@itemx -mno-f16c
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@itemx -mfma
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@itemx -mno-fma
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@itemx -msse4a
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@itemx -msse4a
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@itemx -mno-sse4a
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@itemx -mno-sse4a
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@itemx -mfma4
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@itemx -mfma4
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@ -12612,9 +12614,9 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}.
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@opindex mno-sse
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@opindex mno-sse
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@opindex m3dnow
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@opindex m3dnow
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@opindex mno-3dnow
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@opindex mno-3dnow
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These switches enable or disable the use of instructions in the MMX,
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These switches enable or disable the use of instructions in the MMX, SSE,
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SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND,
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SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA,
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F16C, SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets.
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SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets.
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These extensions are also available as built-in functions: see
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These extensions are also available as built-in functions: see
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@ref{X86 Built-in Functions}, for details of the functions enabled and
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@ref{X86 Built-in Functions}, for details of the functions enabled and
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disabled by these switches.
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disabled by these switches.
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@ -12633,13 +12635,6 @@ supported architecture, using the appropriate flags. In particular,
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the file containing the CPU detection code should be compiled without
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the file containing the CPU detection code should be compiled without
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these options.
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these options.
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@item -mfused-madd
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@itemx -mno-fused-madd
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@opindex mfused-madd
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@opindex mno-fused-madd
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Do (don't) generate code that uses the fused multiply/add or multiply/subtract
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instructions. The default is to use these instructions.
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@item -mcld
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@item -mcld
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@opindex mcld
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@opindex mcld
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This option instructs GCC to emit a @code{cld} instruction in the prologue
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This option instructs GCC to emit a @code{cld} instruction in the prologue
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