md.texi: Update documentation of MIPS constraints.
* doc/md.texi: Update documentation of MIPS constraints. * config/mips/constraints.md: New file. * config/mips/mips.md: Include it. * config/mips/mips.c (mips_char_to_class): Delete. (override_options): Don't initialize mips_char_to_class. * config/mips/mips.h (mips_char_to_class): Delete. (REG_CLASS_FROM_LETTER): Delete. (CONST_OK_FOR_LETTER_P): Delete. (CONST_DOUBLE_OK_FOR_LETTER_P): Delete. (EXTRA_CONSTRAINT_Y): Delete. (EXTRA_CONSTRAINT_STR): Delete. (CONSTRAINT_LEN): Delete. (EXTRA_MEMORY_CONSTRAINT): Delete. From-SVN: r111868
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
1799e5d5ca
commit
cbbb5b6da1
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@ -1,3 +1,19 @@
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2006-03-09 Richard Sandiford <richard@codesourcery.com>
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* doc/md.texi: Update documentation of MIPS constraints.
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* config/mips/constraints.md: New file.
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* config/mips/mips.md: Include it.
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* config/mips/mips.c (mips_char_to_class): Delete.
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(override_options): Don't initialize mips_char_to_class.
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* config/mips/mips.h (mips_char_to_class): Delete.
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(REG_CLASS_FROM_LETTER): Delete.
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(CONST_OK_FOR_LETTER_P): Delete.
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(CONST_DOUBLE_OK_FOR_LETTER_P): Delete.
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(EXTRA_CONSTRAINT_Y): Delete.
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(EXTRA_CONSTRAINT_STR): Delete.
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(CONSTRAINT_LEN): Delete.
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(EXTRA_MEMORY_CONSTRAINT): Delete.
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2006-03-09 Diego Novillo <dnovillo@redhat.com>
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* tree-cfg.c (move_block_to_fn): Remove the statements from the
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@ -0,0 +1,195 @@
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;; Constraint definitions for MIPS.
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;; Copyright (C) 2006 Free Software Foundation, Inc.
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;;
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;; This file is part of GCC.
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;;
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;; GCC is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 2, or (at your option)
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;; any later version.
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;;
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;; GCC is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with GCC; see the file COPYING. If not, write to
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;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
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;; Boston, MA 02110-1301, USA.
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;; Register constraints
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(define_register_constraint "d" "BASE_REG_CLASS"
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"An address register. This is equivalent to @code{r} unless
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generating MIPS16 code.")
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(define_register_constraint "t" "T_REG"
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"@internal")
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(define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
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"A floating-point register (if available).")
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(define_register_constraint "h" "HI_REG"
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"The @code{hi} register.")
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(define_register_constraint "l" "LO_REG"
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"The @code{lo} register.")
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(define_register_constraint "x" "MD_REGS"
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"The @code{hi} and @code{lo} registers.")
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(define_register_constraint "b" "ALL_REGS"
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"@internal")
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(define_register_constraint "c" "TARGET_ABICALLS ? PIC_FN_ADDR_REG
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: TARGET_MIPS16 ? M16_NA_REGS
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: GR_REGS"
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"A register suitable for use in an indirect jump. This will always be
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@code{$25} for @option{-mabicalls}.")
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(define_register_constraint "e" "LEA_REGS"
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"@internal")
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(define_register_constraint "j" "PIC_FN_ADDR_REG"
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"@internal")
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(define_register_constraint "v" "V1_REG"
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"@internal")
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(define_register_constraint "y" "GR_REGS"
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"Equivalent to @code{r}; retained for backwards compatibility.")
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(define_register_constraint "z" "ST_REGS"
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"A floating-point condition code register.")
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(define_register_constraint "A" "DSP_ACC_REGS"
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"@internal")
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(define_register_constraint "a" "ACC_REGS"
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"@internal")
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(define_register_constraint "B" "COP0_REGS"
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"@internal")
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(define_register_constraint "C" "COP2_REGS"
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"@internal")
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(define_register_constraint "D" "COP3_REGS"
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"@internal")
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;; Integer constraints
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(define_constraint "I"
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"A signed 16-bit constant (for arithmetic instructions)."
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(and (match_code "const_int")
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(match_test "SMALL_OPERAND (ival)")))
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(define_constraint "J"
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"Integer zero."
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(and (match_code "const_int")
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(match_test "ival == 0")))
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(define_constraint "K"
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"An unsigned 16-bit constant (for logic instructions)."
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(and (match_code "const_int")
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(match_test "SMALL_OPERAND_UNSIGNED (ival)")))
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(define_constraint "L"
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"A signed 32-bit constant in which the lower 16 bits are zero.
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Such constants can be loaded using @code{lui}."
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(and (match_code "const_int")
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(match_test "LUI_OPERAND (ival)")))
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(define_constraint "M"
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"A constant that cannot be loaded using @code{lui}, @code{addiu}
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or @code{ori}."
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(and (match_code "const_int")
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(match_test "!SMALL_OPERAND (ival)")
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(match_test "!SMALL_OPERAND_UNSIGNED (ival)")
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(match_test "!LUI_OPERAND (ival)")))
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(define_constraint "N"
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"A constant in the range -65535 to -1 (inclusive)."
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(and (match_code "const_int")
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(match_test "ival >= -0xffff && ival < 0")))
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(define_constraint "O"
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"A signed 15-bit constant."
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(and (match_code "const_int")
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(match_test "ival >= -0x4000 && ival < 0x4000")))
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(define_constraint "P"
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"A constant in the range 1 to 65535 (inclusive)."
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(and (match_code "const_int")
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(match_test "ival > 0 && ival < 0x10000")))
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;; Floating-point constraints
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(define_constraint "G"
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"Floating-point zero."
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(and (match_code "const_double")
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(match_test "op == CONST0_RTX (mode)")))
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;; General constraints
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(define_constraint "Q"
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"@internal"
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(match_operand 0 "const_arith_operand"))
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(define_memory_constraint "R"
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"An address that can be used in a non-macro load or store."
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(and (match_code "mem")
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(match_test "mips_fetch_insns (op) == 1")))
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(define_constraint "S"
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"@internal
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A constant call address."
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(and (match_operand 0 "call_insn_operand")
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(match_test "CONSTANT_P (op)")))
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(define_constraint "T"
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"@internal
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A constant @code{move_operand} that cannot be safely loaded into @code{$25}
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using @code{la}."
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(and (match_operand 0 "move_operand")
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(match_test "CONSTANT_P (op)")
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(match_test "mips_dangerous_for_la25_p (op)")))
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(define_constraint "U"
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"@internal
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A constant @code{move_operand} that can be safely loaded into @code{$25}
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using @code{la}."
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(and (match_operand 0 "move_operand")
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(match_test "CONSTANT_P (op)")
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(match_test "!mips_dangerous_for_la25_p (op)")))
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(define_memory_constraint "W"
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"@internal
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A memory address based on a member of @code{BASE_REG_CLASS}. This is
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true for all non-mips16 references (although it can sometimes be implicit
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if @samp{!TARGET_EXPLICIT_RELOCS}). For MIPS16, it excludes stack and
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constant-pool references."
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(and (match_code "mem")
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(match_operand 0 "memory_operand")
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(ior (match_test "!TARGET_MIPS16")
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(and (not (match_operand 0 "stack_operand"))
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(not (match_test "CONSTANT_P (XEXP (op, 0))"))))))
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(define_constraint "YG"
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"@internal
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A vector zero."
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(and (match_code "const_vector")
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(match_test "op == CONST0_RTX (mode)")))
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(define_constraint "YA"
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"@internal
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An unsigned 6-bit constant."
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(and (match_code "const_int")
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(match_test "UIMM6_OPERAND (ival)")))
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(define_constraint "YB"
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"@internal
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A signed 10-bit constant."
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(and (match_code "const_int")
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(match_test "IMM10_OPERAND (ival)")))
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@ -690,9 +690,6 @@ const enum reg_class mips_regno_to_class[] =
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ALL_REGS, ALL_REGS, ALL_REGS, ALL_REGS
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};
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/* Map register constraint character to register class. */
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enum reg_class mips_char_to_class[256];
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/* Table of machine dependent attributes. */
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const struct attribute_spec mips_attribute_table[] =
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{
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@ -4844,27 +4841,6 @@ override_options (void)
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mips_print_operand_punct['+'] = 1;
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mips_print_operand_punct['~'] = 1;
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mips_char_to_class['d'] = TARGET_MIPS16 ? M16_REGS : GR_REGS;
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mips_char_to_class['t'] = T_REG;
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mips_char_to_class['f'] = (TARGET_HARD_FLOAT ? FP_REGS : NO_REGS);
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mips_char_to_class['h'] = HI_REG;
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mips_char_to_class['l'] = LO_REG;
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mips_char_to_class['x'] = MD_REGS;
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mips_char_to_class['b'] = ALL_REGS;
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mips_char_to_class['c'] = (TARGET_ABICALLS ? PIC_FN_ADDR_REG :
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TARGET_MIPS16 ? M16_NA_REGS :
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GR_REGS);
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mips_char_to_class['e'] = LEA_REGS;
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mips_char_to_class['j'] = PIC_FN_ADDR_REG;
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mips_char_to_class['v'] = V1_REG;
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mips_char_to_class['y'] = GR_REGS;
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mips_char_to_class['z'] = ST_REGS;
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mips_char_to_class['B'] = COP0_REGS;
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mips_char_to_class['C'] = COP2_REGS;
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mips_char_to_class['D'] = COP3_REGS;
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mips_char_to_class['A'] = DSP_ACC_REGS;
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mips_char_to_class['a'] = ACC_REGS;
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/* Set up array to map GCC register number to debug register number.
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Ignore the special purpose register numbers. */
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@ -1636,35 +1636,6 @@ extern const enum reg_class mips_regno_to_class[];
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#define ORDER_REGS_FOR_LOCAL_ALLOC mips_order_regs_for_local_alloc ()
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/* REGISTER AND CONSTANT CLASSES */
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/* Get reg_class from a letter such as appears in the machine
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description.
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DEFINED REGISTER CLASSES:
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'd' General (aka integer) registers
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Normally this is GR_REGS, but in mips16 mode this is M16_REGS
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'y' General registers (in both mips16 and non mips16 mode)
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'e' Effective address registers (general registers except $25)
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't' mips16 temporary register ($24)
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'f' Floating point registers
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'h' Hi register
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'l' Lo register
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'v' $v1 only
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'x' Multiply/divide registers
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'z' FP Status register
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'B' Cop0 register
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'C' Cop2 register
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'D' Cop3 register
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'A' DSP accumulator registers
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'a' MD registers and DSP accumulator registers
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'b' All registers */
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extern enum reg_class mips_char_to_class[256];
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#define REG_CLASS_FROM_LETTER(C) mips_char_to_class[(unsigned char)(C)]
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/* True if VALUE is an unsigned 6-bit number. */
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#define UIMM6_OPERAND(VALUE) \
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@ -1704,117 +1675,6 @@ extern enum reg_class mips_char_to_class[256];
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#define SMALL_INT_UNSIGNED(X) SMALL_OPERAND_UNSIGNED (INTVAL (X))
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#define LUI_INT(X) LUI_OPERAND (INTVAL (X))
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/* The letters I, J, K, L, M, N, O, and P in a register constraint
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string can be used to stand for particular ranges of immediate
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operands. This macro defines what the ranges are. C is the
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letter, and VALUE is a constant value. Return 1 if VALUE is
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in the range specified by C. */
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/* For MIPS:
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`I' is used for the range of constants an arithmetic insn can
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actually contain (16 bits signed integers).
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`J' is used for the range which is just zero (i.e., $r0).
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`K' is used for the range of constants a logical insn can actually
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contain (16 bit zero-extended integers).
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`L' is used for the range of constants that be loaded with lui
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(i.e., the bottom 16 bits are zero).
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`M' is used for the range of constants that take two words to load
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(i.e., not matched by `I', `K', and `L').
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`N' is used for negative 16 bit constants other than -65536.
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`O' is a 15 bit signed integer.
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`P' is used for positive 16 bit constants. */
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#define CONST_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'I' ? SMALL_OPERAND (VALUE) \
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: (C) == 'J' ? ((VALUE) == 0) \
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: (C) == 'K' ? SMALL_OPERAND_UNSIGNED (VALUE) \
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: (C) == 'L' ? LUI_OPERAND (VALUE) \
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: (C) == 'M' ? (!SMALL_OPERAND (VALUE) \
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&& !SMALL_OPERAND_UNSIGNED (VALUE) \
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&& !LUI_OPERAND (VALUE)) \
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: (C) == 'N' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0xffff) < 0xffff) \
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: (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x4000) < 0x8000) \
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: (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \
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: 0)
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/* Similar, but for floating constants, and defining letters G and H.
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Here VALUE is the CONST_DOUBLE rtx itself. */
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/* For MIPS
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'G' : Floating point 0 */
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#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
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((C) == 'G' \
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&& (VALUE) == CONST0_RTX (GET_MODE (VALUE)))
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/* Letters in the range `Q' through `U' may be defined in a
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machine-dependent fashion to stand for arbitrary operand types.
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The machine description macro `EXTRA_CONSTRAINT' is passed the
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operand as its first argument and the constraint letter as its
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second operand.
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`Q' is for signed 16-bit constants.
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`R' is for single-instruction memory references. Note that this
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constraint has often been used in linux and glibc code.
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`S' is for legitimate constant call addresses.
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`T' is for constant move_operands that cannot be safely loaded into $25.
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`U' is for constant move_operands that can be safely loaded into $25.
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`W' is for memory references that are based on a member of BASE_REG_CLASS.
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This is true for all non-mips16 references (although it can sometimes
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be indirect if !TARGET_EXPLICIT_RELOCS). For mips16, it excludes
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stack and constant-pool references.
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`YG' is for 0 valued vector constants.
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`YA' is for unsigned 6-bit constants.
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`YB' is for signed 10-bit constants. */
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#define EXTRA_CONSTRAINT_Y(OP,STR) \
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(((STR)[1] == 'G') ? (GET_CODE (OP) == CONST_VECTOR \
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&& (OP) == CONST0_RTX (GET_MODE (OP))) \
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: ((STR)[1] == 'A') ? (GET_CODE (OP) == CONST_INT \
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&& UIMM6_OPERAND (INTVAL (OP))) \
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: ((STR)[1] == 'B') ? (GET_CODE (OP) == CONST_INT \
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&& IMM10_OPERAND (INTVAL (OP))) \
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: FALSE)
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#define EXTRA_CONSTRAINT_STR(OP,CODE,STR) \
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(((CODE) == 'Q') ? const_arith_operand (OP, VOIDmode) \
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: ((CODE) == 'R') ? (MEM_P (OP) \
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&& mips_fetch_insns (OP) == 1) \
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: ((CODE) == 'S') ? (CONSTANT_P (OP) \
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&& call_insn_operand (OP, VOIDmode)) \
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: ((CODE) == 'T') ? (CONSTANT_P (OP) \
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&& move_operand (OP, VOIDmode) \
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&& mips_dangerous_for_la25_p (OP)) \
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: ((CODE) == 'U') ? (CONSTANT_P (OP) \
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&& move_operand (OP, VOIDmode) \
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&& !mips_dangerous_for_la25_p (OP)) \
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: ((CODE) == 'W') ? (MEM_P (OP) \
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&& memory_operand (OP, VOIDmode) \
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&& (!TARGET_MIPS16 \
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|| (!stack_operand (OP, VOIDmode) \
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&& !CONSTANT_P (XEXP (OP, 0))))) \
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: ((CODE) == 'Y') ? EXTRA_CONSTRAINT_Y (OP, STR) \
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: FALSE)
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/* Y is the only multi-letter constraint, and has length 2. */
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#define CONSTRAINT_LEN(C,STR) \
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(((C) == 'Y') ? 2 \
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: DEFAULT_CONSTRAINT_LEN (C, STR))
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/* Say which of the above are memory constraints. */
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#define EXTRA_MEMORY_CONSTRAINT(C, STR) ((C) == 'R' || (C) == 'W')
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#define PREFERRED_RELOAD_CLASS(X,CLASS) \
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mips_preferred_reload_class (X, CLASS)
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|
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@ -146,6 +146,7 @@
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)
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|
||||
(include "predicates.md")
|
||||
(include "constraints.md")
|
||||
|
||||
;; ....................
|
||||
;;
|
||||
|
|
|
|||
|
|
@ -2368,68 +2368,65 @@ Memory addressed using the small base register ($sb).
|
|||
$r1h
|
||||
@end table
|
||||
|
||||
@item MIPS---@file{config/mips/mips.h}
|
||||
@item MIPS---@file{config/mips/constraints.md}
|
||||
@table @code
|
||||
@item d
|
||||
General-purpose integer register
|
||||
An address register. This is equivalent to @code{r} unless
|
||||
generating MIPS16 code.
|
||||
|
||||
@item f
|
||||
Floating-point register (if available)
|
||||
A floating-point register (if available).
|
||||
|
||||
@item h
|
||||
@samp{Hi} register
|
||||
The @code{hi} register.
|
||||
|
||||
@item l
|
||||
@samp{Lo} register
|
||||
The @code{lo} register.
|
||||
|
||||
@item x
|
||||
@samp{Hi} or @samp{Lo} register
|
||||
The @code{hi} and @code{lo} registers.
|
||||
|
||||
@item c
|
||||
A register suitable for use in an indirect jump. This will always be
|
||||
@code{$25} for @option{-mabicalls}.
|
||||
|
||||
@item y
|
||||
General-purpose integer register
|
||||
Equivalent to @code{r}; retained for backwards compatibility.
|
||||
|
||||
@item z
|
||||
Floating-point status register
|
||||
A floating-point condition code register.
|
||||
|
||||
@item I
|
||||
Signed 16-bit constant (for arithmetic instructions)
|
||||
A signed 16-bit constant (for arithmetic instructions).
|
||||
|
||||
@item J
|
||||
Zero
|
||||
Integer zero.
|
||||
|
||||
@item K
|
||||
Zero-extended 16-bit constant (for logic instructions)
|
||||
An unsigned 16-bit constant (for logic instructions).
|
||||
|
||||
@item L
|
||||
Constant with low 16 bits zero (can be loaded with @code{lui})
|
||||
A signed 32-bit constant in which the lower 16 bits are zero.
|
||||
Such constants can be loaded using @code{lui}.
|
||||
|
||||
@item M
|
||||
32-bit constant which requires two instructions to load (a constant
|
||||
which is not @samp{I}, @samp{K}, or @samp{L})
|
||||
A constant that cannot be loaded using @code{lui}, @code{addiu}
|
||||
or @code{ori}.
|
||||
|
||||
@item N
|
||||
Negative 16-bit constant
|
||||
A constant in the range -65535 to -1 (inclusive).
|
||||
|
||||
@item O
|
||||
Exact power of two
|
||||
A signed 15-bit constant.
|
||||
|
||||
@item P
|
||||
Positive 16-bit constant
|
||||
A constant in the range 1 to 65535 (inclusive).
|
||||
|
||||
@item G
|
||||
Floating point zero
|
||||
|
||||
@item Q
|
||||
Memory reference that can be loaded with more than one instruction
|
||||
(@samp{m} is preferable for @code{asm} statements)
|
||||
Floating-point zero.
|
||||
|
||||
@item R
|
||||
Memory reference that can be loaded with one instruction
|
||||
(@samp{m} is preferable for @code{asm} statements)
|
||||
|
||||
@item S
|
||||
Memory reference in external OSF/rose PIC format
|
||||
(@samp{m} is preferable for @code{asm} statements)
|
||||
An address that can be used in a non-macro load or store.
|
||||
@end table
|
||||
|
||||
@item Motorola 680x0---@file{config/m68k/m68k.h}
|
||||
|
|
|
|||
Loading…
Reference in New Issue